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net/mlx5: Fix size field in bufferx_reg struct
According to HW spec the field "size" should be 16 bits
in bufferx register.
Fixes: e281682bf2 ("net/mlx5_core: HW data structs/types definitions cleanup")
Signed-off-by: Mohammad Kabat <mohammadkab@nvidia.com>
Reviewed-by: Moshe Shemesh <moshe@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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@ -9900,8 +9900,8 @@ struct mlx5_ifc_bufferx_reg_bits {
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u8 reserved_at_0[0x6];
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u8 lossy[0x1];
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u8 epsb[0x1];
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u8 reserved_at_8[0xc];
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u8 size[0xc];
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u8 reserved_at_8[0x8];
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u8 size[0x10];
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u8 xoff_threshold[0x10];
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u8 xon_threshold[0x10];
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