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KVM: x86: Open code setting/clearing of bits in the ISR
Remove __apic_test_and_set_vector() and __apic_test_and_clear_vector(), because the _only_ register that's safe to modify with a non-atomic operation is ISR, because KVM isn't running the vCPU, i.e. hardware can't service an IRQ or process an EOI for the relevant (virtual) APIC. No functional change intended. Suggested-by: Sean Christopherson <seanjc@google.com> Signed-off-by: Neeraj Upadhyay <Neeraj.Upadhyay@amd.com> Acked-by: Sean Christopherson <seanjc@google.com> Link: https://lore.kernel.org/r/20250709033242.267892-2-Neeraj.Upadhyay@amd.com Signed-off-by: Sean Christopherson <seanjc@google.com>
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@ -125,16 +125,6 @@ bool kvm_apic_pending_eoi(struct kvm_vcpu *vcpu, int vector)
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apic_test_vector(vector, apic->regs + APIC_IRR);
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}
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static inline int __apic_test_and_set_vector(int vec, void *bitmap)
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{
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return __test_and_set_bit(VEC_POS(vec), (bitmap) + REG_POS(vec));
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}
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static inline int __apic_test_and_clear_vector(int vec, void *bitmap)
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{
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return __test_and_clear_bit(VEC_POS(vec), (bitmap) + REG_POS(vec));
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}
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__read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
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EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
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@ -744,9 +734,14 @@ void kvm_apic_clear_irr(struct kvm_vcpu *vcpu, int vec)
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}
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EXPORT_SYMBOL_GPL(kvm_apic_clear_irr);
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static void *apic_vector_to_isr(int vec, struct kvm_lapic *apic)
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{
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return apic->regs + APIC_ISR + REG_POS(vec);
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}
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static inline void apic_set_isr(int vec, struct kvm_lapic *apic)
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{
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if (__apic_test_and_set_vector(vec, apic->regs + APIC_ISR))
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if (__test_and_set_bit(VEC_POS(vec), apic_vector_to_isr(vec, apic)))
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return;
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/*
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@ -789,7 +784,7 @@ static inline int apic_find_highest_isr(struct kvm_lapic *apic)
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static inline void apic_clear_isr(int vec, struct kvm_lapic *apic)
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{
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if (!__apic_test_and_clear_vector(vec, apic->regs + APIC_ISR))
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if (!__test_and_clear_bit(VEC_POS(vec), apic_vector_to_isr(vec, apic)))
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return;
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/*
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