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irqchip/starfive: Rename jh8100 to jhb100

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The StarFive JH8100 SoC was discontinued before production. The newly
taped-out JHB100 SoC uses the same interrupt controller IP.  Rename the
driver file, Kconfig symbol, and internal references from "jh8100" to
"jhb100" to accurately reflect the supported hardware.

Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
Signed-off-by: Thomas Gleixner <tglx@kernel.org>
Link: https://patch.msgid.link/20260416064751.632138-3-changhuang.liang@starfivetech.com
This commit is contained in:
Changhuang Liang 2026-04-15 23:47:48 -07:00 committed by Thomas Gleixner
parent a540d544db
commit ac2005bba8
4 changed files with 11 additions and 11 deletions
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4
MAINTAINERS
View File

@ -25533,11 +25533,11 @@ F: Documentation/devicetree/bindings/phy/starfive,jh7110-usb-phy.yaml
F: drivers/phy/starfive/phy-jh7110-pcie.c
F: drivers/phy/starfive/phy-jh7110-usb.c
STARFIVE JH8100 EXTERNAL INTERRUPT CONTROLLER DRIVER
STARFIVE JHB100 EXTERNAL INTERRUPT CONTROLLER DRIVER
M: Changhuang Liang <changhuang.liang@starfivetech.com>
S: Supported
F: Documentation/devicetree/bindings/interrupt-controller/starfive,jhb100-intc.yaml
F: drivers/irqchip/irq-starfive-jh8100-intc.c
F: drivers/irqchip/irq-starfive-jhb100-intc.c
STATIC BRANCH/CALL
M: Peter Zijlstra <peterz@infradead.org>

6
drivers/irqchip/Kconfig
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@ -677,13 +677,13 @@ config SIFIVE_PLIC
select IRQ_DOMAIN_HIERARCHY
select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
config STARFIVE_JH8100_INTC
bool "StarFive JH8100 External Interrupt Controller"
config STARFIVE_JHB100_INTC
bool "StarFive JHB100 External Interrupt Controller"
depends on ARCH_STARFIVE || COMPILE_TEST
default ARCH_STARFIVE
select IRQ_DOMAIN_HIERARCHY
help
This enables support for the INTC chip found in StarFive JH8100
This enables support for the INTC chip found in StarFive JHB100
SoC.
If you don't know what to do here, say Y.

2
drivers/irqchip/Makefile
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@ -109,7 +109,7 @@ obj-$(CONFIG_RISCV_APLIC_MSI) += irq-riscv-aplic-msi.o
obj-$(CONFIG_RISCV_IMSIC) += irq-riscv-imsic-state.o irq-riscv-imsic-early.o irq-riscv-imsic-platform.o
obj-$(CONFIG_RISCV_RPMI_SYSMSI) += irq-riscv-rpmi-sysmsi.o
obj-$(CONFIG_SIFIVE_PLIC) += irq-sifive-plic.o
obj-$(CONFIG_STARFIVE_JH8100_INTC) += irq-starfive-jh8100-intc.o
obj-$(CONFIG_STARFIVE_JHB100_INTC) += irq-starfive-jhb100-intc.o
obj-$(CONFIG_ACLINT_SSWI) += irq-aclint-sswi.o
obj-$(CONFIG_IMX_IRQSTEER) += irq-imx-irqsteer.o
obj-$(CONFIG_IMX_INTMUX) += irq-imx-intmux.o

10
drivers/irqchip/irq-starfive-jh8100-intc.c → drivers/irqchip/irq-starfive-jhb100-intc.c
View File

@ -1,13 +1,13 @@
// SPDX-License-Identifier: GPL-2.0
/*
* StarFive JH8100 External Interrupt Controller driver
* StarFive JHB100 External Interrupt Controller driver
*
* Copyright (C) 2023 StarFive Technology Co., Ltd.
*
* Author: Changhuang Liang <changhuang.liang@starfivetech.com>
*/
#define pr_fmt(fmt) "irq-starfive-jh8100: " fmt
#define pr_fmt(fmt) "irq-starfive-jhb100: " fmt
#include <linux/bitops.h>
#include <linux/clk.h>
@ -71,7 +71,7 @@ static void starfive_intc_mask(struct irq_data *d)
}
static struct irq_chip intc_dev = {
.name = "StarFive JH8100 INTC",
.name = "StarFive JHB100 INTC",
.irq_unmask = starfive_intc_unmask,
.irq_mask = starfive_intc_mask,
};
@ -199,9 +199,9 @@ static int starfive_intc_probe(struct platform_device *pdev, struct device_node
}
IRQCHIP_PLATFORM_DRIVER_BEGIN(starfive_intc)
IRQCHIP_MATCH("starfive,jh8100-intc", starfive_intc_probe)
IRQCHIP_MATCH("starfive,jhb100-intc", starfive_intc_probe)
IRQCHIP_PLATFORM_DRIVER_END(starfive_intc)
MODULE_DESCRIPTION("StarFive JH8100 External Interrupt Controller");
MODULE_DESCRIPTION("StarFive JHB100 External Interrupt Controller");
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Changhuang Liang <changhuang.liang@starfivetech.com>");