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riscv: do not read csr in vector context switch

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CSR operation can be costly as it may introduces serialization. Instead
of reading from sstatus.vs to the detect voluntary context switch in
kernel-mode vector, we can read the context depth from riscv_v_flags, as
it is always non-zero on a trap-introduced context switch.

Signed-off-by: Andy Chiu <tchiu@tenstorrent.com>
Link: https://patch.msgid.link/20260918215154.2481482-2-tchiu@tenstorrent.com
Signed-off-by: Paul Walmsley <pjw@kernel.org>
This commit is contained in:
Andy Chiu 2026-10-05 19:02:55 -06:00 committed by Paul Walmsley
parent 30514aa420
commit abf33d6212
2 changed files with 1 additions and 10 deletions
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3
arch/riscv/include/asm/vector.h
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@ -377,8 +377,7 @@ static inline void __switch_to_vector(struct task_struct *prev,
struct pt_regs *regs;
if (riscv_preempt_v_started(prev)) {
if (riscv_v_is_on()) {
WARN_ON(prev->thread.riscv_v_flags & RISCV_V_CTX_DEPTH_MASK);
if (!(current->thread.riscv_v_flags & RISCV_V_CTX_DEPTH_MASK)) {
riscv_v_disable();
prev->thread.riscv_v_flags |= RISCV_PREEMPT_V_IN_SCHEDULE;
}

8
arch/riscv/kernel/kernel_mode_vector.c
View File

@ -182,14 +182,6 @@ static int riscv_v_start_kernel_context(void)
get_cpu_vector_context();
__riscv_flush_vector_context();
put_cpu_vector_context();
/*
* A voluntary context switch caused by put_cpu_vector_context() can
* raise the NEED_RESTORE flag if preempt_v starts too early due to a
* failed risv_v_is_on() check.
*
* This causes the next context_nesting_end pollute the v-reg from
* the stale context memory in kernel-mode vector.
*/
riscv_v_start(RISCV_PREEMPT_V);
return 0;
}