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ARM: dts: renesas: r9a06g032-rzn1d400-db: Add pinmux for the CPLD

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The CPLD has no dedicated driver, so apply the pinmux settings with the
pinmux driver instead.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250508074311.20343-5-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Wolfram Sang 2025-05-08 09:43:13 +02:00 committed by Geert Uytterhoeven
parent 8ffec7d62c
commit abbf127283
1 changed files with 10 additions and 0 deletions
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10
arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
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@ -170,6 +170,9 @@ &mii_conv5 {
};
&pinctrl {
pinctrl-names = "default";
pinctrl-0 = <&pins_cpld>;
pins_can0: pins_can0 {
pinmux = <RZN1_PINMUX(162, RZN1_FUNC_CAN)>, /* CAN0_TXD */
<RZN1_PINMUX(163, RZN1_FUNC_CAN)>; /* CAN0_RXD */
@ -182,6 +185,13 @@ pins_can1: pins_can1 {
drive-strength = <6>;
};
pins_cpld: pins-cpld {
pinmux = <RZN1_PINMUX(119, RZN1_FUNC_USB)>,
<RZN1_PINMUX(120, RZN1_FUNC_USB)>,
<RZN1_PINMUX(121, RZN1_FUNC_USB)>,
<RZN1_PINMUX(122, RZN1_FUNC_USB)>;
};
pins_eth3: pins_eth3 {
pinmux = <RZN1_PINMUX(36, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(37, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,