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arm64: dts: ti: k3-j722s-evm: Add bootph-all property to enable Ethernet boot

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Ethernet boot requires CPSW nodes to be present starting from R5 SPL
stage. Add bootph-all property to required nodes to enable Ethernet boot
for J722S-EVM.

Reviewed-by: Roger Quadros <rogerq@kernel.org>
Signed-off-by: Chintan Vankar <c-vankar@ti.com>
Link: https://lore.kernel.org/r/20250709105326.232608-4-c-vankar@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
This commit is contained in:
Chintan Vankar 2025-07-09 16:23:25 +05:30 committed by Vignesh Raghavendra
parent d6ad164e05
commit ab9ec669cf
1 changed files with 12 additions and 0 deletions
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12
arch/arm64/boot/dts/ti/k3-j722s-evm.dts
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@ -282,6 +282,14 @@ csi23_mux: mux-controller-1 {
};
};
&cpsw_mac_syscon {
bootph-all;
};
&phy_gmii_sel {
bootph-all;
};
&main_pmx0 {
main_mcan0_pins_default: main-mcan0-default-pins {
@ -346,6 +354,7 @@ mdio_pins_default: mdio-default-pins {
J722S_IOPAD(0x0160, PIN_OUTPUT, 0) /* (AC24) MDIO0_MDC */
J722S_IOPAD(0x015c, PIN_INPUT, 0) /* (AD25) MDIO0_MDIO */
>;
bootph-all;
};
ospi0_pins_default: ospi0-default-pins {
@ -380,6 +389,7 @@ J722S_IOPAD(0x0140, PIN_OUTPUT, 0) /* (AF24) RGMII1_TD3 */
J722S_IOPAD(0x0130, PIN_OUTPUT, 0) /* (AG26) RGMII1_TXC */
J722S_IOPAD(0x012c, PIN_OUTPUT, 0) /* (AF25) RGMII1_TX_CTL */
>;
bootph-all;
};
main_usb1_pins_default: main-usb1-default-pins {
@ -424,6 +434,7 @@ &cpsw3g_mdio {
cpsw3g_phy0: ethernet-phy@0 {
reg = <0>;
bootph-all;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
ti,min-output-impedance;
@ -434,6 +445,7 @@ &cpsw_port1 {
phy-mode = "rgmii-rxid";
phy-handle = <&cpsw3g_phy0>;
status = "okay";
bootph-all;
};
&main_gpio1 {