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drm/amdgpu: Cache result of last reset at reset domain level.
Will be read by executors of async reset like debugfs. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -5318,6 +5318,8 @@ int amdgpu_device_gpu_recover_imp(struct amdgpu_device *adev,
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if (r)
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dev_info(adev->dev, "GPU reset end with ret = %d\n", r);
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atomic_set(&adev->reset_domain->reset_res, r);
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return r;
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}
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@ -5332,7 +5334,7 @@ static void amdgpu_device_queue_gpu_recover_work(struct work_struct *work)
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{
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struct amdgpu_recover_work_struct *recover_work = container_of(work, struct amdgpu_recover_work_struct, base);
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recover_work->ret = amdgpu_device_gpu_recover_imp(recover_work->adev, recover_work->job);
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amdgpu_device_gpu_recover_imp(recover_work->adev, recover_work->job);
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}
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/*
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* Serialize gpu recover into reset domain single threaded wq
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@ -5349,7 +5351,7 @@ int amdgpu_device_gpu_recover(struct amdgpu_device *adev,
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flush_work(&work.base);
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return work.ret;
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return atomic_read(&adev->reset_domain->reset_res);
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}
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/**
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@ -132,6 +132,7 @@ struct amdgpu_reset_domain *amdgpu_reset_create_reset_domain(enum amdgpu_reset_d
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}
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atomic_set(&reset_domain->in_gpu_reset, 0);
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atomic_set(&reset_domain->reset_res, 0);
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init_rwsem(&reset_domain->sem);
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return reset_domain;
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@ -82,6 +82,7 @@ struct amdgpu_reset_domain {
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enum amdgpu_reset_domain_type type;
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struct rw_semaphore sem;
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atomic_t in_gpu_reset;
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atomic_t reset_res;
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};
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