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This pull request contains Broadcom ARM64-based SoCs Device Tree updates

Browse Source 
for 6.14:
 
 - Dave adds the display pipeline DT nodes on BCM2712 (Raspberry Pi 5)
 
 - Rob removes some undocumented properties
 
 - Same ensures that the CFE stub area is reserved to allow secondary
   CPUs to be successfully brought up in Linux, also making sure that the
   address used in the spin table is also carved out. Finally he adds
   support for the Zyxel EX3510-B router using BCM4906
 
 - Rosen converts the BCM4908 platforms to use the more flexible
   nvmem-layout representation
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAmeAFF4ACgkQh9CWnEQH
 BwT0GxAAky4zXzWxJfeBflilG4vKj9T9pYo9ECqgc7/EBGk8+JlXGZM0WqQmJiPs
 tngRySVW7AR9ZI7OwzcnLWyErKm4HgnN4tBPEUkJf12fmoUDNo/q0jw2CyRLw7Hi
 X7cYGE83iJI4WoDxAnI66AEDlSfbC0yoFLM4xzoW8lCsWDjhIG7D2naV1utpaWm4
 MfdwEW6/oRZHL8Tm+2FCYXVl3rW68rrjbHQKN2r1nahyzBPhWkxDqjYwlXxZSYiv
 uVyY9SZPBhBadD7owCr2eGbXhwNAaclnqlPUud9YBJgIruRi6TeHjBC/53uQfLBS
 0r5KZAC33NAjhjg8lfMaZMKmDzciUi3x3iNbMWskcsYPSgrAz9+GjOnoHyGgbWUs
 T7iGwMcWX1nG8SFhhkLtqWar8kSs5kZGXR25dFsn/uKHeIoDFq2gLDRFVfxanZXt
 jvVChgFRS3i27r4QARmLeWhdcfvM0mg4yVby1Ge14iQCPy6dFJlIHBKWVWQR5iRJ
 Oy56zmLT3xMfquE4A99YeJcSEkssHLDSY91AZoM73jvylnSpvEFWOMkYWiYBMten
 5JLEe2hqd4r4WBBkNtvv6g1cyNrKKBND5cGSrOO+cCupGY9HZbJMlrzf4/M2CdGg
 E/y+VhISOCEZr9iqk0OMJ720AuAoGN7elLAkTAsP1os3sJPiO9Q=
 =Cpr3
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmeJEzsACgkQYKtH/8kJ
 UifHUQ/+IK/7JxLvZ/5VEoCEFVHuvpUEUzQNNhzO5i5UzWYeJIijmhKpSoVmgS45
 2SIB4FdjkeDr8S93ZVYZGiM3/P0AwDD46YsRMxvUWSSw5fDX1xbGJNrD708QSPTy
 Uy6coBIhhcmFX8TJw9PU86mt143ll+c/1zmu23WSyIM/US9tYjMbGYC0qhVG1Qbq
 O7tbIBWJnwoXmwKSbx5R3xEnKMWzIvYcnp6OVvv+OnlKK7FnA4lBORG7qrewBhgi
 5oUpifX2QWx6PGpHsmBpznzg8NAOouAFoY46z/tvZQeRwq2mo6haLW+M95BpttGd
 JYM03mAud1IBnf2BNGaJT25euAcsLI6Io2CGaQi2qXd2s26anhaoEXxzHoJbYoGp
 /QCSCvgjM/yMmqJnC4c7gAglus1WrzVEiMGzoq44KeMPqgcgMBHZRKVV79/x06Ai
 FZJUawHiJs/2LKqGH9IpwQEjWiCbzmX3Hhkh+KR+uEiZ77z0oBhFfsROCUi6vDmH
 AlkND/7R81au8Gy7vOJY/9ECJ4xtJzKlrPe4sI4XJPj6Kunhq9x6HKjpLtioM4Vg
 3jd1rHviIXUIvQgIc7JNPUPG5F0UbMF88kPxeTLWZ/7uVQeatQ2fGq0v5qiaQkKd
 F/Ca6mJQiU/aCCHjeIEmRwkA7Ib/h5Ixee48XSxRoLvMqrLMkuo=
 =tcyR
 -----END PGP SIGNATURE-----

Merge tag 'arm-soc/for-6.14/devicetree-arm64' of https://github.com/Broadcom/stblinux into soc/dt

This pull request contains Broadcom ARM64-based SoCs Device Tree updates
for 6.14:

- Dave adds the display pipeline DT nodes on BCM2712 (Raspberry Pi 5)

- Rob removes some undocumented properties

- Same ensures that the CFE stub area is reserved to allow secondary
  CPUs to be successfully brought up in Linux, also making sure that the
  address used in the spin table is also carved out. Finally he adds
  support for the Zyxel EX3510-B router using BCM4906

- Rosen converts the BCM4908 platforms to use the more flexible
  nvmem-layout representation

* tag 'arm-soc/for-6.14/devicetree-arm64' of https://github.com/Broadcom/stblinux:
  arm64: dts: bcm4908: nvmem-layout conversion
  arm64: dts: broadcom: bcmbca: bcm4908: Add DT for Zyxel EX3510-B
  dt-bindings: arm64: bcmbca: Add Zyxel EX3510-B based on BCM4906
  arm64: dts: broadcom: bcmbca: bcm4908: Protect cpu-release-addr
  arm64: dts: broadcom: bcmbca: bcm4908: Reserve CFE stub area
  arm64: dts: broadcom: Remove unused and undocumented properties
  arm64: dts: broadcom: Add DT for D-step version of BCM2712
  arm64: dts: broadcom: Add display pipeline support to BCM2712
  arm64: dts: broadcom: Add firmware clocks and power nodes to Pi5 DT

Link: https://lore.kernel.org/r/20250109224756.3632025-2-florian.fainelli@broadcom.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2025-01-16 15:10:03 +01:00
commit ab6efed7ec
12 changed files with 488 additions and 18 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
View File

@ -34,6 +34,7 @@ properties:
- enum:
- netgear,r8000p
- tplink,archer-c2300-v1
- zyxel,ex3510b
- const: brcm,bcm4906
- const: brcm,bcm4908
- const: brcm,bcmbca

1
arch/arm64/boot/dts/broadcom/Makefile
View File

@ -7,6 +7,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-400.dtb \
bcm2711-rpi-4-b.dtb \
bcm2711-rpi-cm4-io.dtb \
bcm2712-rpi-5-b.dtb \
bcm2712-d-rpi-5-b.dtb \
bcm2837-rpi-3-a-plus.dtb \
bcm2837-rpi-3-b.dtb \
bcm2837-rpi-3-b-plus.dtb \

37
arch/arm64/boot/dts/broadcom/bcm2712-d-rpi-5-b.dts Normal file
View File

@ -0,0 +1,37 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/dts-v1/;
#include "bcm2712-rpi-5-b.dts"
&gio_aon {
brcm,gpio-bank-widths = <15 6>;
gpio-line-names =
"RP1_SDA", // AON_GPIO_00
"RP1_SCL", // AON_GPIO_01
"RP1_RUN", // AON_GPIO_02
"SD_IOVDD_SEL", // AON_GPIO_03
"SD_PWR_ON", // AON_GPIO_04
"SD_CDET_N", // AON_GPIO_05
"SD_FLG_N", // AON_GPIO_06
"", // AON_GPIO_07
"2712_WAKE", // AON_GPIO_08
"2712_STAT_LED", // AON_GPIO_09
"", // AON_GPIO_10
"", // AON_GPIO_11
"PMIC_INT", // AON_GPIO_12
"UART_TX_FS", // AON_GPIO_13
"UART_RX_FS", // AON_GPIO_14
"", // AON_GPIO_15
"", // AON_GPIO_16
// Pad bank0 out to 32 entries
"", "", "", "", "", "", "", "", "", "", "", "", "", "", "",
"HDMI0_SCL", // AON_SGPIO_00
"HDMI0_SDA", // AON_SGPIO_01
"HDMI1_SCL", // AON_SGPIO_02
"HDMI1_SDA", // AON_SGPIO_03
"PMIC_SCL", // AON_SGPIO_04
"PMIC_SDA"; // AON_SGPIO_05
};

42
arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts
View File

@ -62,3 +62,45 @@ &sdio1 {
sd-uhs-ddr50;
sd-uhs-sdr104;
};
&soc {
firmware: firmware {
compatible = "raspberrypi,bcm2835-firmware", "simple-mfd";
#address-cells = <1>;
#size-cells = <1>;
mboxes = <&mailbox>;
dma-ranges;
firmware_clocks: clocks {
compatible = "raspberrypi,firmware-clocks";
#clock-cells = <1>;
};
reset: reset {
compatible = "raspberrypi,firmware-reset";
#reset-cells = <1>;
};
};
power: power {
compatible = "raspberrypi,bcm2835-power";
firmware = <&firmware>;
#power-domain-cells = <1>;
};
};
&hvs {
clocks = <&firmware_clocks 4>, <&firmware_clocks 16>;
clock-names = "core", "disp";
};
&hdmi0 {
clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 0>, <&clk_27MHz>;
clock-names = "hdmi", "bvb", "audio", "cec";
};
&hdmi1 {
clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 1>, <&clk_27MHz>;
clock-names = "hdmi", "bvb", "audio", "cec";
};

193
arch/arm64/boot/dts/broadcom/bcm2712.dtsi
View File

@ -221,11 +221,6 @@ mailbox: mailbox@7c013880 {
#mbox-cells = <0>;
};
local_intc: interrupt-controller@7cd00000 {
compatible = "brcm,bcm2836-l1-intc";
reg = <0x7cd00000 0x100>;
};
uart10: serial@7d001000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x7d001000 0x200>;
@ -265,6 +260,172 @@ gicv2: interrupt-controller@7fff9000 {
interrupt-controller;
#interrupt-cells = <3>;
};
aon_intr: interrupt-controller@7d510600 {
compatible = "brcm,bcm2711-l2-intc", "brcm,l2-intc";
reg = <0x7d510600 0x30>;
interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <1>;
};
pixelvalve0: pixelvalve@7c410000 {
compatible = "brcm,bcm2712-pixelvalve0";
reg = <0x7c410000 0x100>;
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
};
pixelvalve1: pixelvalve@7c411000 {
compatible = "brcm,bcm2712-pixelvalve1";
reg = <0x7c411000 0x100>;
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
};
mop: mop@7c500000 {
compatible = "brcm,bcm2712-mop";
reg = <0x7c500000 0x28>;
interrupt-parent = <&disp_intr>;
interrupts = <1>;
};
moplet: moplet@7c501000 {
compatible = "brcm,bcm2712-moplet";
reg = <0x7c501000 0x20>;
interrupt-parent = <&disp_intr>;
interrupts = <0>;
};
disp_intr: interrupt-controller@7c502000 {
compatible = "brcm,bcm2711-l2-intc", "brcm,l2-intc";
reg = <0x7c502000 0x30>;
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <1>;
};
dvp: clock@7c700000 {
compatible = "brcm,brcm2711-dvp";
reg = <0x7c700000 0x10>;
clocks = <&clk_108MHz>;
#clock-cells = <1>;
#reset-cells = <1>;
};
ddc0: i2c@7d508200 {
compatible = "brcm,brcmstb-i2c";
reg = <0x7d508200 0x58>;
interrupt-parent = <&bsc_irq>;
interrupts = <1>;
clock-frequency = <97500>;
#address-cells = <1>;
#size-cells = <0>;
};
ddc1: i2c@7d508280 {
compatible = "brcm,brcmstb-i2c";
reg = <0x7d508280 0x58>;
interrupt-parent = <&bsc_irq>;
interrupts = <2>;
clock-frequency = <97500>;
#address-cells = <1>;
#size-cells = <0>;
};
bsc_irq: interrupt-controller@7d508380 {
compatible = "brcm,bcm7271-l2-intc";
reg = <0x7d508380 0x10>;
interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <1>;
};
main_irq: interrupt-controller@7d508400 {
compatible = "brcm,bcm7271-l2-intc";
reg = <0x7d508400 0x10>;
interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <1>;
};
hdmi0: hdmi@7c701400 {
compatible = "brcm,bcm2712-hdmi0";
reg = <0x7c701400 0x300>,
<0x7c701000 0x200>,
<0x7c701d00 0x300>,
<0x7c702000 0x80>,
<0x7c703800 0x200>,
<0x7c704000 0x800>,
<0x7c700100 0x80>,
<0x7d510800 0x100>,
<0x7c720000 0x100>;
reg-names = "hdmi",
"dvp",
"phy",
"rm",
"packet",
"metadata",
"csc",
"cec",
"hd";
resets = <&dvp 1>;
interrupt-parent = <&aon_intr>;
interrupts = <1>, <2>, <3>,
<7>, <8>;
interrupt-names = "cec-tx", "cec-rx", "cec-low",
"hpd-connected", "hpd-removed";
ddc = <&ddc0>;
};
hdmi1: hdmi@7c706400 {
compatible = "brcm,bcm2712-hdmi1";
reg = <0x7c706400 0x300>,
<0x7c706000 0x200>,
<0x7c706d00 0x300>,
<0x7c707000 0x80>,
<0x7c708800 0x200>,
<0x7c709000 0x800>,
<0x7c700180 0x80>,
<0x7d511000 0x100>,
<0x7c720000 0x100>;
reg-names = "hdmi",
"dvp",
"phy",
"rm",
"packet",
"metadata",
"csc",
"cec",
"hd";
resets = <&dvp 2>;
interrupt-parent = <&aon_intr>;
interrupts = <11>, <12>, <13>,
<14>, <15>;
interrupt-names = "cec-tx", "cec-rx", "cec-low",
"hpd-connected", "hpd-removed";
ddc = <&ddc1>;
};
};
axi: axi {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x00 0x00000000 0x00 0x00000000 0x10 0x00000000>,
<0x10 0x00000000 0x10 0x00000000 0x01 0x00000000>,
<0x14 0x00000000 0x14 0x00000000 0x04 0x00000000>,
<0x18 0x00000000 0x18 0x00000000 0x04 0x00000000>,
<0x1c 0x00000000 0x1c 0x00000000 0x04 0x00000000>;
dma-ranges = <0x00 0x00000000 0x00 0x00000000 0x10 0x00000000>,
<0x10 0x00000000 0x10 0x00000000 0x01 0x00000000>,
<0x14 0x00000000 0x14 0x00000000 0x04 0x00000000>,
<0x18 0x00000000 0x18 0x00000000 0x04 0x00000000>,
<0x1c 0x00000000 0x1c 0x00000000 0x04 0x00000000>;
vc4: gpu {
compatible = "brcm,bcm2712-vc6";
};
};
timer {
@ -280,4 +441,26 @@ IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 12 (GIC_CPU_MASK_SIMPLE(4) |
IRQ_TYPE_LEVEL_LOW)>;
};
clk_27MHz: clk-27M {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <27000000>;
clock-output-names = "27MHz-clock";
};
clk_108MHz: clk-108M {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <108000000>;
clock-output-names = "108MHz-clock";
};
hvs: hvs@107c580000 {
compatible = "brcm,bcm2712-hvs";
reg = <0x10 0x7c580000 0x0 0x1a000>;
interrupt-parent = <&disp_intr>;
interrupts = <2>, <9>, <16>;
interrupt-names = "ch0-eof", "ch1-eof", "ch2-eof";
};
};

1
arch/arm64/boot/dts/broadcom/bcmbca/Makefile
View File

@ -2,6 +2,7 @@
dtb-$(CONFIG_ARCH_BCMBCA) += \
bcm4906-netgear-r8000p.dtb \
bcm4906-tplink-archer-c2300-v1.dtb \
bcm4906-zyxel-ex3510b.dtb \
bcm4908-asus-gt-ac5300.dtb \
bcm4908-netgear-raxe500.dtb \
bcm94908.dtb \

12
arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts
View File

@ -144,16 +144,20 @@ partitions {
#size-cells = <1>;
partition@0 {
compatible = "nvmem-cells";
label = "cferom";
reg = <0x0 0x100000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x0 0x100000>;
base_mac_addr: mac@106a0 {
reg = <0x106a0 0x6>;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
base_mac_addr: mac@106a0 {
reg = <0x106a0 0x6>;
};
};
};

196
arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-zyxel-ex3510b.dts Normal file
View File

@ -0,0 +1,196 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include "bcm4906.dtsi"
/ {
compatible = "zyxel,ex3510b", "brcm,bcm4906", "brcm,bcm4908", "brcm,bcmbca";
model = "Zyxel EX3510-B";
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x20000000>;
};
gpio-keys-polled {
compatible = "gpio-keys-polled";
poll-interval = <100>;
key-wps {
label = "WPS";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
};
key-reset {
label = "Reset";
linux,code = <KEY_RESTART>;
gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
};
};
};
&leds {
pinctrl-0 = <&pins_led_0_a>, <&pins_led_2_a>, <&pins_led_3_a>,
<&pins_led_4_a>, <&pins_led_10_a>, <&pins_led_12_a>,
<&pins_led_14_a>, <&pins_led_15_a>, <&pins_led_21_a>;
pinctrl-names = "default";
led@0 {
reg = <0x0>;
function = LED_FUNCTION_POWER;
color = <LED_COLOR_ID_RED>;
};
led@2 {
reg = <0x2>;
function = LED_FUNCTION_WAN_ONLINE;
color = <LED_COLOR_ID_GREEN>;
};
led@3 {
reg = <0x3>;
function = LED_FUNCTION_WAN_ONLINE;
color = <LED_COLOR_ID_RED>;
};
led@4 {
reg = <0x4>;
function = LED_FUNCTION_USB;
color = <LED_COLOR_ID_GREEN>;
trigger-sources = <&ohci_port1>, <&ohci_port2>,
<&ehci_port1>, <&ehci_port2>,
<&xhci_port1>, <&xhci_port2>;
linux,default-trigger = "usbport";
};
led@a {
reg = <0xa>;
function = LED_FUNCTION_POWER;
color = <LED_COLOR_ID_GREEN>;
linux,default-trigger = "default-on";
};
led@c {
reg = <0xc>;
function = LED_FUNCTION_LAN;
color = <LED_COLOR_ID_GREEN>;
active-low;
};
led@e {
reg = <0xe>;
function = LED_FUNCTION_WPS;
color = <LED_COLOR_ID_GREEN>;
active-low;
};
led@f {
reg = <0xf>;
function = LED_FUNCTION_WPS;
color = <LED_COLOR_ID_RED>;
active-low;
};
led@15 {
reg = <0x15>;
function = LED_FUNCTION_WAN;
color = <LED_COLOR_ID_GREEN>;
active-low;
};
};
&enet {
nvmem-cells = <&base_mac_addr>;
nvmem-cell-names = "mac-address";
};
&usb_phy {
brcm,ioc = <1>;
brcm,ipp = <1>;
status = "okay";
};
&ehci {
status = "okay";
};
&ohci {
status = "okay";
};
&xhci {
status = "okay";
};
&ports {
port@0 {
label = "lan1";
};
port@1 {
label = "lan2";
};
port@2 {
label = "lan3";
};
port@3 {
label = "lan4";
};
port@7 {
reg = <7>;
phy-mode = "internal";
phy-handle = <&phy12>;
label = "wan";
};
};
&nand_controller {
status = "okay";
};
&nandcs {
brcm,nand-oob-sector-size = <27>;
nand-ecc-strength = <8>;
nand-ecc-step-size = <512>;
nand-on-flash-bbt;
#address-cells = <1>;
#size-cells = <0>;
partitions {
compatible = "brcm,bcm4908-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
compatible = "nvmem-cells";
label = "cferom";
reg = <0x0 0x100000>;
read-only;
#address-cells = <1>;
#size-cells = <1>;
base_mac_addr: mac@106a0 {
reg = <0x106a0 0x6>;
};
};
partition@100000 {
compatible = "brcm,bcm4908-firmware";
reg = <0x100000 0x5f80000>;
};
partition@6080000 {
compatible = "brcm,bcm4908-firmware";
reg = <0x6080000 0x5f80000>;
};
};
};

18
arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
View File

@ -30,7 +30,7 @@ cpu0: cpu@0 {
compatible = "brcm,brahma-b53";
reg = <0x0>;
enable-method = "spin-table";
cpu-release-addr = <0x0 0xfff8>;
cpu-release-addr = <0x0 0xff8>;
next-level-cache = <&l2>;
};
@ -39,7 +39,7 @@ cpu1: cpu@1 {
compatible = "brcm,brahma-b53";
reg = <0x1>;
enable-method = "spin-table";
cpu-release-addr = <0x0 0xfff8>;
cpu-release-addr = <0x0 0xff8>;
next-level-cache = <&l2>;
};
@ -48,7 +48,7 @@ cpu2: cpu@2 {
compatible = "brcm,brahma-b53";
reg = <0x2>;
enable-method = "spin-table";
cpu-release-addr = <0x0 0xfff8>;
cpu-release-addr = <0x0 0xff8>;
next-level-cache = <&l2>;
};
@ -57,7 +57,7 @@ cpu3: cpu@3 {
compatible = "brcm,brahma-b53";
reg = <0x3>;
enable-method = "spin-table";
cpu-release-addr = <0x0 0xfff8>;
cpu-release-addr = <0x0 0xff8>;
next-level-cache = <&l2>;
};
@ -68,6 +68,16 @@ l2: l2-cache0 {
};
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
cfe-stub@0 {
reg = <0x0 0x0 0x0 0x1000>;
};
};
axi@81000000 {
compatible = "simple-bus";
#address-cells = <1>;

2
arch/arm64/boot/dts/broadcom/northstar2/ns2-svk.dts
View File

@ -137,7 +137,6 @@ at25@0 {
spi-cpha;
spi-cpol;
pl022,interface = <0>;
pl022,slave-tx-disable = <0>;
pl022,com-mode = <0>;
pl022,rx-level-trig = <1>;
pl022,tx-level-trig = <1>;
@ -200,7 +199,6 @@ nand_sel: nand_sel {
};
&qspi {
bspi-sel = <0>;
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;

1
arch/arm64/boot/dts/broadcom/northstar2/ns2-xmc.dts
View File

@ -151,7 +151,6 @@ flash: flash@0 {
#size-cells = <1>;
compatible = "m25p80";
spi-max-frequency = <62500000>;
m25p,default-addr-width = <3>;
reg = <0x0 0x0>;
partition@0 {

2
arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi
View File

@ -134,7 +134,6 @@ pcie0: pcie@20020000 {
brcm,pcie-ob;
brcm,pcie-ob-oarr-size;
brcm,pcie-ob-axi-offset = <0x00000000>;
brcm,pcie-ob-window-size = <256>;
status = "disabled";
@ -165,7 +164,6 @@ pcie4: pcie@50020000 {
brcm,pcie-ob;
brcm,pcie-ob-oarr-size;
brcm,pcie-ob-axi-offset = <0x30000000>;
brcm,pcie-ob-window-size = <256>;
status = "disabled";