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drm/i915/dg2: DG2 uses the same sseu limits as XeHP SDV

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DG2 supports compute DSS and has the same maximum number of DSS and EU
as XeHP SDV.

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Caz Yokoyama <caz.yokoyama@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210729170008.2836648-12-matthew.d.roper@intel.com
This commit is contained in:
Matt Roper 2021-07-29 10:00:01 -07:00
parent eb962fae00
commit ab49840272
1 changed files with 1 additions and 1 deletions
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2
drivers/gpu/drm/i915/gt/intel_sseu.c
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@ -145,7 +145,7 @@ static void gen12_sseu_info_init(struct intel_gt *gt)
* across the entire device. Then calculate out the DSS for each
* workload type within that software slice.
*/
if (IS_XEHPSDV(gt->i915))
if (IS_DG2(gt->i915) || IS_XEHPSDV(gt->i915))
intel_sseu_set_info(sseu, 1, 32, 16);
else
intel_sseu_set_info(sseu, 1, 6, 16);