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cxl/region: Fix the first aliased address miscalculation

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In extended linear cache(ELC) case, cxl_port_get_spa_cache_alias() helps
to get the aliased address of a SPA, it considers the first address in
CXL memory range is "region start + region cache size + 1", but it
should be "region start + region cache size".

So if a SPA is equal to "region start + region cache size", its aliased
address should be "SPA - region cache size".

Signed-off-by: Li Ming <ming.li@zohomail.com>
Reviewed-by: Alison Schofield <alison.schofield@intel.com>
Reviewed-by: Ira Weiny <ira.weiny@intel.com>
Link: https://patch.msgid.link/20250317070124.815028-1-ming.li@zohomail.com
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
This commit is contained in:
Li Ming 2025-03-17 15:01:24 +08:00 committed by Dave Jiang
parent 3b5d43245f
commit aae0594a70
1 changed files with 1 additions and 1 deletions
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2
drivers/cxl/core/region.c
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@ -3460,7 +3460,7 @@ u64 cxl_port_get_spa_cache_alias(struct cxl_port *endpoint, u64 spa)
if (!p->cache_size)
return ~0ULL;
if (spa > p->res->start + p->cache_size)
if (spa >= p->res->start + p->cache_size)
return spa - p->cache_size;
return spa + p->cache_size;