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drm/i915/cdclk: Avoid spurious cdclk sanitization on PTL+
Apparently PTL+ no longer has the cd2x pipe select field in
CDCLK_CTL. Take that into account during CDCLK sanitization.
This currently triggers a spurious CDCLK sanitization during
driver load on PTL+ which will causes a visible glitch on all
active displays.
Cc: stable@vger.kernel.org
Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/8550
Fixes: 2ee8dbd880 ("drm/i915/cdclk: Fix up CDCLK_FREQ_DECIMAL without a full PLL re-enable")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/20260717155107.17801-1-ville.syrjala@linux.intel.com
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
(cherry picked from commit 1786d26887817a779641d3a093c66ac91382113b)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
This commit is contained in:
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@ -2381,8 +2381,10 @@ static void bxt_sanitize_cdclk(struct intel_display *display)
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* dividers both syncing to an active pipe, or asynchronously
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* (PIPE_NONE).
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*/
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cdctl &= ~bxt_cdclk_cd2x_pipe_mask(display);
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cdctl |= bxt_cdclk_cd2x_pipe(display, INVALID_PIPE);
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if (DISPLAY_VER(display) < 30) {
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cdctl &= ~bxt_cdclk_cd2x_pipe_mask(display);
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cdctl |= bxt_cdclk_cd2x_pipe(display, INVALID_PIPE);
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}
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if (cdctl != expected) {
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if (DISPLAY_VER(display) < 20) {
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