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drm/amdgpu: upgrade amdgpu_discovery struct ip to ip_v4
version 4 supports 64bit ip base address Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
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3955b14134
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aabb478421
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@ -471,11 +471,11 @@ void amdgpu_discovery_fini(struct amdgpu_device *adev)
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adev->mman.discovery_bin = NULL;
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}
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static int amdgpu_discovery_validate_ip(const struct ip *ip)
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static int amdgpu_discovery_validate_ip(const struct ip_v4 *ip)
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{
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if (ip->number_instance >= HWIP_MAX_INSTANCE) {
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DRM_ERROR("Unexpected number_instance (%d) from ip discovery blob\n",
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ip->number_instance);
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if (ip->instance_number >= HWIP_MAX_INSTANCE) {
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DRM_ERROR("Unexpected instance_number (%d) from ip discovery blob\n",
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ip->instance_number);
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return -EINVAL;
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}
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if (le16_to_cpu(ip->hw_id) >= HW_ID_MAX) {
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@ -493,7 +493,7 @@ static void amdgpu_discovery_read_harvest_bit_per_ip(struct amdgpu_device *adev,
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struct binary_header *bhdr;
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struct ip_discovery_header *ihdr;
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struct die_header *dhdr;
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struct ip *ip;
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struct ip_v4 *ip;
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uint16_t die_offset, ip_offset, num_dies, num_ips;
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int i, j;
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@ -510,16 +510,16 @@ static void amdgpu_discovery_read_harvest_bit_per_ip(struct amdgpu_device *adev,
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ip_offset = die_offset + sizeof(*dhdr);
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for (j = 0; j < num_ips; j++) {
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ip = (struct ip *)(adev->mman.discovery_bin + ip_offset);
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ip = (struct ip_v4 *)(adev->mman.discovery_bin + ip_offset);
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if (amdgpu_discovery_validate_ip(ip))
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goto next_ip;
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if (le16_to_cpu(ip->harvest) == 1) {
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if (le16_to_cpu(ip->variant) == 1) {
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switch (le16_to_cpu(ip->hw_id)) {
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case VCN_HWID:
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(*vcn_harvest_count)++;
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if (ip->number_instance == 0)
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if (ip->instance_number == 0)
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adev->vcn.harvest_config |= AMDGPU_VCN_HARVEST_VCN0;
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else
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adev->vcn.harvest_config |= AMDGPU_VCN_HARVEST_VCN1;
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@ -852,10 +852,10 @@ static int amdgpu_discovery_sysfs_ips(struct amdgpu_device *adev,
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size_t ip_offset = _ip_offset;
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for (jj = 0; jj < num_ips; jj++) {
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struct ip *ip;
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struct ip_v4 *ip;
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struct ip_hw_instance *ip_hw_instance;
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ip = (struct ip *)(adev->mman.discovery_bin + ip_offset);
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ip = (struct ip_v4 *)(adev->mman.discovery_bin + ip_offset);
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if (amdgpu_discovery_validate_ip(ip) ||
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le16_to_cpu(ip->hw_id) != ii)
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goto next_ip;
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@ -903,11 +903,11 @@ static int amdgpu_discovery_sysfs_ips(struct amdgpu_device *adev,
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return -ENOMEM;
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}
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ip_hw_instance->hw_id = le16_to_cpu(ip->hw_id); /* == ii */
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ip_hw_instance->num_instance = ip->number_instance;
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ip_hw_instance->num_instance = ip->instance_number;
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ip_hw_instance->major = ip->major;
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ip_hw_instance->minor = ip->minor;
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ip_hw_instance->revision = ip->revision;
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ip_hw_instance->harvest = ip->harvest;
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ip_hw_instance->harvest = ip->variant;
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ip_hw_instance->num_base_addresses = ip->num_base_address;
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for (kk = 0; kk < ip_hw_instance->num_base_addresses; kk++)
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@ -1082,7 +1082,7 @@ static int amdgpu_discovery_reg_base_init(struct amdgpu_device *adev)
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struct binary_header *bhdr;
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struct ip_discovery_header *ihdr;
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struct die_header *dhdr;
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struct ip *ip;
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struct ip_v4 *ip;
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uint16_t die_offset;
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uint16_t ip_offset;
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uint16_t num_dies;
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@ -1121,7 +1121,7 @@ static int amdgpu_discovery_reg_base_init(struct amdgpu_device *adev)
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le16_to_cpu(dhdr->die_id), num_ips);
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for (j = 0; j < num_ips; j++) {
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ip = (struct ip *)(adev->mman.discovery_bin + ip_offset);
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ip = (struct ip_v4 *)(adev->mman.discovery_bin + ip_offset);
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if (amdgpu_discovery_validate_ip(ip))
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goto next_ip;
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@ -1131,7 +1131,7 @@ static int amdgpu_discovery_reg_base_init(struct amdgpu_device *adev)
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DRM_DEBUG("%s(%d) #%d v%d.%d.%d:\n",
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hw_id_names[le16_to_cpu(ip->hw_id)],
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le16_to_cpu(ip->hw_id),
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ip->number_instance,
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ip->instance_number,
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ip->major, ip->minor,
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ip->revision);
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@ -1182,7 +1182,7 @@ static int amdgpu_discovery_reg_base_init(struct amdgpu_device *adev)
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if (hw_id_map[hw_ip] == le16_to_cpu(ip->hw_id)) {
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DRM_DEBUG("set register base offset for %s\n",
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hw_id_names[le16_to_cpu(ip->hw_id)]);
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adev->reg_offset[hw_ip][ip->number_instance] =
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adev->reg_offset[hw_ip][ip->instance_number] =
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ip->base_address;
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/* Instance support is somewhat inconsistent.
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* SDMA is a good example. Sienna cichlid has 4 total
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@ -1193,7 +1193,7 @@ static int amdgpu_discovery_reg_base_init(struct amdgpu_device *adev)
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* example. On most chips there are multiple instances
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* with the same HWID.
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*/
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adev->ip_versions[hw_ip][ip->number_instance] =
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adev->ip_versions[hw_ip][ip->instance_number] =
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IP_VERSION(ip->major, ip->minor, ip->revision);
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}
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}
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