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octeontx2-af: npc: cn20k: Propagate MCAM key-type errors on cn20k
npc_mcam_idx_2_key_type() can fail; callers used to ignore it and still
used kw_type when enabling, configuring, copying, and reading MCAM entries.
That could program or decode hardware with an undefined key type.
Return -EINVAL when key-type lookup fails. Return -EINVAL from
npc_cn20k_copy_mcam_entry() when src and dest key types differ instead of
failing silently.
Change npc_cn20k_{enable,config,copy,read}_mcam_entry() to return int on
success or error. Thread those errors through the cn20k MCAM write and read
mbox handlers, the cn20k baseline steer read path, NPC defrag move
(disable/copy/enable with dev_err and -EFAULT), and the DMAC update path in
rvu_npc_fs.c.
Make npc_copy_mcam_entry() return int so the cn20k branch can return
npc_cn20k_copy_mcam_entry() without a void/int mismatch, and fail
NPC_MCAM_SHIFT_ENTRY when copy fails.
Cc: Suman Ghosh <sumang@marvell.com>
Cc: Dan Carpenter <error27@gmail.com>
Fixes: 6d1e70282f ("octeontx2-af: npc: cn20k: Use common APIs")
Link: https://lore.kernel.org/netdev/adiQJvuKlEhq2ILx@stanley.mountain/
Signed-off-by: Ratheesh Kannoth <rkannoth@marvell.com>
Link: https://patch.msgid.link/20260429022722.1110289-2-rkannoth@marvell.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Ratheesh Kannoth
Jakub Kicinski
parent
75df490c9e
commit
aaadccde31
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@ -798,7 +798,7 @@ void npc_cn20k_load_mkex_profile(struct rvu *rvu, int blkaddr,
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iounmap(mkex_prfl_addr);
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}
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void
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int
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npc_cn20k_enable_mcam_entry(struct rvu *rvu, int blkaddr,
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int index, bool enable)
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{
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@ -808,7 +808,9 @@ npc_cn20k_enable_mcam_entry(struct rvu *rvu, int blkaddr,
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u64 cfg, hw_prio;
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u8 kw_type;
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npc_mcam_idx_2_key_type(rvu, index, &kw_type);
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if (npc_mcam_idx_2_key_type(rvu, index, &kw_type))
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return -EINVAL;
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if (kw_type == NPC_MCAM_KEY_X2) {
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cfg = rvu_read64(rvu, blkaddr,
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NPC_AF_CN20K_MCAMEX_BANKX_CFG_EXT(mcam_idx,
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@ -819,7 +821,7 @@ npc_cn20k_enable_mcam_entry(struct rvu *rvu, int blkaddr,
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rvu_write64(rvu, blkaddr,
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NPC_AF_CN20K_MCAMEX_BANKX_CFG_EXT(mcam_idx, bank),
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cfg);
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return;
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return 0;
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}
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/* For NPC_CN20K_MCAM_KEY_X4 keys, both the banks
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@ -836,6 +838,8 @@ npc_cn20k_enable_mcam_entry(struct rvu *rvu, int blkaddr,
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NPC_AF_CN20K_MCAMEX_BANKX_CFG_EXT(mcam_idx, bank),
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cfg);
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}
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return 0;
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}
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void
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@ -1042,9 +1046,9 @@ npc_cn20k_set_mcam_bank_cfg(struct rvu *rvu, int blkaddr, int mcam_idx,
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}
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}
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void npc_cn20k_config_mcam_entry(struct rvu *rvu, int blkaddr, int index,
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u8 intf, struct cn20k_mcam_entry *entry,
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bool enable, u8 hw_prio, u8 req_kw_type)
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int npc_cn20k_config_mcam_entry(struct rvu *rvu, int blkaddr, int index,
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u8 intf, struct cn20k_mcam_entry *entry,
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bool enable, u8 hw_prio, u8 req_kw_type)
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{
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struct npc_mcam *mcam = &rvu->hw->mcam;
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int mcam_idx = index % mcam->banksize;
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@ -1052,10 +1056,13 @@ void npc_cn20k_config_mcam_entry(struct rvu *rvu, int blkaddr, int index,
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int kw = 0;
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u8 kw_type;
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/* Disable before mcam entry update */
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npc_cn20k_enable_mcam_entry(rvu, blkaddr, index, false);
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if (npc_mcam_idx_2_key_type(rvu, index, &kw_type))
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return -EINVAL;
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/* Disable before mcam entry update */
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if (npc_cn20k_enable_mcam_entry(rvu, blkaddr, index, false))
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return -EINVAL;
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npc_mcam_idx_2_key_type(rvu, index, &kw_type);
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/* CAM1 takes the comparison value and
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* CAM0 specifies match for a bit in key being '0' or '1' or 'dontcare'.
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* CAM1<n> = 0 & CAM0<n> = 1 => match if key<n> = 0
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@ -1120,9 +1127,11 @@ void npc_cn20k_config_mcam_entry(struct rvu *rvu, int blkaddr, int index,
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/* PF installing VF rule */
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npc_cn20k_set_mcam_bank_cfg(rvu, blkaddr, mcam_idx, bank,
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kw_type, enable, hw_prio);
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return 0;
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}
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void npc_cn20k_copy_mcam_entry(struct rvu *rvu, int blkaddr, u16 src, u16 dest)
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int npc_cn20k_copy_mcam_entry(struct rvu *rvu, int blkaddr, u16 src, u16 dest)
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{
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struct npc_mcam *mcam = &rvu->hw->mcam;
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u64 cfg, sreg, dreg, soff, doff;
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@ -1132,10 +1141,15 @@ void npc_cn20k_copy_mcam_entry(struct rvu *rvu, int blkaddr, u16 src, u16 dest)
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dbank = npc_get_bank(mcam, dest);
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sbank = npc_get_bank(mcam, src);
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npc_mcam_idx_2_key_type(rvu, src, &src_kwtype);
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npc_mcam_idx_2_key_type(rvu, dest, &dest_kwtype);
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if (npc_mcam_idx_2_key_type(rvu, src, &src_kwtype))
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return -EINVAL;
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if (npc_mcam_idx_2_key_type(rvu, dest, &dest_kwtype))
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return -EINVAL;
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if (src_kwtype != dest_kwtype)
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return;
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return -EINVAL;
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src &= (mcam->banksize - 1);
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dest &= (mcam->banksize - 1);
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@ -1170,6 +1184,8 @@ void npc_cn20k_copy_mcam_entry(struct rvu *rvu, int blkaddr, u16 src, u16 dest)
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if (src_kwtype == NPC_MCAM_KEY_X2)
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break;
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}
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return 0;
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}
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static void npc_cn20k_fill_entryword(struct cn20k_mcam_entry *entry, int idx,
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@ -1179,16 +1195,17 @@ static void npc_cn20k_fill_entryword(struct cn20k_mcam_entry *entry, int idx,
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entry->kw_mask[idx] = cam1 ^ cam0;
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}
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void npc_cn20k_read_mcam_entry(struct rvu *rvu, int blkaddr, u16 index,
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struct cn20k_mcam_entry *entry,
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u8 *intf, u8 *ena, u8 *hw_prio)
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int npc_cn20k_read_mcam_entry(struct rvu *rvu, int blkaddr, u16 index,
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struct cn20k_mcam_entry *entry,
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u8 *intf, u8 *ena, u8 *hw_prio)
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{
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struct npc_mcam *mcam = &rvu->hw->mcam;
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u64 cam0, cam1, bank_cfg, cfg;
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int kw = 0, bank;
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u8 kw_type;
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npc_mcam_idx_2_key_type(rvu, index, &kw_type);
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if (npc_mcam_idx_2_key_type(rvu, index, &kw_type))
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return -EINVAL;
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bank = npc_get_bank(mcam, index);
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index &= (mcam->banksize - 1);
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@ -1298,6 +1315,8 @@ void npc_cn20k_read_mcam_entry(struct rvu *rvu, int blkaddr, u16 index,
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cfg = rvu_read64(rvu, blkaddr,
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NPC_AF_CN20K_MCAMEX_BANKX_ACTIONX_EXT(index, 0, 1));
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entry->vtag_action = cfg;
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return 0;
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}
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int rvu_mbox_handler_npc_cn20k_mcam_write_entry(struct rvu *rvu,
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@ -1335,11 +1354,10 @@ int rvu_mbox_handler_npc_cn20k_mcam_write_entry(struct rvu *rvu,
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if (is_pffunc_af(req->hdr.pcifunc))
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nix_intf = req->intf;
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npc_cn20k_config_mcam_entry(rvu, blkaddr, req->entry, nix_intf,
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&req->entry_data, req->enable_entry,
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req->hw_prio, req->req_kw_type);
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rc = npc_cn20k_config_mcam_entry(rvu, blkaddr, req->entry, nix_intf,
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&req->entry_data, req->enable_entry,
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req->hw_prio, req->req_kw_type);
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rc = 0;
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exit:
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mutex_unlock(&mcam->lock);
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return rc;
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@ -1361,11 +1379,13 @@ int rvu_mbox_handler_npc_cn20k_mcam_read_entry(struct rvu *rvu,
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mutex_lock(&mcam->lock);
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rc = npc_mcam_verify_entry(mcam, pcifunc, req->entry);
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if (!rc)
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npc_cn20k_read_mcam_entry(rvu, blkaddr, req->entry,
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&rsp->entry_data, &rsp->intf,
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&rsp->enable, &rsp->hw_prio);
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if (rc)
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goto fail;
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rc = npc_cn20k_read_mcam_entry(rvu, blkaddr, req->entry,
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&rsp->entry_data, &rsp->intf,
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&rsp->enable, &rsp->hw_prio);
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fail:
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mutex_unlock(&mcam->lock);
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return rc;
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}
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@ -1375,11 +1395,13 @@ int rvu_mbox_handler_npc_cn20k_mcam_alloc_and_write_entry(struct rvu *rvu,
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struct npc_mcam_alloc_and_write_entry_rsp *rsp)
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{
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struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, req->hdr.pcifunc);
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struct npc_mcam_free_entry_req free_req = { 0 };
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struct npc_mcam_alloc_entry_req entry_req;
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struct npc_mcam_alloc_entry_rsp entry_rsp;
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struct npc_mcam *mcam = &rvu->hw->mcam;
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u16 entry = NPC_MCAM_ENTRY_INVALID;
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int blkaddr, rc;
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struct msg_rsp free_rsp;
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int blkaddr, rc, err;
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u8 nix_intf;
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blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
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@ -1415,12 +1437,23 @@ int rvu_mbox_handler_npc_cn20k_mcam_alloc_and_write_entry(struct rvu *rvu,
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else
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nix_intf = pfvf->nix_rx_intf;
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npc_cn20k_config_mcam_entry(rvu, blkaddr, entry, nix_intf,
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&req->entry_data, req->enable_entry,
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req->hw_prio, req->req_kw_type);
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rc = npc_cn20k_config_mcam_entry(rvu, blkaddr, entry, nix_intf,
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&req->entry_data, req->enable_entry,
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req->hw_prio, req->req_kw_type);
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mutex_unlock(&mcam->lock);
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if (rc) {
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free_req.hdr.pcifunc = req->hdr.pcifunc;
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free_req.entry = entry_rsp.entry;
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err = rvu_mbox_handler_npc_mcam_free_entry(rvu, &free_req, &free_rsp);
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if (err)
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dev_err(rvu->dev,
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"%s: Error to free mcam idx %u\n",
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__func__, entry_rsp.entry);
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return rc;
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}
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rsp->entry = entry_rsp.entry;
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return 0;
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}
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@ -1480,9 +1513,9 @@ int rvu_mbox_handler_npc_cn20k_read_base_steer_rule(struct rvu *rvu,
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read_entry:
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/* Read the mcam entry */
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npc_cn20k_read_mcam_entry(rvu, blkaddr, index,
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&rsp->entry, &intf,
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&enable, &hw_prio);
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rc = npc_cn20k_read_mcam_entry(rvu, blkaddr, index,
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&rsp->entry, &intf,
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&enable, &hw_prio);
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mutex_unlock(&mcam->lock);
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out:
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return rc;
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@ -3607,9 +3640,30 @@ int npc_defrag_move_vdx_to_free(struct rvu *rvu,
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NPC_AF_CN20K_MCAMEX_BANKX_STAT_EXT(midx,
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bank));
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npc_cn20k_enable_mcam_entry(rvu, blkaddr, old_midx, false);
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npc_cn20k_copy_mcam_entry(rvu, blkaddr, old_midx, new_midx);
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npc_cn20k_enable_mcam_entry(rvu, blkaddr, new_midx, true);
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/* If bug happened during copy/enable mcam, then there is a bug in allocation
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* algorithm itself. There is no point in rewinding and returning, as it
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* will face further issue. Return error after printing error
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*/
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if (npc_cn20k_enable_mcam_entry(rvu, blkaddr, old_midx, false)) {
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dev_err(rvu->dev,
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"%s: Error happened while disabling old_mid=%u\n",
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__func__, old_midx);
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return -EFAULT;
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}
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if (npc_cn20k_copy_mcam_entry(rvu, blkaddr, old_midx, new_midx)) {
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dev_err(rvu->dev,
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"%s: Error happened while copying old_midx=%u new_midx=%u\n",
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__func__, old_midx, new_midx);
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return -EFAULT;
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}
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if (npc_cn20k_enable_mcam_entry(rvu, blkaddr, new_midx, true)) {
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dev_err(rvu->dev,
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"%s: Error happened while enabling new_mid=%u\n",
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__func__, new_midx);
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return -EFAULT;
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}
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midx = new_midx % mcam->banksize;
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bank = new_midx / mcam->banksize;
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@ -320,16 +320,16 @@ void npc_cn20k_dft_rules_free(struct rvu *rvu, u16 pcifunc);
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int npc_cn20k_dft_rules_idx_get(struct rvu *rvu, u16 pcifunc, u16 *bcast,
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u16 *mcast, u16 *promisc, u16 *ucast);
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void npc_cn20k_config_mcam_entry(struct rvu *rvu, int blkaddr, int index,
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u8 intf, struct cn20k_mcam_entry *entry,
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bool enable, u8 hw_prio, u8 req_kw_type);
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void npc_cn20k_enable_mcam_entry(struct rvu *rvu, int blkaddr,
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int index, bool enable);
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void npc_cn20k_copy_mcam_entry(struct rvu *rvu, int blkaddr,
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u16 src, u16 dest);
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void npc_cn20k_read_mcam_entry(struct rvu *rvu, int blkaddr, u16 index,
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struct cn20k_mcam_entry *entry, u8 *intf,
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u8 *ena, u8 *hw_prio);
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int npc_cn20k_config_mcam_entry(struct rvu *rvu, int blkaddr, int index,
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u8 intf, struct cn20k_mcam_entry *entry,
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bool enable, u8 hw_prio, u8 req_kw_type);
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int npc_cn20k_enable_mcam_entry(struct rvu *rvu, int blkaddr,
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int index, bool enable);
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int npc_cn20k_copy_mcam_entry(struct rvu *rvu, int blkaddr,
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u16 src, u16 dest);
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int npc_cn20k_read_mcam_entry(struct rvu *rvu, int blkaddr, u16 index,
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struct cn20k_mcam_entry *entry, u8 *intf,
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u8 *ena, u8 *hw_prio);
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void npc_cn20k_clear_mcam_entry(struct rvu *rvu, int blkaddr,
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int bank, int index);
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int npc_mcam_idx_2_key_type(struct rvu *rvu, u16 mcam_idx, u8 *key_type);
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|
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@ -241,7 +241,10 @@ void npc_enable_mcam_entry(struct rvu *rvu, struct npc_mcam *mcam,
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if (index < 0 || index >= mcam->banksize * mcam->banks)
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return;
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return npc_cn20k_enable_mcam_entry(rvu, blkaddr, index, enable);
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if (npc_cn20k_enable_mcam_entry(rvu, blkaddr, index, enable))
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dev_err(rvu->dev, "Error to %s mcam %u entry\n",
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enable ? "enable" : "disable", index);
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return;
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}
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index &= (mcam->banksize - 1);
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@ -589,8 +592,8 @@ void npc_read_mcam_entry(struct rvu *rvu, struct npc_mcam *mcam,
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NPC_AF_MCAMEX_BANKX_CFG(src, sbank)) & 1;
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}
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static void npc_copy_mcam_entry(struct rvu *rvu, struct npc_mcam *mcam,
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int blkaddr, u16 src, u16 dest)
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static int npc_copy_mcam_entry(struct rvu *rvu, struct npc_mcam *mcam,
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int blkaddr, u16 src, u16 dest)
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{
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int dbank = npc_get_bank(mcam, dest);
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int sbank = npc_get_bank(mcam, src);
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@ -630,6 +633,7 @@ static void npc_copy_mcam_entry(struct rvu *rvu, struct npc_mcam *mcam,
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NPC_AF_MCAMEX_BANKX_CFG(src, sbank));
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rvu_write64(rvu, blkaddr,
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NPC_AF_MCAMEX_BANKX_CFG(dest, dbank), cfg);
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return 0;
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}
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u64 npc_get_mcam_action(struct rvu *rvu, struct npc_mcam *mcam,
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@ -3266,7 +3270,10 @@ int rvu_mbox_handler_npc_mcam_shift_entry(struct rvu *rvu,
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npc_enable_mcam_entry(rvu, mcam, blkaddr, new_entry, false);
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/* Copy rule from old entry to new entry */
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npc_copy_mcam_entry(rvu, mcam, blkaddr, old_entry, new_entry);
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if (npc_copy_mcam_entry(rvu, mcam, blkaddr, old_entry, new_entry)) {
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rc = NPC_MCAM_INVALID_REQ;
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break;
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}
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/* Copy counter mapping, if any */
|
||||
cntr = mcam->entry2cntr_map[old_entry];
|
||||
|
|
@ -3284,7 +3291,8 @@ int rvu_mbox_handler_npc_mcam_shift_entry(struct rvu *rvu,
|
|||
|
||||
/* If shift has failed then report the failed index */
|
||||
if (index != req->shift_count) {
|
||||
rc = NPC_MCAM_PERM_DENIED;
|
||||
if (!rc)
|
||||
rc = NPC_MCAM_PERM_DENIED;
|
||||
rsp->failed_entry_idx = index;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -1980,13 +1980,15 @@ static int npc_update_dmac_value(struct rvu *rvu, int npcblkaddr,
|
|||
|
||||
ether_addr_copy(rule->packet.dmac, pfvf->mac_addr);
|
||||
|
||||
if (is_cn20k(rvu->pdev))
|
||||
npc_cn20k_read_mcam_entry(rvu, npcblkaddr, rule->entry,
|
||||
cn20k_entry, &intf,
|
||||
&enable, &hw_prio);
|
||||
else
|
||||
if (is_cn20k(rvu->pdev)) {
|
||||
if (npc_cn20k_read_mcam_entry(rvu, npcblkaddr, rule->entry,
|
||||
cn20k_entry, &intf,
|
||||
&enable, &hw_prio))
|
||||
return -EINVAL;
|
||||
} else {
|
||||
npc_read_mcam_entry(rvu, mcam, npcblkaddr, rule->entry,
|
||||
entry, &intf, &enable);
|
||||
}
|
||||
|
||||
npc_update_entry(rvu, NPC_DMAC, &mdata,
|
||||
ether_addr_to_u64(pfvf->mac_addr), 0,
|
||||
|
|
@ -2038,8 +2040,12 @@ void npc_mcam_enable_flows(struct rvu *rvu, u16 target)
|
|||
continue;
|
||||
}
|
||||
|
||||
if (rule->vfvlan_cfg)
|
||||
npc_update_dmac_value(rvu, blkaddr, rule, pfvf);
|
||||
if (rule->vfvlan_cfg) {
|
||||
if (npc_update_dmac_value(rvu, blkaddr, rule, pfvf))
|
||||
dev_err(rvu->dev,
|
||||
"Update dmac failed for %u, target=%#x\n",
|
||||
rule->entry, target);
|
||||
}
|
||||
|
||||
if (rule->rx_action.op == NIX_RX_ACTION_DEFAULT) {
|
||||
if (!def_ucast_rule)
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user