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arm64: dts: exynosautov920: add cpucl1/2 clock DT nodes

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Add cmu_cpucl1/2(CPU Cluster 1 and CPU Cluster 2) clocks
for switch, cluster domains respectively.

Signed-off-by: Shin Son <shin.son@samsung.com>
Link: https://lore.kernel.org/r/20250428113517.426987-5-shin.son@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
This commit is contained in:
Shin Son 2025-04-28 20:35:17 +09:00 committed by Krzysztof Kozlowski
parent 2a4067c89e
commit aa833db4b8
1 changed files with 26 additions and 0 deletions
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26
arch/arm64/boot/dts/exynos/exynosautov920.dtsi
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@ -1090,6 +1090,32 @@ cmu_cpucl0: clock-controller@1ec00000 {
"cluster",
"dbg";
};
cmu_cpucl1: clock-controller@1ed00000 {
compatible = "samsung,exynosautov920-cmu-cpucl1";
reg = <0x1ed00000 0x8000>;
#clock-cells = <1>;
clocks = <&xtcxo>,
<&cmu_top DOUT_CLKCMU_CPUCL1_SWITCH>,
<&cmu_top DOUT_CLKCMU_CPUCL1_CLUSTER>;
clock-names = "oscclk",
"switch",
"cluster";
};
cmu_cpucl2: clock-controller@1ee00000 {
compatible = "samsung,exynosautov920-cmu-cpucl2";
reg = <0x1ee00000 0x8000>;
#clock-cells = <1>;
clocks = <&xtcxo>,
<&cmu_top DOUT_CLKCMU_CPUCL2_SWITCH>,
<&cmu_top DOUT_CLKCMU_CPUCL2_CLUSTER>;
clock-names = "oscclk",
"switch",
"cluster";
};
};
timer {