From 36df0ef3b4187c69c271af7a1d56f7abb788655e Mon Sep 17 00:00:00 2001 From: Sheetal Date: Wed, 18 Mar 2026 07:11:29 +0000 Subject: [PATCH 1/5] bus: tegra-aconnect: Use dev_err_probe for probe error paths Convert probe error handling to use dev_err_probe() which provides proper handling of -EPROBE_DEFER. Signed-off-by: Sheetal Reviewed-by: Jon Hunter Signed-off-by: Thierry Reding --- drivers/bus/tegra-aconnect.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/drivers/bus/tegra-aconnect.c b/drivers/bus/tegra-aconnect.c index 90e3b0a10816..9b2b227332b2 100644 --- a/drivers/bus/tegra-aconnect.c +++ b/drivers/bus/tegra-aconnect.c @@ -32,16 +32,14 @@ static int tegra_aconnect_probe(struct platform_device *pdev) return -ENOMEM; aconnect->ape_clk = devm_clk_get(&pdev->dev, "ape"); - if (IS_ERR(aconnect->ape_clk)) { - dev_err(&pdev->dev, "Can't retrieve ape clock\n"); - return PTR_ERR(aconnect->ape_clk); - } + if (IS_ERR(aconnect->ape_clk)) + return dev_err_probe(&pdev->dev, PTR_ERR(aconnect->ape_clk), + "can't retrieve ape clock\n"); aconnect->apb2ape_clk = devm_clk_get(&pdev->dev, "apb2ape"); - if (IS_ERR(aconnect->apb2ape_clk)) { - dev_err(&pdev->dev, "Can't retrieve apb2ape clock\n"); - return PTR_ERR(aconnect->apb2ape_clk); - } + if (IS_ERR(aconnect->apb2ape_clk)) + return dev_err_probe(&pdev->dev, PTR_ERR(aconnect->apb2ape_clk), + "can't retrieve apb2ape clock\n"); dev_set_drvdata(&pdev->dev, aconnect); pm_runtime_enable(&pdev->dev); From 912f0e6f274d5e1e0bfb241ae826f5522e0d49e8 Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Fri, 16 Jan 2026 20:18:36 +0100 Subject: [PATCH 2/5] MAINTAINERS: Move Peter De Schrijver to CREDITS Peter sadly passed away a while back. Paul did a much better job at finding the right words to mourn this loss than I ever could, so I will leave this link here: https://lore.kernel.org/lkml/alpine.DEB.2.21.999.2407240345480.11116@utopia.booyaka.com/T/#u Co-developed-by: Paul Walmsley Signed-off-by: Paul Walmsley Co-developed-by: Aaro Koskinen Signed-off-by: Aaro Koskinen Co-developed-by: Geert Uytterhoeven Signed-off-by: Geert Uytterhoeven Signed-off-by: Thierry Reding --- CREDITS | 10 ++++++++++ MAINTAINERS | 1 - 2 files changed, 10 insertions(+), 1 deletion(-) diff --git a/CREDITS b/CREDITS index 17962bdd6dbd..29bafdc47866 100644 --- a/CREDITS +++ b/CREDITS @@ -3668,7 +3668,17 @@ D: Macintosh IDE Driver N: Peter De Schrijver E: stud11@cc4.kuleuven.ac.be +E: p2@mind.be +E: peter.de-schrijver@nokia.com +E: pdeschrijver@nvidia.com +E: p2@psychaos.be +D: Apollo Domain workstations +D: Ariadne and Hydra Amiga Ethernet drivers +D: IBM PS/2, Microchannel, and Token Ring support D: Mitsumi CD-ROM driver patches March version +D: TWL4030 power management and audio codec driver +D: OMAP power management +D: NVIDIA Tegra clock and BPMP drivers, among many other things S: Molenbaan 29 S: B2240 Zandhoven S: Belgium diff --git a/MAINTAINERS b/MAINTAINERS index 2fb1c75afd16..1ce2f83b6e68 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -26194,7 +26194,6 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux.git N: [^a-z]tegra TEGRA CLOCK DRIVER -M: Peter De Schrijver M: Prashant Gaikwad S: Supported F: drivers/clk/tegra/ From 18c620ff671004a356b174e5f6d494fa449ce57c Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Fri, 17 Apr 2026 15:05:10 +0200 Subject: [PATCH 3/5] Documentation: ABI: Take over as contact for sysfs-driver-tegra-fuse Peter sadly passed away a while ago, so I'll be taking over as contact for this ABI documentation. Suggested-by: Geert Uytterhoeven Signed-off-by: Thierry Reding --- Documentation/ABI/testing/sysfs-driver-tegra-fuse | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/ABI/testing/sysfs-driver-tegra-fuse b/Documentation/ABI/testing/sysfs-driver-tegra-fuse index b8936fad2ccf..47d5513100f6 100644 --- a/Documentation/ABI/testing/sysfs-driver-tegra-fuse +++ b/Documentation/ABI/testing/sysfs-driver-tegra-fuse @@ -1,6 +1,6 @@ What: /sys/devices/*//fuse Date: February 2014 -Contact: Peter De Schrijver +Contact: Thierry Reding Description: read-only access to the efuses on Tegra20, Tegra30, Tegra114 and Tegra124 SoC's from NVIDIA. The efuses contain write once data programmed at the factory. The data is laid out in 32bit From 8a3571618c2e3f339b5b6fee5841143face58a2b Mon Sep 17 00:00:00 2001 From: Kartik Rajput Date: Thu, 14 May 2026 11:18:31 +0530 Subject: [PATCH 4/5] soc/tegra: fuse: Register nvmem lookups at probe Register nvmem lookups in tegra_fuse_probe(), after the nvmem device has been registered, since they can only be used after the nvmem device is registered. Signed-off-by: Kartik Rajput Signed-off-by: Thierry Reding --- drivers/soc/tegra/fuse/fuse-tegra.c | 14 +++++--------- 1 file changed, 5 insertions(+), 9 deletions(-) diff --git a/drivers/soc/tegra/fuse/fuse-tegra.c b/drivers/soc/tegra/fuse/fuse-tegra.c index 291484595dcf..071cd9620634 100644 --- a/drivers/soc/tegra/fuse/fuse-tegra.c +++ b/drivers/soc/tegra/fuse/fuse-tegra.c @@ -182,10 +182,6 @@ static int tegra_fuse_probe(struct platform_device *pdev) } fuse->soc->init(fuse); - - err = tegra_fuse_add_lookups(fuse); - if (err) - return dev_err_probe(&pdev->dev, err, "failed to add FUSE lookups\n"); } fuse->clk = devm_clk_get_optional(&pdev->dev, "fuse"); @@ -231,6 +227,10 @@ static int tegra_fuse_probe(struct platform_device *pdev) return err; } + err = tegra_fuse_add_lookups(fuse); + if (err) + return dev_err_probe(&pdev->dev, err, "failed to add FUSE lookups\n"); + fuse->rst = devm_reset_control_get_optional(&pdev->dev, "fuse"); if (IS_ERR(fuse->rst)) return dev_err_probe(&pdev->dev, PTR_ERR(fuse->rst), "failed to get FUSE reset\n"); @@ -473,7 +473,7 @@ static int __init tegra_init_fuse(void) const struct of_device_id *match; struct device_node *np; struct resource regs; - int err; + int err = 0; tegra_init_apbmisc(); @@ -566,10 +566,6 @@ static int __init tegra_init_fuse(void) tegra_fuse_print_sku_info(&tegra_sku_info); - err = tegra_fuse_add_lookups(fuse); - if (err) - pr_err("failed to add FUSE lookups\n"); - return err; } early_initcall(tegra_init_fuse); From 8b8ee2e56f951ccf41d98eebe73195cea487cd48 Mon Sep 17 00:00:00 2001 From: Kartik Rajput Date: Thu, 14 May 2026 11:00:41 +0530 Subject: [PATCH 5/5] soc/tegra: Use ARM SMCCC to get chip ID, revision, and platform info Tegra410 and Tegra241 deprecate the HIDREV register. The recommended method is to use ARM SMCCC to retrieve the chip ID, major and minor revisions, and platform information. Prefer ARM SMCCC when the platform supports it; fall back to HIDREV otherwise. Behavior on older Tegra SoCs that do not support ARM SMCCC remains unchanged. Signed-off-by: Kartik Rajput Signed-off-by: Thierry Reding --- drivers/soc/tegra/fuse/tegra-apbmisc.c | 40 +++++++++++++++++++++++--- 1 file changed, 36 insertions(+), 4 deletions(-) diff --git a/drivers/soc/tegra/fuse/tegra-apbmisc.c b/drivers/soc/tegra/fuse/tegra-apbmisc.c index 0ce94fdc536f..87ae63a7e52d 100644 --- a/drivers/soc/tegra/fuse/tegra-apbmisc.c +++ b/drivers/soc/tegra/fuse/tegra-apbmisc.c @@ -4,6 +4,7 @@ */ #include +#include #include #include #include @@ -27,6 +28,11 @@ #define PMC_STRAPPING_OPT_A_RAM_CODE_MASK_SHORT \ (0x3 << PMC_STRAPPING_OPT_A_RAM_CODE_SHIFT) +#define TEGRA_SMCCC_PLATFORM(x) (((x) >> 8) & 0xff) +#define TEGRA_SMCCC_CHIP_ID(x) (((x) >> 4) & 0xff) +#define TEGRA_SMCCC_MAJOR_REV(x) ((x) & 0xf) +#define TEGRA_SMCCC_MINOR_REV(x) ((x) & 0xf) + static void __iomem *apbmisc_base; static bool long_ram_code; static u32 strapping; @@ -34,28 +40,56 @@ static u32 chipid; u32 tegra_read_chipid(void) { - WARN(!chipid, "Tegra APB MISC not yet available\n"); + WARN(!apbmisc_base, "Tegra APB MISC not yet available\n"); + + if (!chipid) + chipid = readl_relaxed(apbmisc_base + 4); return chipid; } u8 tegra_get_chip_id(void) { +#if IS_ENABLED(CONFIG_HAVE_ARM_SMCCC_DISCOVERY) + s32 soc_id = arm_smccc_get_soc_id_version(); + + if (soc_id >= 0) + return TEGRA_SMCCC_CHIP_ID(soc_id); +#endif return (tegra_read_chipid() >> 8) & 0xff; } u8 tegra_get_major_rev(void) { +#if IS_ENABLED(CONFIG_HAVE_ARM_SMCCC_DISCOVERY) + s32 soc_id = arm_smccc_get_soc_id_version(); + + if (soc_id >= 0) + return TEGRA_SMCCC_MAJOR_REV(soc_id); +#endif return (tegra_read_chipid() >> 4) & 0xf; } u8 tegra_get_minor_rev(void) { +#if IS_ENABLED(CONFIG_HAVE_ARM_SMCCC_DISCOVERY) + s32 revision = arm_smccc_get_soc_id_revision(); + + if (revision >= 0) + return TEGRA_SMCCC_MINOR_REV(revision); +#endif return (tegra_read_chipid() >> 16) & 0xf; + } u8 tegra_get_platform(void) { +#if IS_ENABLED(CONFIG_HAVE_ARM_SMCCC_DISCOVERY) + s32 revision = arm_smccc_get_soc_id_revision(); + + if (revision >= 0) + return TEGRA_SMCCC_PLATFORM(revision); +#endif return (tegra_read_chipid() >> 20) & 0xf; } @@ -170,9 +204,7 @@ static void tegra_init_apbmisc_resources(struct resource *apbmisc, void __iomem *strapping_base; apbmisc_base = ioremap(apbmisc->start, resource_size(apbmisc)); - if (apbmisc_base) - chipid = readl_relaxed(apbmisc_base + 4); - else + if (!apbmisc_base) pr_err("failed to map APBMISC registers\n"); strapping_base = ioremap(straps->start, resource_size(straps));