mirror of
https://github.com/torvalds/linux.git
synced 2026-08-01 03:59:40 +02:00
Merge drm/drm-next into drm-intel-next
A backmerge to sync xe and i915 and allow us to merge "Enable display support for Battlemage" series through drm-intel Link: https://patchwork.freedesktop.org/series/132429/ Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
This commit is contained in:
commit
aa66c93d5f
21
.mailmap
21
.mailmap
|
|
@ -20,6 +20,7 @@ Adam Oldham <oldhamca@gmail.com>
|
|||
Adam Radford <aradford@gmail.com>
|
||||
Adriana Reus <adi.reus@gmail.com> <adriana.reus@intel.com>
|
||||
Adrian Bunk <bunk@stusta.de>
|
||||
Ajay Kaher <ajay.kaher@broadcom.com> <akaher@vmware.com>
|
||||
Akhil P Oommen <quic_akhilpo@quicinc.com> <akhilpo@codeaurora.org>
|
||||
Alan Cox <alan@lxorguk.ukuu.org.uk>
|
||||
Alan Cox <root@hraefn.swansea.linux.org.uk>
|
||||
|
|
@ -36,6 +37,17 @@ Alexei Avshalom Lazar <quic_ailizaro@quicinc.com> <ailizaro@codeaurora.org>
|
|||
Alexei Starovoitov <ast@kernel.org> <alexei.starovoitov@gmail.com>
|
||||
Alexei Starovoitov <ast@kernel.org> <ast@fb.com>
|
||||
Alexei Starovoitov <ast@kernel.org> <ast@plumgrid.com>
|
||||
Alexey Makhalov <alexey.amakhalov@broadcom.com> <amakhalov@vmware.com>
|
||||
Alex Elder <elder@kernel.org>
|
||||
Alex Elder <elder@kernel.org> <aelder@sgi.com>
|
||||
Alex Elder <elder@kernel.org> <alex.elder@linaro.org>
|
||||
Alex Elder <elder@kernel.org> <alex.elder@linary.org>
|
||||
Alex Elder <elder@kernel.org> <elder@dreamhost.com>
|
||||
Alex Elder <elder@kernel.org> <elder@dreawmhost.com>
|
||||
Alex Elder <elder@kernel.org> <elder@ieee.org>
|
||||
Alex Elder <elder@kernel.org> <elder@inktank.com>
|
||||
Alex Elder <elder@kernel.org> <elder@linaro.org>
|
||||
Alex Elder <elder@kernel.org> <elder@newdream.net>
|
||||
Alex Hung <alexhung@gmail.com> <alex.hung@canonical.com>
|
||||
Alex Shi <alexs@kernel.org> <alex.shi@intel.com>
|
||||
Alex Shi <alexs@kernel.org> <alex.shi@linaro.org>
|
||||
|
|
@ -96,6 +108,8 @@ Ben Widawsky <bwidawsk@kernel.org> <ben@bwidawsk.net>
|
|||
Ben Widawsky <bwidawsk@kernel.org> <ben.widawsky@intel.com>
|
||||
Ben Widawsky <bwidawsk@kernel.org> <benjamin.widawsky@intel.com>
|
||||
Benjamin Poirier <benjamin.poirier@gmail.com> <bpoirier@suse.de>
|
||||
Benjamin Tissoires <bentiss@kernel.org> <benjamin.tissoires@gmail.com>
|
||||
Benjamin Tissoires <bentiss@kernel.org> <benjamin.tissoires@redhat.com>
|
||||
Bjorn Andersson <andersson@kernel.org> <bjorn@kryo.se>
|
||||
Bjorn Andersson <andersson@kernel.org> <bjorn.andersson@linaro.org>
|
||||
Bjorn Andersson <andersson@kernel.org> <bjorn.andersson@sonymobile.com>
|
||||
|
|
@ -110,6 +124,7 @@ Brendan Higgins <brendan.higgins@linux.dev> <brendanhiggins@google.com>
|
|||
Brian Avery <b.avery@hp.com>
|
||||
Brian King <brking@us.ibm.com>
|
||||
Brian Silverman <bsilver16384@gmail.com> <brian.silverman@bluerivertech.com>
|
||||
Bryan Tan <bryan-bt.tan@broadcom.com> <bryantan@vmware.com>
|
||||
Cai Huoqing <cai.huoqing@linux.dev> <caihuoqing@baidu.com>
|
||||
Can Guo <quic_cang@quicinc.com> <cang@codeaurora.org>
|
||||
Carl Huang <quic_cjhuang@quicinc.com> <cjhuang@codeaurora.org>
|
||||
|
|
@ -443,7 +458,8 @@ Mythri P K <mythripk@ti.com>
|
|||
Nadav Amit <nadav.amit@gmail.com> <namit@vmware.com>
|
||||
Nadav Amit <nadav.amit@gmail.com> <namit@cs.technion.ac.il>
|
||||
Nadia Yvette Chambers <nyc@holomorphy.com> William Lee Irwin III <wli@holomorphy.com>
|
||||
Naoya Horiguchi <naoya.horiguchi@nec.com> <n-horiguchi@ah.jp.nec.com>
|
||||
Naoya Horiguchi <nao.horiguchi@gmail.com> <n-horiguchi@ah.jp.nec.com>
|
||||
Naoya Horiguchi <nao.horiguchi@gmail.com> <naoya.horiguchi@nec.com>
|
||||
Nathan Chancellor <nathan@kernel.org> <natechancellor@gmail.com>
|
||||
Neeraj Upadhyay <quic_neeraju@quicinc.com> <neeraju@codeaurora.org>
|
||||
Neil Armstrong <neil.armstrong@linaro.org> <narmstrong@baylibre.com>
|
||||
|
|
@ -521,6 +537,7 @@ Rémi Denis-Courmont <rdenis@simphalempin.com>
|
|||
Ricardo Ribalda <ribalda@kernel.org> <ricardo@ribalda.com>
|
||||
Ricardo Ribalda <ribalda@kernel.org> Ricardo Ribalda Delgado <ribalda@kernel.org>
|
||||
Ricardo Ribalda <ribalda@kernel.org> <ricardo.ribalda@gmail.com>
|
||||
Richard Genoud <richard.genoud@bootlin.com> <richard.genoud@gmail.com>
|
||||
Richard Leitner <richard.leitner@linux.dev> <dev@g0hl1n.net>
|
||||
Richard Leitner <richard.leitner@linux.dev> <me@g0hl1n.net>
|
||||
Richard Leitner <richard.leitner@linux.dev> <richard.leitner@skidata.com>
|
||||
|
|
@ -529,6 +546,7 @@ Rocky Liao <quic_rjliao@quicinc.com> <rjliao@codeaurora.org>
|
|||
Roman Gushchin <roman.gushchin@linux.dev> <guro@fb.com>
|
||||
Roman Gushchin <roman.gushchin@linux.dev> <guroan@gmail.com>
|
||||
Roman Gushchin <roman.gushchin@linux.dev> <klamm@yandex-team.ru>
|
||||
Ronak Doshi <ronak.doshi@broadcom.com> <doshir@vmware.com>
|
||||
Muchun Song <muchun.song@linux.dev> <songmuchun@bytedance.com>
|
||||
Muchun Song <muchun.song@linux.dev> <smuchun@gmail.com>
|
||||
Ross Zwisler <zwisler@kernel.org> <ross.zwisler@linux.intel.com>
|
||||
|
|
@ -651,6 +669,7 @@ Viresh Kumar <vireshk@kernel.org> <viresh.kumar@st.com>
|
|||
Viresh Kumar <vireshk@kernel.org> <viresh.linux@gmail.com>
|
||||
Viresh Kumar <viresh.kumar@linaro.org> <viresh.kumar@linaro.org>
|
||||
Viresh Kumar <viresh.kumar@linaro.org> <viresh.kumar@linaro.com>
|
||||
Vishnu Dasa <vishnu.dasa@broadcom.com> <vdasa@vmware.com>
|
||||
Vivek Aknurwar <quic_viveka@quicinc.com> <viveka@codeaurora.org>
|
||||
Vivien Didelot <vivien.didelot@gmail.com> <vivien.didelot@savoirfairelinux.com>
|
||||
Vlad Dogaru <ddvlad@gmail.com> <vlad.dogaru@intel.com>
|
||||
|
|
|
|||
4
CREDITS
4
CREDITS
|
|
@ -3146,6 +3146,10 @@ S: Triftstra=DFe 55
|
|||
S: 13353 Berlin
|
||||
S: Germany
|
||||
|
||||
N: Gustavo Pimental
|
||||
E: gustavo.pimentel@synopsys.com
|
||||
D: PCI driver for Synopsys DesignWare
|
||||
|
||||
N: Emanuel Pirker
|
||||
E: epirker@edu.uni-klu.ac.at
|
||||
D: AIC5800 IEEE 1394, RAW I/O on 1394
|
||||
|
|
|
|||
|
|
@ -10,7 +10,7 @@ Description: RW. Card reactive sustained (PL1) power limit in microwatts.
|
|||
power limit is disabled, writing 0 disables the
|
||||
limit. Writing values > 0 and <= TDP will enable the power limit.
|
||||
|
||||
Only supported for particular Intel xe graphics platforms.
|
||||
Only supported for particular Intel Xe graphics platforms.
|
||||
|
||||
What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/power1_rated_max
|
||||
Date: September 2023
|
||||
|
|
@ -18,53 +18,93 @@ KernelVersion: 6.5
|
|||
Contact: intel-xe@lists.freedesktop.org
|
||||
Description: RO. Card default power limit (default TDP setting).
|
||||
|
||||
Only supported for particular Intel xe graphics platforms.
|
||||
Only supported for particular Intel Xe graphics platforms.
|
||||
|
||||
What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/power1_crit
|
||||
Date: September 2023
|
||||
KernelVersion: 6.5
|
||||
Contact: intel-xe@lists.freedesktop.org
|
||||
Description: RW. Card reactive critical (I1) power limit in microwatts.
|
||||
|
||||
Card reactive critical (I1) power limit in microwatts is exposed
|
||||
for client products. The power controller will throttle the
|
||||
operating frequency if the power averaged over a window exceeds
|
||||
this limit.
|
||||
|
||||
Only supported for particular Intel xe graphics platforms.
|
||||
|
||||
What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/curr1_crit
|
||||
Date: September 2023
|
||||
KernelVersion: 6.5
|
||||
Contact: intel-xe@lists.freedesktop.org
|
||||
Description: RW. Card reactive critical (I1) power limit in milliamperes.
|
||||
|
||||
Card reactive critical (I1) power limit in milliamperes is
|
||||
exposed for server products. The power controller will throttle
|
||||
the operating frequency if the power averaged over a window
|
||||
exceeds this limit.
|
||||
|
||||
What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/in0_input
|
||||
Date: September 2023
|
||||
KernelVersion: 6.5
|
||||
Contact: intel-xe@lists.freedesktop.org
|
||||
Description: RO. Current Voltage in millivolt.
|
||||
|
||||
Only supported for particular Intel xe graphics platforms.
|
||||
|
||||
What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/energy1_input
|
||||
Date: September 2023
|
||||
KernelVersion: 6.5
|
||||
Contact: intel-xe@lists.freedesktop.org
|
||||
Description: RO. Energy input of device in microjoules.
|
||||
Description: RO. Card energy input of device in microjoules.
|
||||
|
||||
Only supported for particular Intel xe graphics platforms.
|
||||
Only supported for particular Intel Xe graphics platforms.
|
||||
|
||||
What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/power1_max_interval
|
||||
Date: October 2023
|
||||
KernelVersion: 6.6
|
||||
Contact: intel-xe@lists.freedesktop.org
|
||||
Description: RW. Sustained power limit interval (Tau in PL1/Tau) in
|
||||
Description: RW. Card sustained power limit interval (Tau in PL1/Tau) in
|
||||
milliseconds over which sustained power is averaged.
|
||||
|
||||
Only supported for particular Intel xe graphics platforms.
|
||||
Only supported for particular Intel Xe graphics platforms.
|
||||
|
||||
What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/power2_max
|
||||
Date: February 2024
|
||||
KernelVersion: 6.8
|
||||
Contact: intel-xe@lists.freedesktop.org
|
||||
Description: RW. Package reactive sustained (PL1) power limit in microwatts.
|
||||
|
||||
The power controller will throttle the operating frequency
|
||||
if the power averaged over a window (typically seconds)
|
||||
exceeds this limit. A read value of 0 means that the PL1
|
||||
power limit is disabled, writing 0 disables the
|
||||
limit. Writing values > 0 and <= TDP will enable the power limit.
|
||||
|
||||
Only supported for particular Intel Xe graphics platforms.
|
||||
|
||||
What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/power2_rated_max
|
||||
Date: February 2024
|
||||
KernelVersion: 6.8
|
||||
Contact: intel-xe@lists.freedesktop.org
|
||||
Description: RO. Package default power limit (default TDP setting).
|
||||
|
||||
Only supported for particular Intel Xe graphics platforms.
|
||||
|
||||
What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/power2_crit
|
||||
Date: February 2024
|
||||
KernelVersion: 6.8
|
||||
Contact: intel-xe@lists.freedesktop.org
|
||||
Description: RW. Package reactive critical (I1) power limit in microwatts.
|
||||
|
||||
Package reactive critical (I1) power limit in microwatts is exposed
|
||||
for client products. The power controller will throttle the
|
||||
operating frequency if the power averaged over a window exceeds
|
||||
this limit.
|
||||
|
||||
Only supported for particular Intel Xe graphics platforms.
|
||||
|
||||
What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/curr2_crit
|
||||
Date: February 2024
|
||||
KernelVersion: 6.8
|
||||
Contact: intel-xe@lists.freedesktop.org
|
||||
Description: RW. Package reactive critical (I1) power limit in milliamperes.
|
||||
|
||||
Package reactive critical (I1) power limit in milliamperes is
|
||||
exposed for server products. The power controller will throttle
|
||||
the operating frequency if the power averaged over a window
|
||||
exceeds this limit.
|
||||
|
||||
What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/energy2_input
|
||||
Date: February 2024
|
||||
KernelVersion: 6.8
|
||||
Contact: intel-xe@lists.freedesktop.org
|
||||
Description: RO. Package energy input of device in microjoules.
|
||||
|
||||
Only supported for particular Intel Xe graphics platforms.
|
||||
|
||||
What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/power2_max_interval
|
||||
Date: February 2024
|
||||
KernelVersion: 6.8
|
||||
Contact: intel-xe@lists.freedesktop.org
|
||||
Description: RW. Package sustained power limit interval (Tau in PL1/Tau) in
|
||||
milliseconds over which sustained power is averaged.
|
||||
|
||||
Only supported for particular Intel Xe graphics platforms.
|
||||
|
||||
What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/in1_input
|
||||
Date: February 2024
|
||||
KernelVersion: 6.8
|
||||
Contact: intel-xe@lists.freedesktop.org
|
||||
Description: RO. Package current voltage in millivolt.
|
||||
|
||||
Only supported for particular Intel Xe graphics platforms.
|
||||
|
|
|
|||
10
Documentation/ABI/testing/sysfs-driver-panfrost-profiling
Normal file
10
Documentation/ABI/testing/sysfs-driver-panfrost-profiling
Normal file
|
|
@ -0,0 +1,10 @@
|
|||
What: /sys/bus/platform/drivers/panfrost/.../profiling
|
||||
Date: February 2024
|
||||
KernelVersion: 6.8.0
|
||||
Contact: Adrian Larumbe <adrian.larumbe@collabora.com>
|
||||
Description:
|
||||
Get/set drm fdinfo's engine and cycles profiling status.
|
||||
Valid values are:
|
||||
0: Don't enable fdinfo job profiling sources.
|
||||
1: Enable fdinfo job profiling sources, this enables both the GPU's
|
||||
timestamp and cycle counter registers.
|
||||
|
|
@ -138,11 +138,10 @@ associated with the source address of the indirect branch. Specifically,
|
|||
the BHB might be shared across privilege levels even in the presence of
|
||||
Enhanced IBRS.
|
||||
|
||||
Currently the only known real-world BHB attack vector is via
|
||||
unprivileged eBPF. Therefore, it's highly recommended to not enable
|
||||
unprivileged eBPF, especially when eIBRS is used (without retpolines).
|
||||
For a full mitigation against BHB attacks, it's recommended to use
|
||||
retpolines (or eIBRS combined with retpolines).
|
||||
Previously the only known real-world BHB attack vector was via unprivileged
|
||||
eBPF. Further research has found attacks that don't require unprivileged eBPF.
|
||||
For a full mitigation against BHB attacks it is recommended to set BHI_DIS_S or
|
||||
use the BHB clearing sequence.
|
||||
|
||||
Attack scenarios
|
||||
----------------
|
||||
|
|
@ -430,6 +429,23 @@ The possible values in this file are:
|
|||
'PBRSB-eIBRS: Not affected' CPU is not affected by PBRSB
|
||||
=========================== =======================================================
|
||||
|
||||
- Branch History Injection (BHI) protection status:
|
||||
|
||||
.. list-table::
|
||||
|
||||
* - BHI: Not affected
|
||||
- System is not affected
|
||||
* - BHI: Retpoline
|
||||
- System is protected by retpoline
|
||||
* - BHI: BHI_DIS_S
|
||||
- System is protected by BHI_DIS_S
|
||||
* - BHI: SW loop, KVM SW loop
|
||||
- System is protected by software clearing sequence
|
||||
* - BHI: Vulnerable
|
||||
- System is vulnerable to BHI
|
||||
* - BHI: Vulnerable, KVM: SW loop
|
||||
- System is vulnerable; KVM is protected by software clearing sequence
|
||||
|
||||
Full mitigation might require a microcode update from the CPU
|
||||
vendor. When the necessary microcode is not available, the kernel will
|
||||
report vulnerability.
|
||||
|
|
@ -484,7 +500,11 @@ Spectre variant 2
|
|||
|
||||
Systems which support enhanced IBRS (eIBRS) enable IBRS protection once at
|
||||
boot, by setting the IBRS bit, and they're automatically protected against
|
||||
Spectre v2 variant attacks.
|
||||
some Spectre v2 variant attacks. The BHB can still influence the choice of
|
||||
indirect branch predictor entry, and although branch predictor entries are
|
||||
isolated between modes when eIBRS is enabled, the BHB itself is not isolated
|
||||
between modes. Systems which support BHI_DIS_S will set it to protect against
|
||||
BHI attacks.
|
||||
|
||||
On Intel's enhanced IBRS systems, this includes cross-thread branch target
|
||||
injections on SMT systems (STIBP). In other words, Intel eIBRS enables
|
||||
|
|
@ -638,6 +658,18 @@ kernel command line.
|
|||
spectre_v2=off. Spectre variant 1 mitigations
|
||||
cannot be disabled.
|
||||
|
||||
spectre_bhi=
|
||||
|
||||
[X86] Control mitigation of Branch History Injection
|
||||
(BHI) vulnerability. This setting affects the deployment
|
||||
of the HW BHI control and the SW BHB clearing sequence.
|
||||
|
||||
on
|
||||
(default) Enable the HW or SW mitigation as
|
||||
needed.
|
||||
off
|
||||
Disable the mitigation.
|
||||
|
||||
For spectre_v2_user see Documentation/admin-guide/kernel-parameters.txt
|
||||
|
||||
Mitigation selection guide
|
||||
|
|
|
|||
|
|
@ -3423,6 +3423,9 @@
|
|||
arch-independent options, each of which is an
|
||||
aggregation of existing arch-specific options.
|
||||
|
||||
Note, "mitigations" is supported if and only if the
|
||||
kernel was built with CPU_MITIGATIONS=y.
|
||||
|
||||
off
|
||||
Disable all optional CPU mitigations. This
|
||||
improves system performance, but it may also
|
||||
|
|
@ -3444,6 +3447,7 @@
|
|||
retbleed=off [X86]
|
||||
spec_rstack_overflow=off [X86]
|
||||
spec_store_bypass_disable=off [X86,PPC]
|
||||
spectre_bhi=off [X86]
|
||||
spectre_v2_user=off [X86]
|
||||
srbds=off [X86,INTEL]
|
||||
ssbd=force-off [ARM64]
|
||||
|
|
@ -6063,6 +6067,15 @@
|
|||
sonypi.*= [HW] Sony Programmable I/O Control Device driver
|
||||
See Documentation/admin-guide/laptops/sonypi.rst
|
||||
|
||||
spectre_bhi= [X86] Control mitigation of Branch History Injection
|
||||
(BHI) vulnerability. This setting affects the
|
||||
deployment of the HW BHI control and the SW BHB
|
||||
clearing sequence.
|
||||
|
||||
on - (default) Enable the HW or SW mitigation
|
||||
as needed.
|
||||
off - Disable the mitigation.
|
||||
|
||||
spectre_v2= [X86,EARLY] Control mitigation of Spectre variant 2
|
||||
(indirect branch speculation) vulnerability.
|
||||
The default operation protects the kernel from
|
||||
|
|
@ -6599,7 +6612,7 @@
|
|||
To turn off having tracepoints sent to printk,
|
||||
echo 0 > /proc/sys/kernel/tracepoint_printk
|
||||
Note, echoing 1 into this file without the
|
||||
tracepoint_printk kernel cmdline option has no effect.
|
||||
tp_printk kernel cmdline option has no effect.
|
||||
|
||||
The tp_printk_stop_on_boot (see below) can also be used
|
||||
to stop the printing of events to console at
|
||||
|
|
|
|||
|
|
@ -155,7 +155,7 @@ Setting this parameter to 100 will disable the hysteresis.
|
|||
|
||||
Some users cannot tolerate the swapping that comes with zswap store failures
|
||||
and zswap writebacks. Swapping can be disabled entirely (without disabling
|
||||
zswap itself) on a cgroup-basis as follows:
|
||||
zswap itself) on a cgroup-basis as follows::
|
||||
|
||||
echo 0 > /sys/fs/cgroup/<cgroup-name>/memory.zswap.writeback
|
||||
|
||||
|
|
@ -166,7 +166,7 @@ writeback (because the same pages might be rejected again and again).
|
|||
When there is a sizable amount of cold memory residing in the zswap pool, it
|
||||
can be advantageous to proactively write these cold pages to swap and reclaim
|
||||
the memory for other use cases. By default, the zswap shrinker is disabled.
|
||||
User can enable it as follows:
|
||||
User can enable it as follows::
|
||||
|
||||
echo Y > /sys/module/zswap/parameters/shrinker_enabled
|
||||
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -104,6 +104,8 @@ Some of these tools are listed below:
|
|||
KASAN and can be used in production. See Documentation/dev-tools/kfence.rst
|
||||
* lockdep is a locking correctness validator. See
|
||||
Documentation/locking/lockdep-design.rst
|
||||
* Runtime Verification (RV) supports checking specific behaviours for a given
|
||||
subsystem. See Documentation/trace/rv/runtime-verification.rst
|
||||
* There are several other pieces of debug instrumentation in the kernel, many
|
||||
of which can be found in lib/Kconfig.debug
|
||||
|
||||
|
|
|
|||
|
|
@ -1,5 +1,3 @@
|
|||
Status: Unstable - ABI compatibility may be broken in the future
|
||||
|
||||
Binding for Keystone gate control driver which uses PSC controller IP.
|
||||
|
||||
This binding uses the common clock binding[1].
|
||||
|
|
|
|||
|
|
@ -1,5 +1,3 @@
|
|||
Status: Unstable - ABI compatibility may be broken in the future
|
||||
|
||||
Binding for keystone PLLs. The main PLL IP typically has a multiplier,
|
||||
a divider and a post divider. The additional PLL IPs like ARMPLL, DDRPLL
|
||||
and PAPLL are controlled by the memory mapped register where as the Main
|
||||
|
|
|
|||
|
|
@ -1,7 +1,5 @@
|
|||
Binding for Texas Instruments ADPLL clock.
|
||||
|
||||
Binding status: Unstable - ABI compatibility may be broken in the future
|
||||
|
||||
This binding uses the common clock binding[1]. It assumes a
|
||||
register-mapped ADPLL with two to three selectable input clocks
|
||||
and three to four children.
|
||||
|
|
|
|||
|
|
@ -1,7 +1,5 @@
|
|||
Binding for Texas Instruments APLL clock.
|
||||
|
||||
Binding status: Unstable - ABI compatibility may be broken in the future
|
||||
|
||||
This binding uses the common clock binding[1]. It assumes a
|
||||
register-mapped APLL with usually two selectable input clocks
|
||||
(reference clock and bypass clock), with analog phase locked
|
||||
|
|
|
|||
|
|
@ -1,7 +1,5 @@
|
|||
Binding for Texas Instruments autoidle clock.
|
||||
|
||||
Binding status: Unstable - ABI compatibility may be broken in the future
|
||||
|
||||
This binding uses the common clock binding[1]. It assumes a register mapped
|
||||
clock which can be put to idle automatically by hardware based on the usage
|
||||
and a configuration bit setting. Autoidle clock is never an individual
|
||||
|
|
|
|||
|
|
@ -1,7 +1,5 @@
|
|||
Binding for Texas Instruments clockdomain.
|
||||
|
||||
Binding status: Unstable - ABI compatibility may be broken in the future
|
||||
|
||||
This binding uses the common clock binding[1] in consumer role.
|
||||
Every clock on TI SoC belongs to one clockdomain, but software
|
||||
only needs this information for specific clocks which require
|
||||
|
|
|
|||
|
|
@ -1,7 +1,5 @@
|
|||
Binding for TI composite clock.
|
||||
|
||||
Binding status: Unstable - ABI compatibility may be broken in the future
|
||||
|
||||
This binding uses the common clock binding[1]. It assumes a
|
||||
register-mapped composite clock with multiple different sub-types;
|
||||
|
||||
|
|
|
|||
|
|
@ -1,7 +1,5 @@
|
|||
Binding for TI divider clock
|
||||
|
||||
Binding status: Unstable - ABI compatibility may be broken in the future
|
||||
|
||||
This binding uses the common clock binding[1]. It assumes a
|
||||
register-mapped adjustable clock rate divider that does not gate and has
|
||||
only one input clock or parent. By default the value programmed into
|
||||
|
|
|
|||
|
|
@ -1,7 +1,5 @@
|
|||
Binding for Texas Instruments DPLL clock.
|
||||
|
||||
Binding status: Unstable - ABI compatibility may be broken in the future
|
||||
|
||||
This binding uses the common clock binding[1]. It assumes a
|
||||
register-mapped DPLL with usually two selectable input clocks
|
||||
(reference clock and bypass clock), with digital phase locked
|
||||
|
|
|
|||
|
|
@ -1,7 +1,5 @@
|
|||
Binding for Texas Instruments FAPLL clock.
|
||||
|
||||
Binding status: Unstable - ABI compatibility may be broken in the future
|
||||
|
||||
This binding uses the common clock binding[1]. It assumes a
|
||||
register-mapped FAPLL with usually two selectable input clocks
|
||||
(reference clock and bypass clock), and one or more child
|
||||
|
|
|
|||
|
|
@ -1,7 +1,5 @@
|
|||
Binding for TI fixed factor rate clock sources.
|
||||
|
||||
Binding status: Unstable - ABI compatibility may be broken in the future
|
||||
|
||||
This binding uses the common clock binding[1], and also uses the autoidle
|
||||
support from TI autoidle clock [2].
|
||||
|
||||
|
|
|
|||
|
|
@ -1,7 +1,5 @@
|
|||
Binding for Texas Instruments gate clock.
|
||||
|
||||
Binding status: Unstable - ABI compatibility may be broken in the future
|
||||
|
||||
This binding uses the common clock binding[1]. This clock is
|
||||
quite much similar to the basic gate-clock [2], however,
|
||||
it supports a number of additional features. If no register
|
||||
|
|
|
|||
|
|
@ -1,7 +1,5 @@
|
|||
Binding for Texas Instruments interface clock.
|
||||
|
||||
Binding status: Unstable - ABI compatibility may be broken in the future
|
||||
|
||||
This binding uses the common clock binding[1]. This clock is
|
||||
quite much similar to the basic gate-clock [2], however,
|
||||
it supports a number of additional features, including
|
||||
|
|
|
|||
|
|
@ -1,7 +1,5 @@
|
|||
Binding for TI mux clock.
|
||||
|
||||
Binding status: Unstable - ABI compatibility may be broken in the future
|
||||
|
||||
This binding uses the common clock binding[1]. It assumes a
|
||||
register-mapped multiplexer with multiple input clock signals or
|
||||
parents, one of which can be selected as output. This clock does not
|
||||
|
|
|
|||
|
|
@ -9,6 +9,9 @@ title: ITE it6505
|
|||
maintainers:
|
||||
- Allen Chen <allen.chen@ite.com.tw>
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/sound/dai-common.yaml#
|
||||
|
||||
description: |
|
||||
The IT6505 is a high-performance DisplayPort 1.1a transmitter,
|
||||
fully compliant with DisplayPort 1.1a, HDCP 1.3 specifications.
|
||||
|
|
@ -52,6 +55,9 @@ properties:
|
|||
maxItems: 1
|
||||
description: extcon specifier for the Power Delivery
|
||||
|
||||
"#sound-dai-cells":
|
||||
const: 0
|
||||
|
||||
ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
|
|
@ -105,7 +111,7 @@ required:
|
|||
- extcon
|
||||
- ports
|
||||
|
||||
additionalProperties: false
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
|
|
|
|||
|
|
@ -41,6 +41,7 @@ properties:
|
|||
- enum:
|
||||
- ti,ds90cf364a # For the DS90CF364A FPD-Link LVDS Receiver
|
||||
- ti,ds90cf384a # For the DS90CF384A FPD-Link LVDS Receiver
|
||||
- ti,sn65lvds94 # For the SN65DS94 LVDS serdes
|
||||
- const: lvds-decoder # Generic LVDS decoders compatible fallback
|
||||
- enum:
|
||||
- thine,thc63lvdm83d # For the THC63LVDM83D LVDS serializer
|
||||
|
|
|
|||
|
|
@ -0,0 +1,55 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/bridge/microchip,sam9x75-lvds.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Microchip SAM9X75 LVDS Controller
|
||||
|
||||
maintainers:
|
||||
- Dharma Balasubiramani <dharma.b@microchip.com>
|
||||
|
||||
description:
|
||||
The Low Voltage Differential Signaling Controller (LVDSC) manages data
|
||||
format conversion from the LCD Controller internal DPI bus to OpenLDI
|
||||
LVDS output signals. LVDSC functions include bit mapping, balanced mode
|
||||
management, and serializer.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: microchip,sam9x75-lvds
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Peripheral Bus Clock
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: pclk
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/clock/at91.h>
|
||||
lvds-controller@f8060000 {
|
||||
compatible = "microchip,sam9x75-lvds";
|
||||
reg = <0xf8060000 0x100>;
|
||||
interrupts = <56 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 56>;
|
||||
clock-names = "pclk";
|
||||
};
|
||||
|
|
@ -10,7 +10,7 @@ maintainers:
|
|||
- Vinay Simha BN <simhavcs@gmail.com>
|
||||
|
||||
description: |
|
||||
This binding supports DSI to LVDS bridge TC358775
|
||||
This binding supports DSI to LVDS bridges TC358765 and TC358775
|
||||
|
||||
MIPI DSI-RX Data 4-lane, CLK 1-lane with data rates up to 800 Mbps/lane.
|
||||
Video frame size:
|
||||
|
|
@ -21,7 +21,9 @@ description: |
|
|||
|
||||
properties:
|
||||
compatible:
|
||||
const: toshiba,tc358775
|
||||
enum:
|
||||
- toshiba,tc358765
|
||||
- toshiba,tc358775
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
|
@ -46,11 +48,27 @@ properties:
|
|||
|
||||
properties:
|
||||
port@0:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
$ref: /schemas/graph.yaml#/$defs/port-base
|
||||
unevaluatedProperties: false
|
||||
description: |
|
||||
DSI Input. The remote endpoint phandle should be a
|
||||
reference to a valid mipi_dsi_host device node.
|
||||
|
||||
properties:
|
||||
endpoint:
|
||||
$ref: /schemas/media/video-interfaces.yaml#
|
||||
unevaluatedProperties: false
|
||||
|
||||
properties:
|
||||
data-lanes:
|
||||
description: array of physical DSI data lane indexes.
|
||||
minItems: 1
|
||||
items:
|
||||
- const: 1
|
||||
- const: 2
|
||||
- const: 3
|
||||
- const: 4
|
||||
|
||||
port@1:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: |
|
||||
|
|
@ -70,10 +88,19 @@ required:
|
|||
- reg
|
||||
- vdd-supply
|
||||
- vddio-supply
|
||||
- stby-gpios
|
||||
- reset-gpios
|
||||
- ports
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: toshiba,tc358765
|
||||
then:
|
||||
properties:
|
||||
stby-gpios: false
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
|
|
@ -108,6 +135,7 @@ examples:
|
|||
reg = <0>;
|
||||
d2l_in_test: endpoint {
|
||||
remote-endpoint = <&dsi0_out>;
|
||||
data-lanes = <1 2 3 4>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -132,7 +160,6 @@ examples:
|
|||
reg = <1>;
|
||||
dsi0_out: endpoint {
|
||||
remote-endpoint = <&d2l_in_test>;
|
||||
data-lanes = <0 1 2 3>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -167,6 +194,7 @@ examples:
|
|||
reg = <0>;
|
||||
d2l_in_dual: endpoint {
|
||||
remote-endpoint = <&dsi0_out_dual>;
|
||||
data-lanes = <1 2 3 4>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -198,7 +226,6 @@ examples:
|
|||
reg = <1>;
|
||||
dsi0_out_dual: endpoint {
|
||||
remote-endpoint = <&d2l_in_dual>;
|
||||
data-lanes = <0 1 2 3>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -24,6 +24,7 @@ properties:
|
|||
- enum:
|
||||
- mediatek,mt8173-disp-gamma
|
||||
- mediatek,mt8183-disp-gamma
|
||||
- mediatek,mt8195-disp-gamma
|
||||
- items:
|
||||
- enum:
|
||||
- mediatek,mt6795-disp-gamma
|
||||
|
|
@ -35,6 +36,10 @@ properties:
|
|||
- mediatek,mt8192-disp-gamma
|
||||
- mediatek,mt8195-disp-gamma
|
||||
- const: mediatek,mt8183-disp-gamma
|
||||
- items:
|
||||
- enum:
|
||||
- mediatek,mt8188-disp-gamma
|
||||
- const: mediatek,mt8195-disp-gamma
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
|
|
|||
|
|
@ -53,6 +53,15 @@ patternProperties:
|
|||
compatible:
|
||||
const: qcom,sm8150-dpu
|
||||
|
||||
"^displayport-controller@[0-9a-f]+$":
|
||||
type: object
|
||||
additionalProperties: true
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: qcom,sm8150-dp
|
||||
|
||||
"^dsi@[0-9a-f]+$":
|
||||
type: object
|
||||
additionalProperties: true
|
||||
|
|
|
|||
|
|
@ -19,6 +19,7 @@ properties:
|
|||
- ampire,am8001280g
|
||||
- bananapi,lhr050h41
|
||||
- feixin,k101-im2byl02
|
||||
- startek,kd050hdfia020
|
||||
- tdo,tl050hdv35
|
||||
- wanchanglong,w552946aba
|
||||
- const: ilitek,ili9881c
|
||||
|
|
|
|||
|
|
@ -0,0 +1,62 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/lg,sw43408.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: LG SW43408 1080x2160 DSI panel
|
||||
|
||||
maintainers:
|
||||
- Caleb Connolly <caleb.connolly@linaro.org>
|
||||
|
||||
description:
|
||||
This panel is used on the Pixel 3, it is a 60hz OLED panel which
|
||||
required DSC (Display Stream Compression) and has rounded corners.
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- const: lg,sw43408
|
||||
|
||||
reg: true
|
||||
port: true
|
||||
vddi-supply: true
|
||||
vpnl-supply: true
|
||||
reset-gpios: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- vddi-supply
|
||||
- vpnl-supply
|
||||
- reset-gpios
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
dsi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
panel@0 {
|
||||
compatible = "lg,sw43408";
|
||||
reg = <0>;
|
||||
|
||||
vddi-supply = <&vreg_l14a_1p88>;
|
||||
vpnl-supply = <&vreg_l28a_3p0>;
|
||||
|
||||
reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>;
|
||||
|
||||
port {
|
||||
endpoint {
|
||||
remote-endpoint = <&mdss_dsi0_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
...
|
||||
|
|
@ -19,7 +19,7 @@ description: |
|
|||
either bilinear interpolation or pixel duplication.
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
- $ref: panel-common-dual.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
|
|
@ -59,6 +59,7 @@ required:
|
|||
- avee-supply
|
||||
- dvdd-supply
|
||||
- vddio-supply
|
||||
- ports
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
|
|
|
|||
|
|
@ -14,9 +14,6 @@ description: |
|
|||
panels. Support video mode panels from China Star Optoelectronics
|
||||
Technology (CSOT) and BOE Technology.
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
|
|
@ -38,7 +35,6 @@ properties:
|
|||
description: regulator that supplies the I/O voltage
|
||||
|
||||
reg: true
|
||||
ports: true
|
||||
rotation: true
|
||||
backlight: true
|
||||
|
||||
|
|
@ -47,7 +43,26 @@ required:
|
|||
- reg
|
||||
- vddio-supply
|
||||
- reset-gpios
|
||||
- ports
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common-dual.yaml#
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- novatek,nt36523w
|
||||
then:
|
||||
properties:
|
||||
ports:
|
||||
properties:
|
||||
port@1: false
|
||||
else:
|
||||
properties:
|
||||
port: false
|
||||
ports:
|
||||
required:
|
||||
- port@1
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,47 @@
|
|||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/panel-common-dual.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Common Properties for Dual-Link Display Panels
|
||||
|
||||
maintainers:
|
||||
- Thierry Reding <thierry.reding@gmail.com>
|
||||
- Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
|
||||
|
||||
description:
|
||||
Properties common for Panel IC supporting dual link panels. Devices might
|
||||
support also single link.
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
port@0:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: First link
|
||||
|
||||
port@1:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: Second link
|
||||
|
||||
"#address-cells": true
|
||||
"#size-cells": true
|
||||
|
||||
required:
|
||||
- port@0
|
||||
|
||||
# Single-panel setups are still allowed.
|
||||
oneOf:
|
||||
- required:
|
||||
- ports
|
||||
- required:
|
||||
- port
|
||||
|
||||
additionalProperties: true
|
||||
|
|
@ -36,6 +36,8 @@ properties:
|
|||
- jdi,fhd-r63452
|
||||
# Khadas TS050 5" 1080x1920 LCD panel
|
||||
- khadas,ts050
|
||||
# Khadas TS050 V2 5" 1080x1920 LCD panel
|
||||
- khadas,ts050v2
|
||||
# Kingdisplay KD097D04 9.7" 1536x2048 TFT LCD panel
|
||||
- kingdisplay,kd097d04
|
||||
# LG ACX467AKM-7 4.95" 1080×1920 LCD Panel
|
||||
|
|
@ -50,6 +52,8 @@ properties:
|
|||
- panasonic,vvx10f004b00
|
||||
# Panasonic 10" WUXGA TFT LCD panel
|
||||
- panasonic,vvx10f034n00
|
||||
# Samsung s6e3fa7 1080x2220 based AMS559NK06 AMOLED panel
|
||||
- samsung,s6e3fa7-ams559nk06
|
||||
# Samsung s6e3fc2x01 1080x2340 AMOLED panel
|
||||
- samsung,s6e3fc2x01
|
||||
# Samsung sofef00 1080x2280 AMOLED panel
|
||||
|
|
|
|||
|
|
@ -91,6 +91,8 @@ properties:
|
|||
- boe,nv133fhm-n62
|
||||
# BOE NV140FHM-N49 14.0" FHD a-Si FT panel
|
||||
- boe,nv140fhmn49
|
||||
# Crystal Clear Technology CMT430B19N00 4.3" 480x272 TFT-LCD panel
|
||||
- cct,cmt430b19n00
|
||||
# CDTech(H.K.) Electronics Limited 4.3" 480x272 color TFT-LCD panel
|
||||
- cdtech,s043wq26h-ct7
|
||||
# CDTech(H.K.) Electronics Limited 7" WSVGA (1024x600) TFT LCD Panel
|
||||
|
|
@ -188,6 +190,8 @@ properties:
|
|||
- innolux,g121i1-l01
|
||||
# Innolux Corporation 12.1" G121X1-L03 XGA (1024x768) TFT LCD panel
|
||||
- innolux,g121x1-l03
|
||||
# Innolux Corporation 12.1" G121XCE-L01 XGA (1024x768) TFT LCD panel
|
||||
- innolux,g121xce-l01
|
||||
# Innolux Corporation 11.6" WXGA (1366x768) TFT LCD panel
|
||||
- innolux,n116bca-ea1
|
||||
# Innolux Corporation 11.6" WXGA (1366x768) TFT LCD panel
|
||||
|
|
@ -272,6 +276,8 @@ properties:
|
|||
- osddisplays,osd070t1718-19ts
|
||||
# One Stop Displays OSD101T2045-53TS 10.1" 1920x1200 panel
|
||||
- osddisplays,osd101t2045-53ts
|
||||
# POWERTIP PH128800T006-ZHC01 10.1" WXGA TFT LCD panel
|
||||
- powertip,ph128800t006-zhc01
|
||||
# POWERTIP PH800480T013-IDF2 7.0" WVGA TFT LCD panel
|
||||
- powertip,ph800480t013-idf02
|
||||
# QiaoDian XianShi Corporation 4"3 TFT LCD panel
|
||||
|
|
|
|||
|
|
@ -0,0 +1,89 @@
|
|||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/raydium,rm69380.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Raydium RM69380-based DSI display panels
|
||||
|
||||
maintainers:
|
||||
- David Wronek <david@mainlining.org>
|
||||
|
||||
description:
|
||||
The Raydium RM69380 is a generic DSI panel IC used to control
|
||||
OLED panels.
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common-dual.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- lenovo,j716f-edo-rm69380
|
||||
- const: raydium,rm69380
|
||||
description: This indicates the panel manufacturer of the panel
|
||||
that is in turn using the RM69380 panel driver. The compatible
|
||||
string determines how the RM69380 panel driver shall be configured
|
||||
to work with the indicated panel. The raydium,rm69380 compatible shall
|
||||
always be provided as a fallback.
|
||||
|
||||
avdd-supply:
|
||||
description: Analog voltage rail
|
||||
|
||||
vddio-supply:
|
||||
description: I/O voltage rail
|
||||
|
||||
reset-gpios:
|
||||
maxItems: 1
|
||||
description: phandle of gpio for reset line - This should be active low
|
||||
|
||||
reg: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- avdd-supply
|
||||
- vddio-supply
|
||||
- reset-gpios
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
dsi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
panel@0 {
|
||||
compatible = "lenovo,j716f-edo-rm69380", "raydium,rm69380";
|
||||
reg = <0>;
|
||||
|
||||
avdd-supply = <&panel_avdd_regulator>;
|
||||
vddio-supply = <&vreg_l14a>;
|
||||
reset-gpios = <&tlmm 75 GPIO_ACTIVE_LOW>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
panel_in_0: endpoint {
|
||||
remote-endpoint = <&mdss_dsi0_out>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
panel_in_1: endpoint {
|
||||
remote-endpoint = <&mdss_dsi1_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
|
|
@ -22,6 +22,8 @@ properties:
|
|||
enum:
|
||||
# Anberic RG353V-V2 5.0" 640x480 TFT LCD panel
|
||||
- anbernic,rg353v-panel-v2
|
||||
# GameForce Chi 3.5" 640x480 TFT LCD panel
|
||||
- gameforce,chi-panel
|
||||
# Powkiddy RGB10MAX3 5.0" 720x1280 TFT LCD panel
|
||||
- powkiddy,rgb10max3-panel
|
||||
# Powkiddy RGB30 3.0" 720x720 TFT LCD panel
|
||||
|
|
|
|||
|
|
@ -23,6 +23,8 @@ properties:
|
|||
reg: true
|
||||
|
||||
backlight: true
|
||||
width-mm: true
|
||||
height-mm: true
|
||||
|
||||
vddio-supply:
|
||||
description: VDDIO 1.8V supply
|
||||
|
|
|
|||
|
|
@ -15,6 +15,7 @@ description: |
|
|||
|
||||
allOf:
|
||||
- $ref: ../bridge/synopsys,dw-hdmi.yaml#
|
||||
- $ref: /schemas/sound/dai-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
|
|
@ -124,6 +125,9 @@ properties:
|
|||
description:
|
||||
phandle to the GRF to mux vopl/vopb.
|
||||
|
||||
"#sound-dai-cells":
|
||||
const: 0
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
|
@ -153,6 +157,7 @@ examples:
|
|||
ddc-i2c-bus = <&i2c5>;
|
||||
power-domains = <&power RK3288_PD_VIO>;
|
||||
rockchip,grf = <&grf>;
|
||||
#sound-dai-cells = <0>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
|
|
|
|||
|
|
@ -37,6 +37,9 @@ properties:
|
|||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
"#sound-dai-cells":
|
||||
const: 0
|
||||
|
||||
ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
|
|
@ -66,6 +69,7 @@ required:
|
|||
- ports
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/sound/dai-common.yaml#
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
|
|
@ -106,6 +110,7 @@ examples:
|
|||
clock-names = "pclk";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&hdmi_ctl>;
|
||||
#sound-dai-cells = <0>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
|
|
|
|||
|
|
@ -10,6 +10,9 @@ maintainers:
|
|||
- Sandy Huang <hjc@rock-chips.com>
|
||||
- Heiko Stuebner <heiko@sntech.de>
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/sound/dai-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: rockchip,rk3066-hdmi
|
||||
|
|
@ -34,6 +37,9 @@ properties:
|
|||
description:
|
||||
This soc uses GRF regs to switch the HDMI TX input between vop0 and vop1.
|
||||
|
||||
"#sound-dai-cells":
|
||||
const: 0
|
||||
|
||||
ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
|
|
@ -83,6 +89,7 @@ examples:
|
|||
pinctrl-names = "default";
|
||||
power-domains = <&power RK3066_PD_VIO>;
|
||||
rockchip,grf = <&grf>;
|
||||
#sound-dai-cells = <0>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
|
|
|
|||
|
|
@ -144,6 +144,8 @@ Example::
|
|||
#dma-cells = <1>;
|
||||
clocks = <&clock_controller 0>, <&clock_controller 1>;
|
||||
clock-names = "bus", "host";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
vendor,custom-property = <2>;
|
||||
status = "disabled";
|
||||
|
||||
|
|
|
|||
|
|
@ -68,14 +68,10 @@ properties:
|
|||
pattern: cs16$
|
||||
- items:
|
||||
pattern: c32$
|
||||
- items:
|
||||
pattern: c32d-wl$
|
||||
- items:
|
||||
pattern: cs32$
|
||||
- items:
|
||||
pattern: c64$
|
||||
- items:
|
||||
pattern: c64d-wl$
|
||||
- items:
|
||||
pattern: cs64$
|
||||
- items:
|
||||
|
|
@ -136,6 +132,7 @@ properties:
|
|||
- renesas,r1ex24128
|
||||
- samsung,s524ad0xd1
|
||||
- const: atmel,24c128
|
||||
- pattern: '^atmel,24c(32|64)d-wl$' # Actual vendor is st
|
||||
|
||||
label:
|
||||
description: Descriptive name of the EEPROM.
|
||||
|
|
|
|||
147
Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml
Normal file
147
Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml
Normal file
|
|
@ -0,0 +1,147 @@
|
|||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/gpu/arm,mali-valhall-csf.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ARM Mali Valhall GPU
|
||||
|
||||
maintainers:
|
||||
- Liviu Dudau <liviu.dudau@arm.com>
|
||||
- Boris Brezillon <boris.brezillon@collabora.com>
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
pattern: '^gpu@[a-f0-9]+$'
|
||||
|
||||
compatible:
|
||||
oneOf:
|
||||
- items:
|
||||
- enum:
|
||||
- rockchip,rk3588-mali
|
||||
- const: arm,mali-valhall-csf # Mali Valhall GPU model/revision is fully discoverable
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
items:
|
||||
- description: Job interrupt
|
||||
- description: MMU interrupt
|
||||
- description: GPU interrupt
|
||||
|
||||
interrupt-names:
|
||||
items:
|
||||
- const: job
|
||||
- const: mmu
|
||||
- const: gpu
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
maxItems: 3
|
||||
|
||||
clock-names:
|
||||
minItems: 1
|
||||
items:
|
||||
- const: core
|
||||
- const: coregroup
|
||||
- const: stacks
|
||||
|
||||
mali-supply: true
|
||||
|
||||
operating-points-v2: true
|
||||
opp-table:
|
||||
type: object
|
||||
|
||||
power-domains:
|
||||
minItems: 1
|
||||
maxItems: 5
|
||||
|
||||
power-domain-names:
|
||||
minItems: 1
|
||||
maxItems: 5
|
||||
|
||||
sram-supply: true
|
||||
|
||||
"#cooling-cells":
|
||||
const: 2
|
||||
|
||||
dynamic-power-coefficient:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description:
|
||||
A u32 value that represents the running time dynamic
|
||||
power coefficient in units of uW/MHz/V^2. The
|
||||
coefficient can either be calculated from power
|
||||
measurements or derived by analysis.
|
||||
|
||||
The dynamic power consumption of the GPU is
|
||||
proportional to the square of the Voltage (V) and
|
||||
the clock frequency (f). The coefficient is used to
|
||||
calculate the dynamic power as below -
|
||||
|
||||
Pdyn = dynamic-power-coefficient * V^2 * f
|
||||
|
||||
where voltage is in V, frequency is in MHz.
|
||||
|
||||
dma-coherent: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
- clocks
|
||||
- mali-supply
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: rockchip,rk3588-mali
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 3
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
power-domain-names: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/rockchip,rk3588-cru.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/power/rk3588-power.h>
|
||||
|
||||
gpu: gpu@fb000000 {
|
||||
compatible = "rockchip,rk3588-mali", "arm,mali-valhall-csf";
|
||||
reg = <0xfb000000 0x200000>;
|
||||
interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH 0>,
|
||||
<GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH 0>,
|
||||
<GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
interrupt-names = "job", "mmu", "gpu";
|
||||
clock-names = "core", "coregroup", "stacks";
|
||||
clocks = <&cru CLK_GPU>, <&cru CLK_GPU_COREGROUP>,
|
||||
<&cru CLK_GPU_STACKS>;
|
||||
power-domains = <&power RK3588_PD_GPU>;
|
||||
operating-points-v2 = <&gpu_opp_table>;
|
||||
mali-supply = <&vdd_gpu_s0>;
|
||||
sram-supply = <&vdd_gpu_mem_s0>;
|
||||
|
||||
gpu_opp_table: opp-table {
|
||||
compatible = "operating-points-v2";
|
||||
opp-300000000 {
|
||||
opp-hz = /bits/ 64 <300000000>;
|
||||
opp-microvolt = <675000 675000 850000>;
|
||||
};
|
||||
opp-400000000 {
|
||||
opp-hz = /bits/ 64 <400000000>;
|
||||
opp-microvolt = <675000 675000 850000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
|
|
@ -94,6 +94,10 @@ properties:
|
|||
|
||||
local-bd-address: true
|
||||
|
||||
qcom,local-bd-address-broken:
|
||||
type: boolean
|
||||
description:
|
||||
boot firmware is incorrectly passing the address in big-endian order
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
|
|
|||
|
|
@ -52,6 +52,9 @@ properties:
|
|||
- const: main
|
||||
- const: mm
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
|
|
|||
|
|
@ -1,9 +1,6 @@
|
|||
TI Davinci DSP devices
|
||||
=======================
|
||||
|
||||
Binding status: Unstable - Subject to changes for DT representation of clocks
|
||||
and resets
|
||||
|
||||
The TI Davinci family of SoCs usually contains a TI DSP Core sub-system that
|
||||
is used to offload some of the processor-intensive tasks or algorithms, for
|
||||
achieving various system level goals.
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
|||
title: Atmel Universal Synchronous Asynchronous Receiver/Transmitter (USART)
|
||||
|
||||
maintainers:
|
||||
- Richard Genoud <richard.genoud@gmail.com>
|
||||
- Richard Genoud <richard.genoud@bootlin.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
|
|
|
|||
|
|
@ -51,7 +51,7 @@ properties:
|
|||
ranges: true
|
||||
|
||||
patternProperties:
|
||||
"^clock-controller@[0-9a-z]+$":
|
||||
"^clock-controller@[0-9a-f]+$":
|
||||
$ref: /schemas/clock/fsl,flexspi-clock.yaml#
|
||||
|
||||
required:
|
||||
|
|
|
|||
|
|
@ -41,7 +41,7 @@ properties:
|
|||
ranges: true
|
||||
|
||||
patternProperties:
|
||||
"^interrupt-controller@[a-z0-9]+$":
|
||||
"^interrupt-controller@[a-f0-9]+$":
|
||||
$ref: /schemas/interrupt-controller/fsl,ls-extirq.yaml#
|
||||
|
||||
required:
|
||||
|
|
|
|||
|
|
@ -171,6 +171,7 @@ allOf:
|
|||
unevaluatedProperties: false
|
||||
|
||||
pcie-phy:
|
||||
type: object
|
||||
description:
|
||||
Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt
|
||||
|
||||
|
|
|
|||
|
|
@ -60,7 +60,7 @@ properties:
|
|||
be implemented in an always-on power domain."
|
||||
|
||||
patternProperties:
|
||||
'^frame@[0-9a-z]*$':
|
||||
'^frame@[0-9a-f]+$':
|
||||
type: object
|
||||
additionalProperties: false
|
||||
description: A timer node has up to 8 frame sub-nodes, each with the following properties.
|
||||
|
|
|
|||
|
|
@ -27,10 +27,13 @@ properties:
|
|||
- qcom,msm8996-ufshc
|
||||
- qcom,msm8998-ufshc
|
||||
- qcom,sa8775p-ufshc
|
||||
- qcom,sc7180-ufshc
|
||||
- qcom,sc7280-ufshc
|
||||
- qcom,sc8180x-ufshc
|
||||
- qcom,sc8280xp-ufshc
|
||||
- qcom,sdm845-ufshc
|
||||
- qcom,sm6115-ufshc
|
||||
- qcom,sm6125-ufshc
|
||||
- qcom,sm6350-ufshc
|
||||
- qcom,sm8150-ufshc
|
||||
- qcom,sm8250-ufshc
|
||||
|
|
@ -42,11 +45,11 @@ properties:
|
|||
- const: jedec,ufs-2.0
|
||||
|
||||
clocks:
|
||||
minItems: 8
|
||||
minItems: 7
|
||||
maxItems: 11
|
||||
|
||||
clock-names:
|
||||
minItems: 8
|
||||
minItems: 7
|
||||
maxItems: 11
|
||||
|
||||
dma-coherent: true
|
||||
|
|
@ -112,6 +115,31 @@ required:
|
|||
allOf:
|
||||
- $ref: ufs-common.yaml
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sc7180-ufshc
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 7
|
||||
maxItems: 7
|
||||
clock-names:
|
||||
items:
|
||||
- const: core_clk
|
||||
- const: bus_aggr_clk
|
||||
- const: iface_clk
|
||||
- const: core_clk_unipro
|
||||
- const: ref_clk
|
||||
- const: tx_lane0_sync_clk
|
||||
- const: rx_lane0_sync_clk
|
||||
reg:
|
||||
maxItems: 1
|
||||
reg-names:
|
||||
maxItems: 1
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
|
|
@ -120,6 +148,7 @@ allOf:
|
|||
- qcom,msm8998-ufshc
|
||||
- qcom,sa8775p-ufshc
|
||||
- qcom,sc7280-ufshc
|
||||
- qcom,sc8180x-ufshc
|
||||
- qcom,sc8280xp-ufshc
|
||||
- qcom,sm8250-ufshc
|
||||
- qcom,sm8350-ufshc
|
||||
|
|
@ -215,6 +244,7 @@ allOf:
|
|||
contains:
|
||||
enum:
|
||||
- qcom,sm6115-ufshc
|
||||
- qcom,sm6125-ufshc
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
|
|
@ -248,7 +278,7 @@ allOf:
|
|||
reg:
|
||||
maxItems: 1
|
||||
clocks:
|
||||
minItems: 8
|
||||
minItems: 7
|
||||
maxItems: 8
|
||||
else:
|
||||
properties:
|
||||
|
|
@ -256,7 +286,7 @@ allOf:
|
|||
minItems: 1
|
||||
maxItems: 2
|
||||
clocks:
|
||||
minItems: 8
|
||||
minItems: 7
|
||||
maxItems: 11
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
|
|
|||
|
|
@ -256,6 +256,8 @@ patternProperties:
|
|||
description: Catalyst Semiconductor, Inc.
|
||||
"^cavium,.*":
|
||||
description: Cavium, Inc.
|
||||
"^cct,.*":
|
||||
description: Crystal Clear Technology Sdn. Bhd.
|
||||
"^cdns,.*":
|
||||
description: Cadence Design Systems Inc.
|
||||
"^cdtech,.*":
|
||||
|
|
@ -529,6 +531,8 @@ patternProperties:
|
|||
description: FX Technology Ltd.
|
||||
"^galaxycore,.*":
|
||||
description: GalaxyCore Inc.
|
||||
"^gameforce,.*":
|
||||
description: GameForce
|
||||
"^gardena,.*":
|
||||
description: GARDENA GmbH
|
||||
"^gateway,.*":
|
||||
|
|
|
|||
|
|
@ -77,7 +77,7 @@ consider though:
|
|||
the usual size discover pattern size = SEEK_END(0); SEEK_SET(0). Every other
|
||||
llseek operation will report -EINVAL.
|
||||
|
||||
If llseek on dma-buf FDs isn't support the kernel will report -ESPIPE for all
|
||||
If llseek on dma-buf FDs isn't supported the kernel will report -ESPIPE for all
|
||||
cases. Userspace can use this to detect support for discovering the dma-buf
|
||||
size using llseek.
|
||||
|
||||
|
|
|
|||
|
|
@ -97,7 +97,6 @@ like this::
|
|||
|
||||
static struct virtio_driver virtio_dummy_driver = {
|
||||
.driver.name = KBUILD_MODNAME,
|
||||
.driver.owner = THIS_MODULE,
|
||||
.id_table = id_table,
|
||||
.probe = virtio_dummy_probe,
|
||||
.remove = virtio_dummy_remove,
|
||||
|
|
|
|||
11
Documentation/filesystems/bcachefs/index.rst
Normal file
11
Documentation/filesystems/bcachefs/index.rst
Normal file
|
|
@ -0,0 +1,11 @@
|
|||
.. SPDX-License-Identifier: GPL-2.0
|
||||
|
||||
======================
|
||||
bcachefs Documentation
|
||||
======================
|
||||
|
||||
.. toctree::
|
||||
:maxdepth: 2
|
||||
:numbered:
|
||||
|
||||
errorcodes
|
||||
|
|
@ -69,6 +69,7 @@ Documentation for filesystem implementations.
|
|||
afs
|
||||
autofs
|
||||
autofs-mount-control
|
||||
bcachefs/index
|
||||
befs
|
||||
bfs
|
||||
btrfs
|
||||
|
|
|
|||
80
Documentation/gpu/amdgpu/debugging.rst
Normal file
80
Documentation/gpu/amdgpu/debugging.rst
Normal file
|
|
@ -0,0 +1,80 @@
|
|||
===============
|
||||
GPU Debugging
|
||||
===============
|
||||
|
||||
GPUVM Debugging
|
||||
===============
|
||||
|
||||
To aid in debugging GPU virtual memory related problems, the driver supports a
|
||||
number of options module parameters:
|
||||
|
||||
`vm_fault_stop` - If non-0, halt the GPU memory controller on a GPU page fault.
|
||||
|
||||
`vm_update_mode` - If non-0, use the CPU to update GPU page tables rather than
|
||||
the GPU.
|
||||
|
||||
|
||||
Decoding a GPUVM Page Fault
|
||||
===========================
|
||||
|
||||
If you see a GPU page fault in the kernel log, you can decode it to figure
|
||||
out what is going wrong in your application. A page fault in your kernel
|
||||
log may look something like this:
|
||||
|
||||
::
|
||||
|
||||
[gfxhub0] no-retry page fault (src_id:0 ring:24 vmid:3 pasid:32777, for process glxinfo pid 2424 thread glxinfo:cs0 pid 2425)
|
||||
in page starting at address 0x0000800102800000 from IH client 0x1b (UTCL2)
|
||||
VM_L2_PROTECTION_FAULT_STATUS:0x00301030
|
||||
Faulty UTCL2 client ID: TCP (0x8)
|
||||
MORE_FAULTS: 0x0
|
||||
WALKER_ERROR: 0x0
|
||||
PERMISSION_FAULTS: 0x3
|
||||
MAPPING_ERROR: 0x0
|
||||
RW: 0x0
|
||||
|
||||
First you have the memory hub, gfxhub and mmhub. gfxhub is the memory
|
||||
hub used for graphics, compute, and sdma on some chips. mmhub is the
|
||||
memory hub used for multi-media and sdma on some chips.
|
||||
|
||||
Next you have the vmid and pasid. If the vmid is 0, this fault was likely
|
||||
caused by the kernel driver or firmware. If the vmid is non-0, it is generally
|
||||
a fault in a user application. The pasid is used to link a vmid to a system
|
||||
process id. If the process is active when the fault happens, the process
|
||||
information will be printed.
|
||||
|
||||
The GPU virtual address that caused the fault comes next.
|
||||
|
||||
The client ID indicates the GPU block that caused the fault.
|
||||
Some common client IDs:
|
||||
|
||||
- CB/DB: The color/depth backend of the graphics pipe
|
||||
- CPF: Command Processor Frontend
|
||||
- CPC: Command Processor Compute
|
||||
- CPG: Command Processor Graphics
|
||||
- TCP/SQC/SQG: Shaders
|
||||
- SDMA: SDMA engines
|
||||
- VCN: Video encode/decode engines
|
||||
- JPEG: JPEG engines
|
||||
|
||||
PERMISSION_FAULTS describe what faults were encountered:
|
||||
|
||||
- bit 0: the PTE was not valid
|
||||
- bit 1: the PTE read bit was not set
|
||||
- bit 2: the PTE write bit was not set
|
||||
- bit 3: the PTE execute bit was not set
|
||||
|
||||
Finally, RW, indicates whether the access was a read (0) or a write (1).
|
||||
|
||||
In the example above, a shader (cliend id = TCP) generated a read (RW = 0x0) to
|
||||
an invalid page (PERMISSION_FAULTS = 0x3) at GPU virtual address
|
||||
0x0000800102800000. The user can then inspect their shader code and resource
|
||||
descriptor state to determine what caused the GPU page fault.
|
||||
|
||||
UMR
|
||||
===
|
||||
|
||||
`umr <https://gitlab.freedesktop.org/tomstdenis/umr>`_ is a general purpose
|
||||
GPU debugging and diagnostics tool. Please see the umr
|
||||
`documentation <https://umr.readthedocs.io/en/main/>`_ for more information
|
||||
about its capabilities.
|
||||
|
|
@ -135,7 +135,7 @@ Enable underlay
|
|||
---------------
|
||||
|
||||
AMD display has this feature called underlay (which you can read more about at
|
||||
'Documentation/GPU/amdgpu/display/mpo-overview.rst') which is intended to
|
||||
'Documentation/gpu/amdgpu/display/mpo-overview.rst') which is intended to
|
||||
save power when playing a video. The basic idea is to put a video in the
|
||||
underlay plane at the bottom and the desktop in the plane above it with a hole
|
||||
in the video area. This feature is enabled in ChromeOS, and from our data
|
||||
|
|
|
|||
|
|
@ -15,4 +15,5 @@ Next (GCN), Radeon DNA (RDNA), and Compute DNA (CDNA) architectures.
|
|||
ras
|
||||
thermal
|
||||
driver-misc
|
||||
debugging
|
||||
amdgpu-glossary
|
||||
|
|
|
|||
|
|
@ -18,6 +18,11 @@ VM_BIND / EXEC uAPI
|
|||
|
||||
.. kernel-doc:: include/uapi/drm/nouveau_drm.h
|
||||
|
||||
drm/panthor uAPI
|
||||
================
|
||||
|
||||
.. kernel-doc:: include/uapi/drm/panthor_drm.h
|
||||
|
||||
drm/xe uAPI
|
||||
===========
|
||||
|
||||
|
|
|
|||
|
|
@ -398,6 +398,21 @@ Plane Damage Tracking Functions Reference
|
|||
.. kernel-doc:: include/drm/drm_damage_helper.h
|
||||
:internal:
|
||||
|
||||
Plane Panic Feature
|
||||
-------------------
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/drm_panic.c
|
||||
:doc: overview
|
||||
|
||||
Plane Panic Functions Reference
|
||||
-------------------------------
|
||||
|
||||
.. kernel-doc:: include/drm/drm_panic.h
|
||||
:internal:
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/drm_panic.c
|
||||
:export:
|
||||
|
||||
Display Modes Function Reference
|
||||
================================
|
||||
|
||||
|
|
@ -496,6 +511,13 @@ addition to the one mentioned above:
|
|||
|
||||
* An IGT test must be submitted where reasonable.
|
||||
|
||||
For historical reasons, non-standard, driver-specific properties exist. If a KMS
|
||||
driver wants to add support for one of those properties, the requirements for
|
||||
new properties apply where possible. Additionally, the documented behavior must
|
||||
match the de facto semantics of the existing property to ensure compatibility.
|
||||
Developers of the driver that first added the property should help with those
|
||||
tasks and must ACK the documented behavior if possible.
|
||||
|
||||
Property Types and Blob Property Support
|
||||
----------------------------------------
|
||||
|
||||
|
|
|
|||
|
|
@ -38,3 +38,12 @@ the currently possible format options:
|
|||
|
||||
Possible `drm-engine-` key names are: `fragment`, and `vertex-tiler`.
|
||||
`drm-curfreq-` values convey the current operating frequency for that engine.
|
||||
|
||||
Users must bear in mind that engine and cycle sampling are disabled by default,
|
||||
because of power saving concerns. `fdinfo` users and benchmark applications which
|
||||
query the fdinfo file must make sure to toggle the job profiling status of the
|
||||
driver by writing into the appropriate sysfs node::
|
||||
|
||||
echo <N> > /sys/bus/platform/drivers/panfrost/[a-f0-9]*.gpu/profiling
|
||||
|
||||
Where `N` is either `0` or `1`, depending on the desired enablement status.
|
||||
|
|
|
|||
|
|
@ -24,10 +24,10 @@ fragmentation statistics can be obtained through gfp flag information of
|
|||
each page. It is already implemented and activated if page owner is
|
||||
enabled. Other usages are more than welcome.
|
||||
|
||||
It can also be used to show all the stacks and their outstanding
|
||||
allocations, which gives us a quick overview of where the memory is going
|
||||
without the need to screen through all the pages and match the allocation
|
||||
and free operation.
|
||||
It can also be used to show all the stacks and their current number of
|
||||
allocated base pages, which gives us a quick overview of where the memory
|
||||
is going without the need to screen through all the pages and match the
|
||||
allocation and free operation.
|
||||
|
||||
page owner is disabled by default. So, if you'd like to use it, you need
|
||||
to add "page_owner=on" to your boot cmdline. If the kernel is built
|
||||
|
|
@ -75,42 +75,45 @@ Usage
|
|||
|
||||
cat /sys/kernel/debug/page_owner_stacks/show_stacks > stacks.txt
|
||||
cat stacks.txt
|
||||
prep_new_page+0xa9/0x120
|
||||
get_page_from_freelist+0x7e6/0x2140
|
||||
__alloc_pages+0x18a/0x370
|
||||
new_slab+0xc8/0x580
|
||||
___slab_alloc+0x1f2/0xaf0
|
||||
__slab_alloc.isra.86+0x22/0x40
|
||||
kmem_cache_alloc+0x31b/0x350
|
||||
__khugepaged_enter+0x39/0x100
|
||||
dup_mmap+0x1c7/0x5ce
|
||||
copy_process+0x1afe/0x1c90
|
||||
kernel_clone+0x9a/0x3c0
|
||||
__do_sys_clone+0x66/0x90
|
||||
do_syscall_64+0x7f/0x160
|
||||
entry_SYSCALL_64_after_hwframe+0x6c/0x74
|
||||
stack_count: 234
|
||||
post_alloc_hook+0x177/0x1a0
|
||||
get_page_from_freelist+0xd01/0xd80
|
||||
__alloc_pages+0x39e/0x7e0
|
||||
allocate_slab+0xbc/0x3f0
|
||||
___slab_alloc+0x528/0x8a0
|
||||
kmem_cache_alloc+0x224/0x3b0
|
||||
sk_prot_alloc+0x58/0x1a0
|
||||
sk_alloc+0x32/0x4f0
|
||||
inet_create+0x427/0xb50
|
||||
__sock_create+0x2e4/0x650
|
||||
inet_ctl_sock_create+0x30/0x180
|
||||
igmp_net_init+0xc1/0x130
|
||||
ops_init+0x167/0x410
|
||||
setup_net+0x304/0xa60
|
||||
copy_net_ns+0x29b/0x4a0
|
||||
create_new_namespaces+0x4a1/0x820
|
||||
nr_base_pages: 16
|
||||
...
|
||||
...
|
||||
echo 7000 > /sys/kernel/debug/page_owner_stacks/count_threshold
|
||||
cat /sys/kernel/debug/page_owner_stacks/show_stacks> stacks_7000.txt
|
||||
cat stacks_7000.txt
|
||||
prep_new_page+0xa9/0x120
|
||||
get_page_from_freelist+0x7e6/0x2140
|
||||
__alloc_pages+0x18a/0x370
|
||||
alloc_pages_mpol+0xdf/0x1e0
|
||||
folio_alloc+0x14/0x50
|
||||
filemap_alloc_folio+0xb0/0x100
|
||||
page_cache_ra_unbounded+0x97/0x180
|
||||
filemap_fault+0x4b4/0x1200
|
||||
__do_fault+0x2d/0x110
|
||||
do_pte_missing+0x4b0/0xa30
|
||||
__handle_mm_fault+0x7fa/0xb70
|
||||
handle_mm_fault+0x125/0x300
|
||||
do_user_addr_fault+0x3c9/0x840
|
||||
exc_page_fault+0x68/0x150
|
||||
asm_exc_page_fault+0x22/0x30
|
||||
stack_count: 8248
|
||||
post_alloc_hook+0x177/0x1a0
|
||||
get_page_from_freelist+0xd01/0xd80
|
||||
__alloc_pages+0x39e/0x7e0
|
||||
alloc_pages_mpol+0x22e/0x490
|
||||
folio_alloc+0xd5/0x110
|
||||
filemap_alloc_folio+0x78/0x230
|
||||
page_cache_ra_order+0x287/0x6f0
|
||||
filemap_get_pages+0x517/0x1160
|
||||
filemap_read+0x304/0x9f0
|
||||
xfs_file_buffered_read+0xe6/0x1d0 [xfs]
|
||||
xfs_file_read_iter+0x1f0/0x380 [xfs]
|
||||
__kernel_read+0x3b9/0x730
|
||||
kernel_read_file+0x309/0x4d0
|
||||
__do_sys_finit_module+0x381/0x730
|
||||
do_syscall_64+0x8d/0x150
|
||||
entry_SYSCALL_64_after_hwframe+0x62/0x6a
|
||||
nr_base_pages: 20824
|
||||
...
|
||||
|
||||
cat /sys/kernel/debug/page_owner > page_owner_full.txt
|
||||
|
|
|
|||
76
Documentation/networking/devlink/devlink-eswitch-attr.rst
Normal file
76
Documentation/networking/devlink/devlink-eswitch-attr.rst
Normal file
|
|
@ -0,0 +1,76 @@
|
|||
.. SPDX-License-Identifier: GPL-2.0
|
||||
|
||||
==========================
|
||||
Devlink E-Switch Attribute
|
||||
==========================
|
||||
|
||||
Devlink E-Switch supports two modes of operation: legacy and switchdev.
|
||||
Legacy mode operates based on traditional MAC/VLAN steering rules. Switching
|
||||
decisions are made based on MAC addresses, VLANs, etc. There is limited ability
|
||||
to offload switching rules to hardware.
|
||||
|
||||
On the other hand, switchdev mode allows for more advanced offloading
|
||||
capabilities of the E-Switch to hardware. In switchdev mode, more switching
|
||||
rules and logic can be offloaded to the hardware switch ASIC. It enables
|
||||
representor netdevices that represent the slow path of virtual functions (VFs)
|
||||
or scalable-functions (SFs) of the device. See more information about
|
||||
:ref:`Documentation/networking/switchdev.rst <switchdev>` and
|
||||
:ref:`Documentation/networking/representors.rst <representors>`.
|
||||
|
||||
In addition, the devlink E-Switch also comes with other attributes listed
|
||||
in the following section.
|
||||
|
||||
Attributes Description
|
||||
======================
|
||||
|
||||
The following is a list of E-Switch attributes.
|
||||
|
||||
.. list-table:: E-Switch attributes
|
||||
:widths: 8 5 45
|
||||
|
||||
* - Name
|
||||
- Type
|
||||
- Description
|
||||
* - ``mode``
|
||||
- enum
|
||||
- The mode of the device. The mode can be one of the following:
|
||||
|
||||
* ``legacy`` operates based on traditional MAC/VLAN steering
|
||||
rules.
|
||||
* ``switchdev`` allows for more advanced offloading capabilities of
|
||||
the E-Switch to hardware.
|
||||
* - ``inline-mode``
|
||||
- enum
|
||||
- Some HWs need the VF driver to put part of the packet
|
||||
headers on the TX descriptor so the e-switch can do proper
|
||||
matching and steering. Support for both switchdev mode and legacy mode.
|
||||
|
||||
* ``none`` none.
|
||||
* ``link`` L2 mode.
|
||||
* ``network`` L3 mode.
|
||||
* ``transport`` L4 mode.
|
||||
* - ``encap-mode``
|
||||
- enum
|
||||
- The encapsulation mode of the device. Support for both switchdev mode
|
||||
and legacy mode. The mode can be one of the following:
|
||||
|
||||
* ``none`` Disable encapsulation support.
|
||||
* ``basic`` Enable encapsulation support.
|
||||
|
||||
Example Usage
|
||||
=============
|
||||
|
||||
.. code:: shell
|
||||
|
||||
# enable switchdev mode
|
||||
$ devlink dev eswitch set pci/0000:08:00.0 mode switchdev
|
||||
|
||||
# set inline-mode and encap-mode
|
||||
$ devlink dev eswitch set pci/0000:08:00.0 inline-mode none encap-mode basic
|
||||
|
||||
# display devlink device eswitch attributes
|
||||
$ devlink dev eswitch show pci/0000:08:00.0
|
||||
pci/0000:08:00.0: mode switchdev inline-mode none encap-mode basic
|
||||
|
||||
# enable encap-mode with legacy mode
|
||||
$ devlink dev eswitch set pci/0000:08:00.0 mode legacy inline-mode none encap-mode basic
|
||||
|
|
@ -67,6 +67,7 @@ general.
|
|||
devlink-selftests
|
||||
devlink-trap
|
||||
devlink-linecard
|
||||
devlink-eswitch-attr
|
||||
|
||||
Driver-specific documentation
|
||||
-----------------------------
|
||||
|
|
|
|||
|
|
@ -1,4 +1,5 @@
|
|||
.. SPDX-License-Identifier: GPL-2.0
|
||||
.. _representors:
|
||||
|
||||
=============================
|
||||
Network Function Representors
|
||||
|
|
|
|||
|
|
@ -252,7 +252,7 @@ an involved disclosed party. The current ambassadors list:
|
|||
AMD Tom Lendacky <thomas.lendacky@amd.com>
|
||||
Ampere Darren Hart <darren@os.amperecomputing.com>
|
||||
ARM Catalin Marinas <catalin.marinas@arm.com>
|
||||
IBM Power Anton Blanchard <anton@linux.ibm.com>
|
||||
IBM Power Michael Ellerman <ellerman@au.ibm.com>
|
||||
IBM Z Christian Borntraeger <borntraeger@de.ibm.com>
|
||||
Intel Tony Luck <tony.luck@intel.com>
|
||||
Qualcomm Trilok Soni <quic_tsoni@quicinc.com>
|
||||
|
|
|
|||
|
|
@ -16,7 +16,7 @@ support corresponds to ``S`` values in the ``MAINTAINERS`` file.
|
|||
Architecture Level of support Constraints
|
||||
============= ================ ==============================================
|
||||
``arm64`` Maintained Little Endian only.
|
||||
``loongarch`` Maintained -
|
||||
``loongarch`` Maintained \-
|
||||
``um`` Maintained ``x86_64`` only.
|
||||
``x86`` Maintained ``x86_64`` only.
|
||||
============= ================ ==============================================
|
||||
|
|
|
|||
|
|
@ -129,11 +129,8 @@ adaptive-tick CPUs: At least one non-adaptive-tick CPU must remain
|
|||
online to handle timekeeping tasks in order to ensure that system
|
||||
calls like gettimeofday() returns accurate values on adaptive-tick CPUs.
|
||||
(This is not an issue for CONFIG_NO_HZ_IDLE=y because there are no running
|
||||
user processes to observe slight drifts in clock rate.) Therefore, the
|
||||
boot CPU is prohibited from entering adaptive-ticks mode. Specifying a
|
||||
"nohz_full=" mask that includes the boot CPU will result in a boot-time
|
||||
error message, and the boot CPU will be removed from the mask. Note that
|
||||
this means that your system must have at least two CPUs in order for
|
||||
user processes to observe slight drifts in clock rate.) Note that this
|
||||
means that your system must have at least two CPUs in order for
|
||||
CONFIG_NO_HZ_FULL=y to do anything for you.
|
||||
|
||||
Finally, adaptive-ticks CPUs must have their RCU callbacks offloaded.
|
||||
|
|
|
|||
|
|
@ -46,21 +46,16 @@ SEV hardware uses ASIDs to associate a memory encryption key with a VM.
|
|||
Hence, the ASID for the SEV-enabled guests must be from 1 to a maximum value
|
||||
defined in the CPUID 0x8000001f[ecx] field.
|
||||
|
||||
SEV Key Management
|
||||
==================
|
||||
The KVM_MEMORY_ENCRYPT_OP ioctl
|
||||
===============================
|
||||
|
||||
The SEV guest key management is handled by a separate processor called the AMD
|
||||
Secure Processor (AMD-SP). Firmware running inside the AMD-SP provides a secure
|
||||
key management interface to perform common hypervisor activities such as
|
||||
encrypting bootstrap code, snapshot, migrating and debugging the guest. For more
|
||||
information, see the SEV Key Management spec [api-spec]_
|
||||
|
||||
The main ioctl to access SEV is KVM_MEMORY_ENCRYPT_OP. If the argument
|
||||
to KVM_MEMORY_ENCRYPT_OP is NULL, the ioctl returns 0 if SEV is enabled
|
||||
and ``ENOTTY`` if it is disabled (on some older versions of Linux,
|
||||
the ioctl runs normally even with a NULL argument, and therefore will
|
||||
likely return ``EFAULT``). If non-NULL, the argument to KVM_MEMORY_ENCRYPT_OP
|
||||
must be a struct kvm_sev_cmd::
|
||||
The main ioctl to access SEV is KVM_MEMORY_ENCRYPT_OP, which operates on
|
||||
the VM file descriptor. If the argument to KVM_MEMORY_ENCRYPT_OP is NULL,
|
||||
the ioctl returns 0 if SEV is enabled and ``ENOTTY`` if it is disabled
|
||||
(on some older versions of Linux, the ioctl tries to run normally even
|
||||
with a NULL argument, and therefore will likely return ``EFAULT`` instead
|
||||
of zero if SEV is enabled). If non-NULL, the argument to
|
||||
KVM_MEMORY_ENCRYPT_OP must be a struct kvm_sev_cmd::
|
||||
|
||||
struct kvm_sev_cmd {
|
||||
__u32 id;
|
||||
|
|
@ -87,10 +82,6 @@ guests, such as launching, running, snapshotting, migrating and decommissioning.
|
|||
The KVM_SEV_INIT command is used by the hypervisor to initialize the SEV platform
|
||||
context. In a typical workflow, this command should be the first command issued.
|
||||
|
||||
The firmware can be initialized either by using its own non-volatile storage or
|
||||
the OS can manage the NV storage for the firmware using the module parameter
|
||||
``init_ex_path``. If the file specified by ``init_ex_path`` does not exist or
|
||||
is invalid, the OS will create or override the file with output from PSP.
|
||||
|
||||
Returns: 0 on success, -negative on error
|
||||
|
||||
|
|
@ -434,6 +425,21 @@ issued by the hypervisor to make the guest ready for execution.
|
|||
|
||||
Returns: 0 on success, -negative on error
|
||||
|
||||
Firmware Management
|
||||
===================
|
||||
|
||||
The SEV guest key management is handled by a separate processor called the AMD
|
||||
Secure Processor (AMD-SP). Firmware running inside the AMD-SP provides a secure
|
||||
key management interface to perform common hypervisor activities such as
|
||||
encrypting bootstrap code, snapshot, migrating and debugging the guest. For more
|
||||
information, see the SEV Key Management spec [api-spec]_
|
||||
|
||||
The AMD-SP firmware can be initialized either by using its own non-volatile
|
||||
storage or the OS can manage the NV storage for the firmware using
|
||||
parameter ``init_ex_path`` of the ``ccp`` module. If the file specified
|
||||
by ``init_ex_path`` does not exist or is invalid, the OS will create or
|
||||
override the file with PSP non-volatile storage.
|
||||
|
||||
References
|
||||
==========
|
||||
|
||||
|
|
|
|||
|
|
@ -193,8 +193,8 @@ data:
|
|||
Asynchronous page fault (APF) control MSR.
|
||||
|
||||
Bits 63-6 hold 64-byte aligned physical address of a 64 byte memory area
|
||||
which must be in guest RAM and must be zeroed. This memory is expected
|
||||
to hold a copy of the following structure::
|
||||
which must be in guest RAM. This memory is expected to hold the
|
||||
following structure::
|
||||
|
||||
struct kvm_vcpu_pv_apf_data {
|
||||
/* Used for 'page not present' events delivered via #PF */
|
||||
|
|
@ -204,7 +204,6 @@ data:
|
|||
__u32 token;
|
||||
|
||||
__u8 pad[56];
|
||||
__u32 enabled;
|
||||
};
|
||||
|
||||
Bits 5-4 of the MSR are reserved and should be zero. Bit 0 is set to 1
|
||||
|
|
@ -232,14 +231,14 @@ data:
|
|||
as regular page fault, guest must reset 'flags' to '0' before it does
|
||||
something that can generate normal page fault.
|
||||
|
||||
Bytes 5-7 of 64 byte memory location ('token') will be written to by the
|
||||
Bytes 4-7 of 64 byte memory location ('token') will be written to by the
|
||||
hypervisor at the time of APF 'page ready' event injection. The content
|
||||
of these bytes is a token which was previously delivered as 'page not
|
||||
present' event. The event indicates the page in now available. Guest is
|
||||
supposed to write '0' to 'token' when it is done handling 'page ready'
|
||||
event and to write 1' to MSR_KVM_ASYNC_PF_ACK after clearing the location;
|
||||
writing to the MSR forces KVM to re-scan its queue and deliver the next
|
||||
pending notification.
|
||||
of these bytes is a token which was previously delivered in CR2 as
|
||||
'page not present' event. The event indicates the page is now available.
|
||||
Guest is supposed to write '0' to 'token' when it is done handling
|
||||
'page ready' event and to write '1' to MSR_KVM_ASYNC_PF_ACK after
|
||||
clearing the location; writing to the MSR forces KVM to re-scan its
|
||||
queue and deliver the next pending notification.
|
||||
|
||||
Note, MSR_KVM_ASYNC_PF_INT MSR specifying the interrupt vector for 'page
|
||||
ready' APF delivery needs to be written to before enabling APF mechanism
|
||||
|
|
|
|||
330
MAINTAINERS
330
MAINTAINERS
File diff suppressed because it is too large
Load Diff
2
Makefile
2
Makefile
|
|
@ -2,7 +2,7 @@
|
|||
VERSION = 6
|
||||
PATCHLEVEL = 9
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc2
|
||||
EXTRAVERSION = -rc6
|
||||
NAME = Hurr durr I'ma ninja sloth
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
|
|||
20
arch/Kconfig
20
arch/Kconfig
|
|
@ -9,6 +9,14 @@
|
|||
#
|
||||
source "arch/$(SRCARCH)/Kconfig"
|
||||
|
||||
config ARCH_CONFIGURES_CPU_MITIGATIONS
|
||||
bool
|
||||
|
||||
if !ARCH_CONFIGURES_CPU_MITIGATIONS
|
||||
config CPU_MITIGATIONS
|
||||
def_bool y
|
||||
endif
|
||||
|
||||
menu "General architecture-dependent options"
|
||||
|
||||
config ARCH_HAS_SUBPAGE_FAULTS
|
||||
|
|
@ -1172,12 +1180,12 @@ config PAGE_SIZE_LESS_THAN_256KB
|
|||
|
||||
config PAGE_SHIFT
|
||||
int
|
||||
default 12 if PAGE_SIZE_4KB
|
||||
default 13 if PAGE_SIZE_8KB
|
||||
default 14 if PAGE_SIZE_16KB
|
||||
default 15 if PAGE_SIZE_32KB
|
||||
default 16 if PAGE_SIZE_64KB
|
||||
default 18 if PAGE_SIZE_256KB
|
||||
default 12 if PAGE_SIZE_4KB
|
||||
default 13 if PAGE_SIZE_8KB
|
||||
default 14 if PAGE_SIZE_16KB
|
||||
default 15 if PAGE_SIZE_32KB
|
||||
default 16 if PAGE_SIZE_64KB
|
||||
default 18 if PAGE_SIZE_256KB
|
||||
|
||||
# This allows to use a set of generic functions to determine mmap base
|
||||
# address by giving priority to top-down scheme only if the process
|
||||
|
|
|
|||
|
|
@ -6,7 +6,6 @@
|
|||
config ARC
|
||||
def_bool y
|
||||
select ARC_TIMERS
|
||||
select ARCH_HAS_CPU_CACHE_ALIASING
|
||||
select ARCH_HAS_CACHE_LINE_SIZE
|
||||
select ARCH_HAS_DEBUG_VM_PGTABLE
|
||||
select ARCH_HAS_DMA_PREP_COHERENT
|
||||
|
|
|
|||
|
|
@ -1,8 +1,8 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
|
||||
# uImage build relies on mkimage being availble on your host for ARC target
|
||||
# uImage build relies on mkimage being available on your host for ARC target
|
||||
# You will need to build u-boot for ARC, rename mkimage to arc-elf32-mkimage
|
||||
# and make sure it's reacable from your PATH
|
||||
# and make sure it's reachable from your PATH
|
||||
|
||||
OBJCOPYFLAGS= -O binary -R .note -R .note.gnu.build-id -R .comment -S
|
||||
|
||||
|
|
|
|||
|
|
@ -119,9 +119,9 @@ mmc@15000 {
|
|||
/*
|
||||
* The DW APB ICTL intc on MB is connected to CPU intc via a
|
||||
* DT "invisible" DW APB GPIO block, configured to simply pass thru
|
||||
* interrupts - setup accordinly in platform init (plat-axs10x/ax10x.c)
|
||||
* interrupts - setup accordingly in platform init (plat-axs10x/ax10x.c)
|
||||
*
|
||||
* So here we mimic a direct connection betwen them, ignoring the
|
||||
* So here we mimic a direct connection between them, ignoring the
|
||||
* ABPG GPIO. Thus set "interrupts = <24>" (DW APB GPIO to core)
|
||||
* instead of "interrupts = <12>" (DW APB ICTL to DW APB GPIO)
|
||||
*
|
||||
|
|
|
|||
|
|
@ -205,7 +205,6 @@ dmac_cfg_clk: dmac-gpu-cfg-clk {
|
|||
};
|
||||
|
||||
gmac: ethernet@8000 {
|
||||
#interrupt-cells = <1>;
|
||||
compatible = "snps,dwmac";
|
||||
reg = <0x8000 0x2000>;
|
||||
interrupts = <10>;
|
||||
|
|
|
|||
|
|
@ -113,7 +113,7 @@ mmc@15000 {
|
|||
/*
|
||||
* Embedded Vision subsystem UIO mappings; only relevant for EV VDK
|
||||
*
|
||||
* This node is intentionally put outside of MB above becase
|
||||
* This node is intentionally put outside of MB above because
|
||||
* it maps areas outside of MB's 0xez-0xfz.
|
||||
*/
|
||||
uio_ev: uio@d0000000 {
|
||||
|
|
|
|||
|
|
@ -1,9 +0,0 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
#ifndef __ASM_ARC_CACHETYPE_H
|
||||
#define __ASM_ARC_CACHETYPE_H
|
||||
|
||||
#include <linux/types.h>
|
||||
|
||||
#define cpu_dcache_is_aliasing() true
|
||||
|
||||
#endif
|
||||
|
|
@ -12,7 +12,7 @@
|
|||
/*
|
||||
* DSP-related saved registers - need to be saved only when you are
|
||||
* scheduled out.
|
||||
* structure fields name must correspond to aux register defenitions for
|
||||
* structure fields name must correspond to aux register definitions for
|
||||
* automatic offset calculation in DSP_AUX_SAVE_RESTORE macros
|
||||
*/
|
||||
struct dsp_callee_regs {
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
* Stack switching code can no longer reliably rely on the fact that
|
||||
* if we are NOT in user mode, stack is switched to kernel mode.
|
||||
* e.g. L2 IRQ interrupted a L1 ISR which had not yet completed
|
||||
* it's prologue including stack switching from user mode
|
||||
* its prologue including stack switching from user mode
|
||||
*
|
||||
* Vineetg: Aug 28th 2008: Bug #94984
|
||||
* -Zero Overhead Loop Context shd be cleared when entering IRQ/EXcp/Trap
|
||||
|
|
@ -143,7 +143,7 @@
|
|||
* 2. L1 IRQ taken, ISR starts (CPU auto-switched to KERNEL mode)
|
||||
* 3. But before it could switch SP from USER to KERNEL stack
|
||||
* a L2 IRQ "Interrupts" L1
|
||||
* Thay way although L2 IRQ happened in Kernel mode, stack is still
|
||||
* That way although L2 IRQ happened in Kernel mode, stack is still
|
||||
* not switched.
|
||||
* To handle this, we may need to switch stack even if in kernel mode
|
||||
* provided SP has values in range of USER mode stack ( < 0x7000_0000 )
|
||||
|
|
@ -173,7 +173,7 @@
|
|||
|
||||
GET_CURR_TASK_ON_CPU r9
|
||||
|
||||
/* With current tsk in r9, get it's kernel mode stack base */
|
||||
/* With current tsk in r9, get its kernel mode stack base */
|
||||
GET_TSK_STACK_BASE r9, r9
|
||||
|
||||
/* save U mode SP @ pt_regs->sp */
|
||||
|
|
@ -282,7 +282,7 @@
|
|||
* NOTE:
|
||||
*
|
||||
* It is recommended that lp_count/ilink1/ilink2 not be used as a dest reg
|
||||
* for memory load operations. If used in that way interrupts are deffered
|
||||
* for memory load operations. If used in that way interrupts are deferred
|
||||
* by hardware and that is not good.
|
||||
*-------------------------------------------------------------*/
|
||||
.macro EXCEPTION_EPILOGUE
|
||||
|
|
@ -350,7 +350,7 @@
|
|||
* NOTE:
|
||||
*
|
||||
* It is recommended that lp_count/ilink1/ilink2 not be used as a dest reg
|
||||
* for memory load operations. If used in that way interrupts are deffered
|
||||
* for memory load operations. If used in that way interrupts are deferred
|
||||
* by hardware and that is not good.
|
||||
*-------------------------------------------------------------*/
|
||||
.macro INTERRUPT_EPILOGUE LVL
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
#ifndef __ASM_ARC_ENTRY_H
|
||||
#define __ASM_ARC_ENTRY_H
|
||||
|
||||
#include <asm/unistd.h> /* For NR_syscalls defination */
|
||||
#include <asm/unistd.h> /* For NR_syscalls definition */
|
||||
#include <asm/arcregs.h>
|
||||
#include <asm/ptrace.h>
|
||||
#include <asm/processor.h> /* For VMALLOC_START */
|
||||
|
|
@ -56,7 +56,7 @@
|
|||
.endm
|
||||
|
||||
/*-------------------------------------------------------------
|
||||
* given a tsk struct, get to the base of it's kernel mode stack
|
||||
* given a tsk struct, get to the base of its kernel mode stack
|
||||
* tsk->thread_info is really a PAGE, whose bottom hoists stack
|
||||
* which grows upwards towards thread_info
|
||||
*------------------------------------------------------------*/
|
||||
|
|
|
|||
|
|
@ -10,7 +10,7 @@
|
|||
* ARCv2 can support 240 interrupts in the core interrupts controllers and
|
||||
* 128 interrupts in IDU. Thus 512 virtual IRQs must be enough for most
|
||||
* configurations of boards.
|
||||
* This doesnt affect ARCompact, but we change it to same value
|
||||
* This doesn't affect ARCompact, but we change it to same value
|
||||
*/
|
||||
#define NR_IRQS 512
|
||||
|
||||
|
|
|
|||
|
|
@ -46,7 +46,7 @@
|
|||
* IRQ Control Macros
|
||||
*
|
||||
* All of them have "memory" clobber (compiler barrier) which is needed to
|
||||
* ensure that LD/ST requiring irq safetly (R-M-W when LLSC is not available)
|
||||
* ensure that LD/ST requiring irq safety (R-M-W when LLSC is not available)
|
||||
* are redone after IRQs are re-enabled (and gcc doesn't reuse stale register)
|
||||
*
|
||||
* Noted at the time of Abilis Timer List corruption
|
||||
|
|
|
|||
|
|
@ -165,7 +165,7 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
|
|||
* for retiring-mm. However destroy_context( ) still needs to do that because
|
||||
* between mm_release( ) = >deactive_mm( ) and
|
||||
* mmput => .. => __mmdrop( ) => destroy_context( )
|
||||
* there is a good chance that task gets sched-out/in, making it's ASID valid
|
||||
* there is a good chance that task gets sched-out/in, making its ASID valid
|
||||
* again (this teased me for a whole day).
|
||||
*/
|
||||
|
||||
|
|
|
|||
|
|
@ -66,7 +66,7 @@
|
|||
* Other rules which cause the divergence from 1:1 mapping
|
||||
*
|
||||
* 1. Although ARC700 can do exclusive execute/write protection (meaning R
|
||||
* can be tracked independet of X/W unlike some other CPUs), still to
|
||||
* can be tracked independently of X/W unlike some other CPUs), still to
|
||||
* keep things consistent with other archs:
|
||||
* -Write implies Read: W => R
|
||||
* -Execute implies Read: X => R
|
||||
|
|
|
|||
|
|
@ -169,7 +169,7 @@ static inline unsigned long regs_get_register(struct pt_regs *regs,
|
|||
return *(unsigned long *)((unsigned long)regs + offset);
|
||||
}
|
||||
|
||||
extern int syscall_trace_entry(struct pt_regs *);
|
||||
extern int syscall_trace_enter(struct pt_regs *);
|
||||
extern void syscall_trace_exit(struct pt_regs *);
|
||||
|
||||
#endif /* !__ASSEMBLY__ */
|
||||
|
|
|
|||
|
|
@ -6,7 +6,7 @@
|
|||
#ifndef __ARC_ASM_SHMPARAM_H
|
||||
#define __ARC_ASM_SHMPARAM_H
|
||||
|
||||
/* Handle upto 2 cache bins */
|
||||
/* Handle up to 2 cache bins */
|
||||
#define SHMLBA (2 * PAGE_SIZE)
|
||||
|
||||
/* Enforce SHMLBA in shmat */
|
||||
|
|
|
|||
|
|
@ -77,7 +77,7 @@ static inline const char *arc_platform_smp_cpuinfo(void)
|
|||
|
||||
/*
|
||||
* ARC700 doesn't support atomic Read-Modify-Write ops.
|
||||
* Originally Interrupts had to be disabled around code to gaurantee atomicity.
|
||||
* Originally Interrupts had to be disabled around code to guarantee atomicity.
|
||||
* The LLOCK/SCOND insns allow writing interrupt-hassle-free based atomic ops
|
||||
* based on retry-if-irq-in-atomic (with hardware assist).
|
||||
* However despite these, we provide the IRQ disabling variant
|
||||
|
|
@ -86,7 +86,7 @@ static inline const char *arc_platform_smp_cpuinfo(void)
|
|||
* support needed.
|
||||
*
|
||||
* (2) In a SMP setup, the LLOCK/SCOND atomicity across CPUs needs to be
|
||||
* gaurantted by the platform (not something which core handles).
|
||||
* guaranteed by the platform (not something which core handles).
|
||||
* Assuming a platform won't, SMP Linux needs to use spinlocks + local IRQ
|
||||
* disabling for atomicity.
|
||||
*
|
||||
|
|
|
|||
|
|
@ -38,7 +38,7 @@
|
|||
struct thread_info {
|
||||
unsigned long flags; /* low level flags */
|
||||
unsigned long ksp; /* kernel mode stack top in __switch_to */
|
||||
int preempt_count; /* 0 => preemptable, <0 => BUG */
|
||||
int preempt_count; /* 0 => preemptible, <0 => BUG */
|
||||
int cpu; /* current CPU */
|
||||
unsigned long thr_ptr; /* TLS ptr */
|
||||
struct task_struct *task; /* main task structure */
|
||||
|
|
|
|||
|
|
@ -62,7 +62,7 @@
|
|||
* 8051fdc4: st r2,[r1,20] ; Mem op : save result back to mem
|
||||
*
|
||||
* Joern suggested a better "C" algorithm which is great since
|
||||
* (1) It is portable to any architecure
|
||||
* (1) It is portable to any architecture
|
||||
* (2) At the same time it takes advantage of ARC ISA (rotate intrns)
|
||||
*/
|
||||
|
||||
|
|
|
|||
|
|
@ -5,7 +5,7 @@
|
|||
* Copyright (C) 2013 Synopsys, Inc. (www.synopsys.com)
|
||||
*/
|
||||
|
||||
#include <linux/linkage.h> /* ARC_{EXTRY,EXIT} */
|
||||
#include <linux/linkage.h> /* ARC_{ENTRY,EXIT} */
|
||||
#include <asm/entry.h> /* SAVE_ALL_{INT1,INT2,TRAP...} */
|
||||
#include <asm/errno.h>
|
||||
#include <asm/arcregs.h>
|
||||
|
|
@ -31,7 +31,7 @@ VECTOR res_service ; Reset Vector
|
|||
VECTOR mem_service ; Mem exception
|
||||
VECTOR instr_service ; Instrn Error
|
||||
VECTOR EV_MachineCheck ; Fatal Machine check
|
||||
VECTOR EV_TLBMissI ; Intruction TLB miss
|
||||
VECTOR EV_TLBMissI ; Instruction TLB miss
|
||||
VECTOR EV_TLBMissD ; Data TLB miss
|
||||
VECTOR EV_TLBProtV ; Protection Violation
|
||||
VECTOR EV_PrivilegeV ; Privilege Violation
|
||||
|
|
@ -76,11 +76,11 @@ ENTRY(handle_interrupt)
|
|||
# query in hard ISR path would return false (since .IE is set) which would
|
||||
# trips genirq interrupt handling asserts.
|
||||
#
|
||||
# So do a "soft" disable of interrutps here.
|
||||
# So do a "soft" disable of interrupts here.
|
||||
#
|
||||
# Note this disable is only for consistent book-keeping as further interrupts
|
||||
# will be disabled anyways even w/o this. Hardware tracks active interrupts
|
||||
# seperately in AUX_IRQ_ACT.active and will not take new interrupts
|
||||
# separately in AUX_IRQ_ACT.active and will not take new interrupts
|
||||
# unless this one returns (or higher prio becomes pending in 2-prio scheme)
|
||||
|
||||
IRQ_DISABLE
|
||||
|
|
|
|||
|
|
@ -95,7 +95,7 @@ ENTRY(EV_MachineCheck)
|
|||
lr r0, [efa]
|
||||
mov r1, sp
|
||||
|
||||
; MC excpetions disable MMU
|
||||
; MC exceptions disable MMU
|
||||
ARC_MMU_REENABLE r3
|
||||
|
||||
lsr r3, r10, 8
|
||||
|
|
@ -209,7 +209,7 @@ trap_with_param:
|
|||
|
||||
; ---------------------------------------------
|
||||
; syscall TRAP
|
||||
; ABI: (r0-r7) upto 8 args, (r8) syscall number
|
||||
; ABI: (r0-r7) up to 8 args, (r8) syscall number
|
||||
; ---------------------------------------------
|
||||
|
||||
ENTRY(EV_Trap)
|
||||
|
|
|
|||
|
|
@ -165,7 +165,7 @@ ENTRY(first_lines_of_secondary)
|
|||
; setup stack (fp, sp)
|
||||
mov fp, 0
|
||||
|
||||
; set it's stack base to tsk->thread_info bottom
|
||||
; set its stack base to tsk->thread_info bottom
|
||||
GET_TSK_STACK_BASE r0, sp
|
||||
|
||||
j start_kernel_secondary
|
||||
|
|
|
|||
|
|
@ -56,7 +56,7 @@ void arc_init_IRQ(void)
|
|||
WRITE_AUX(AUX_IRQ_CTRL, ictrl);
|
||||
|
||||
/*
|
||||
* ARCv2 core intc provides multiple interrupt priorities (upto 16).
|
||||
* ARCv2 core intc provides multiple interrupt priorities (up to 16).
|
||||
* Typical builds though have only two levels (0-high, 1-low)
|
||||
* Linux by default uses lower prio 1 for most irqs, reserving 0 for
|
||||
* NMI style interrupts in future (say perf)
|
||||
|
|
|
|||
|
|
@ -190,7 +190,8 @@ static void __kprobes setup_singlestep(struct kprobe *p, struct pt_regs *regs)
|
|||
}
|
||||
}
|
||||
|
||||
int __kprobes arc_kprobe_handler(unsigned long addr, struct pt_regs *regs)
|
||||
static int
|
||||
__kprobes arc_kprobe_handler(unsigned long addr, struct pt_regs *regs)
|
||||
{
|
||||
struct kprobe *p;
|
||||
struct kprobe_ctlblk *kcb;
|
||||
|
|
@ -241,8 +242,8 @@ int __kprobes arc_kprobe_handler(unsigned long addr, struct pt_regs *regs)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int __kprobes arc_post_kprobe_handler(unsigned long addr,
|
||||
struct pt_regs *regs)
|
||||
static int
|
||||
__kprobes arc_post_kprobe_handler(unsigned long addr, struct pt_regs *regs)
|
||||
{
|
||||
struct kprobe *cur = kprobe_running();
|
||||
struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user