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staging: rtl8192e: Rename Record_CCK_2.., Record_CCK_4.. and DefaultIn..

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Rename variable Record_CCK_20Mindex to rec_cck_20m_idx,
Record_CCK_40Mindex to rec_cck_40m_idx and DefaultInitialGain to
def_initial_gain to avoid CamelCase which is not accepted by checkpatch.

Signed-off-by: Philipp Hortmann <philipp.g.hortmann@gmail.com>
Link: https://lore.kernel.org/r/2963e704afae2382bb7fded0453adbc4a8d48db3.1673812849.git.philipp.g.hortmann@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Philipp Hortmann 2023-01-15 21:20:10 +01:00 committed by Greg Kroah-Hartman
parent a6ee5b0af1
commit a9b97927cc
3 changed files with 15 additions and 15 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c
View File

@ -574,10 +574,10 @@ void rtl92e_get_tx_power(struct net_device *dev)
priv->mcs_tx_pwr_level_org_offset[5] =
rtl92e_readl(dev, rTxAGC_Mcs15_Mcs12);
priv->DefaultInitialGain[0] = rtl92e_readb(dev, rOFDM0_XAAGCCore1);
priv->DefaultInitialGain[1] = rtl92e_readb(dev, rOFDM0_XBAGCCore1);
priv->DefaultInitialGain[2] = rtl92e_readb(dev, rOFDM0_XCAGCCore1);
priv->DefaultInitialGain[3] = rtl92e_readb(dev, rOFDM0_XDAGCCore1);
priv->def_initial_gain[0] = rtl92e_readb(dev, rOFDM0_XAAGCCore1);
priv->def_initial_gain[1] = rtl92e_readb(dev, rOFDM0_XBAGCCore1);
priv->def_initial_gain[2] = rtl92e_readb(dev, rOFDM0_XCAGCCore1);
priv->def_initial_gain[3] = rtl92e_readb(dev, rOFDM0_XDAGCCore1);
priv->framesync = rtl92e_readb(dev, rOFDM0_RxDetector3);
priv->framesyncC34 = rtl92e_readl(dev, rOFDM0_RxDetector2);
@ -1072,13 +1072,13 @@ static void _rtl92e_cck_tx_power_track_bw_switch_thermal(struct net_device *dev)
switch (priv->CurrentChannelBW) {
case HT_CHANNEL_WIDTH_20:
if (priv->Record_CCK_20Mindex == 0)
priv->Record_CCK_20Mindex = 6;
priv->cck_index = priv->Record_CCK_20Mindex;
if (priv->rec_cck_20m_idx == 0)
priv->rec_cck_20m_idx = 6;
priv->cck_index = priv->rec_cck_20m_idx;
break;
case HT_CHANNEL_WIDTH_20_40:
priv->cck_index = priv->Record_CCK_40Mindex;
priv->cck_index = priv->rec_cck_40m_idx;
break;
}
rtl92e_dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);

6
drivers/staging/rtl8192e/rtl8192e/rtl_core.h
View File

@ -499,11 +499,11 @@ struct r8192_priv {
u8 ofdm_index[2];
u8 cck_index;
u8 Record_CCK_20Mindex;
u8 Record_CCK_40Mindex;
u8 rec_cck_20m_idx;
u8 rec_cck_40m_idx;
struct init_gain initgain_backup;
u8 DefaultInitialGain[4];
u8 def_initial_gain[4];
bool bis_any_nonbepkts;
bool bcurrent_turbo_EDCA;
bool bis_cur_rdlstate;

8
drivers/staging/rtl8192e/rtl8192e/rtl_dm.c
View File

@ -823,8 +823,8 @@ static void _rtl92e_dm_tx_power_tracking_cb_thermal(struct net_device *dev)
else
tmpCCKindex = tmpCCK20Mindex;
priv->Record_CCK_20Mindex = tmpCCK20Mindex;
priv->Record_CCK_40Mindex = tmpCCK40Mindex;
priv->rec_cck_20m_idx = tmpCCK20Mindex;
priv->rec_cck_40m_idx = tmpCCK40Mindex;
if (priv->rtllib->current_network.channel == 14 &&
!priv->bcck_in_ch14) {
@ -1378,12 +1378,12 @@ static void _rtl92e_dm_initial_gain(struct net_device *dev)
dm_digtable.cur_ig_value = gain_range;
} else {
if (dm_digtable.cur_ig_value == 0)
dm_digtable.cur_ig_value = priv->DefaultInitialGain[0];
dm_digtable.cur_ig_value = priv->def_initial_gain[0];
else
dm_digtable.cur_ig_value = dm_digtable.pre_ig_value;
}
} else {
dm_digtable.cur_ig_value = priv->DefaultInitialGain[0];
dm_digtable.cur_ig_value = priv->def_initial_gain[0];
dm_digtable.pre_ig_value = 0;
}