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KVM/arm64 fixes for 6.19
- Ensure early return semantics are preserved for pKVM fault handlers
- Fix case where the kernel runs with the guest's PAN value when
CONFIG_ARM64_PAN is not set
- Make stage-1 walks to set the access flag respect the access
permission of the underlying stage-2, when enabled
- Propagate computed FGT values to the pKVM view of the vCPU at
vcpu_load()
- Correctly program PXN and UXN privilege bits for hVHE's stage-1 page
tables
- Check that the VM is actually using VGICv3 before accessing the GICv3
CPU interface
- Delete some unused code
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Merge branch kvmarm-fixes-6.19-1 into kvm-arm64/vtcr
KVM/arm64 fixes for 6.19
- Ensure early return semantics are preserved for pKVM fault handlers
- Fix case where the kernel runs with the guest's PAN value when
CONFIG_ARM64_PAN is not set
- Make stage-1 walks to set the access flag respect the access
permission of the underlying stage-2, when enabled
- Propagate computed FGT values to the pKVM view of the vCPU at
vcpu_load()
- Correctly program PXN and UXN privilege bits for hVHE's stage-1 page
tables
- Check that the VM is actually using VGICv3 before accessing the GICv3
CPU interface
- Delete some unused code
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# gpg: Signature made Thu 15 Jan 2026 09:23:48 GMT
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* tag 'kvmarm-fixes-6.19-1':
KVM: arm64: Invert KVM_PGTABLE_WALK_HANDLE_FAULT to fix pKVM walkers
KVM: arm64: Don't blindly set set PSTATE.PAN on guest exit
KVM: arm64: nv: Respect stage-2 write permssion when setting stage-1 AF
KVM: arm64: Remove unused vcpu_{clear,set}_wfx_traps()
KVM: arm64: Remove unused parameter in synchronize_vcpu_pstate()
KVM: arm64: Remove extra argument for __pvkm_host_{share,unshare}_hyp()
KVM: arm64: Inject UNDEF for a register trap without accessor
KVM: arm64: Copy FGT traps to unprotected pKVM VCPU on VCPU load
KVM: arm64: Fix EL2 S1 XN handling for hVHE setups
KVM: arm64: gic: Check for vGICv3 when clearing TWI
Signed-off-by: Marc Zyngier <maz@kernel.org>
This commit is contained in:
commit
a98cd5c298
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@ -300,6 +300,8 @@ void kvm_get_kimage_voffset(struct alt_instr *alt,
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__le32 *origptr, __le32 *updptr, int nr_inst);
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void kvm_compute_final_ctr_el0(struct alt_instr *alt,
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__le32 *origptr, __le32 *updptr, int nr_inst);
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void kvm_pan_patch_el2_entry(struct alt_instr *alt,
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__le32 *origptr, __le32 *updptr, int nr_inst);
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void __noreturn __cold nvhe_hyp_panic_handler(u64 esr, u64 spsr, u64 elr_virt,
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u64 elr_phys, u64 par, uintptr_t vcpu, u64 far, u64 hpfar);
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@ -119,22 +119,6 @@ static inline unsigned long *vcpu_hcr(struct kvm_vcpu *vcpu)
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return (unsigned long *)&vcpu->arch.hcr_el2;
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}
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static inline void vcpu_clear_wfx_traps(struct kvm_vcpu *vcpu)
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{
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vcpu->arch.hcr_el2 &= ~HCR_TWE;
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if (atomic_read(&vcpu->arch.vgic_cpu.vgic_v3.its_vpe.vlpi_count) ||
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vcpu->kvm->arch.vgic.nassgireq)
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vcpu->arch.hcr_el2 &= ~HCR_TWI;
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else
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vcpu->arch.hcr_el2 |= HCR_TWI;
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}
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static inline void vcpu_set_wfx_traps(struct kvm_vcpu *vcpu)
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{
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vcpu->arch.hcr_el2 |= HCR_TWE;
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vcpu->arch.hcr_el2 |= HCR_TWI;
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}
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static inline unsigned long vcpu_get_vsesr(struct kvm_vcpu *vcpu)
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{
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return vcpu->arch.vsesr_el2;
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@ -87,7 +87,15 @@ typedef u64 kvm_pte_t;
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#define KVM_PTE_LEAF_ATTR_HI_SW GENMASK(58, 55)
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#define KVM_PTE_LEAF_ATTR_HI_S1_XN BIT(54)
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#define __KVM_PTE_LEAF_ATTR_HI_S1_XN BIT(54)
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#define __KVM_PTE_LEAF_ATTR_HI_S1_UXN BIT(54)
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#define __KVM_PTE_LEAF_ATTR_HI_S1_PXN BIT(53)
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#define KVM_PTE_LEAF_ATTR_HI_S1_XN \
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({ cpus_have_final_cap(ARM64_KVM_HVHE) ? \
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(__KVM_PTE_LEAF_ATTR_HI_S1_UXN | \
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__KVM_PTE_LEAF_ATTR_HI_S1_PXN) : \
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__KVM_PTE_LEAF_ATTR_HI_S1_XN; })
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#define KVM_PTE_LEAF_ATTR_HI_S2_XN GENMASK(54, 53)
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@ -293,8 +301,8 @@ typedef bool (*kvm_pgtable_force_pte_cb_t)(u64 addr, u64 end,
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* children.
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* @KVM_PGTABLE_WALK_SHARED: Indicates the page-tables may be shared
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* with other software walkers.
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* @KVM_PGTABLE_WALK_HANDLE_FAULT: Indicates the page-table walk was
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* invoked from a fault handler.
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* @KVM_PGTABLE_WALK_IGNORE_EAGAIN: Don't terminate the walk early if
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* the walker returns -EAGAIN.
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* @KVM_PGTABLE_WALK_SKIP_BBM_TLBI: Visit and update table entries
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* without Break-before-make's
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* TLB invalidation.
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@ -307,7 +315,7 @@ enum kvm_pgtable_walk_flags {
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KVM_PGTABLE_WALK_TABLE_PRE = BIT(1),
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KVM_PGTABLE_WALK_TABLE_POST = BIT(2),
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KVM_PGTABLE_WALK_SHARED = BIT(3),
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KVM_PGTABLE_WALK_HANDLE_FAULT = BIT(4),
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KVM_PGTABLE_WALK_IGNORE_EAGAIN = BIT(4),
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KVM_PGTABLE_WALK_SKIP_BBM_TLBI = BIT(5),
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KVM_PGTABLE_WALK_SKIP_CMO = BIT(6),
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};
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@ -91,7 +91,8 @@
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*/
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#define pstate_field(op1, op2) ((op1) << Op1_shift | (op2) << Op2_shift)
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#define PSTATE_Imm_shift CRm_shift
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#define SET_PSTATE(x, r) __emit_inst(0xd500401f | PSTATE_ ## r | ((!!x) << PSTATE_Imm_shift))
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#define ENCODE_PSTATE(x, r) (0xd500401f | PSTATE_ ## r | ((!!x) << PSTATE_Imm_shift))
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#define SET_PSTATE(x, r) __emit_inst(ENCODE_PSTATE(x, r))
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#define PSTATE_PAN pstate_field(0, 4)
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#define PSTATE_UAO pstate_field(0, 3)
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@ -86,6 +86,7 @@ KVM_NVHE_ALIAS(kvm_patch_vector_branch);
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KVM_NVHE_ALIAS(kvm_update_va_mask);
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KVM_NVHE_ALIAS(kvm_get_kimage_voffset);
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KVM_NVHE_ALIAS(kvm_compute_final_ctr_el0);
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KVM_NVHE_ALIAS(kvm_pan_patch_el2_entry);
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KVM_NVHE_ALIAS(spectre_bhb_patch_loop_iter);
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KVM_NVHE_ALIAS(spectre_bhb_patch_loop_mitigation_enable);
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KVM_NVHE_ALIAS(spectre_bhb_patch_wa3);
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@ -569,6 +569,7 @@ static bool kvm_vcpu_should_clear_twi(struct kvm_vcpu *vcpu)
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return kvm_wfi_trap_policy == KVM_WFX_NOTRAP;
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return single_task_running() &&
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vcpu->kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3 &&
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(atomic_read(&vcpu->arch.vgic_cpu.vgic_v3.its_vpe.vlpi_count) ||
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vcpu->kvm->arch.vgic.nassgireq);
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}
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@ -403,6 +403,7 @@ static int walk_s1(struct kvm_vcpu *vcpu, struct s1_walk_info *wi,
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struct s1_walk_result *wr, u64 va)
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{
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u64 va_top, va_bottom, baddr, desc, new_desc, ipa;
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struct kvm_s2_trans s2_trans = {};
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int level, stride, ret;
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level = wi->sl;
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@ -420,8 +421,6 @@ static int walk_s1(struct kvm_vcpu *vcpu, struct s1_walk_info *wi,
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ipa = baddr | index;
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if (wi->s2) {
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struct kvm_s2_trans s2_trans = {};
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ret = kvm_walk_nested_s2(vcpu, ipa, &s2_trans);
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if (ret) {
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fail_s1_walk(wr,
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@ -515,6 +514,11 @@ static int walk_s1(struct kvm_vcpu *vcpu, struct s1_walk_info *wi,
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new_desc |= PTE_AF;
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if (new_desc != desc) {
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if (wi->s2 && !kvm_s2_trans_writable(&s2_trans)) {
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fail_s1_walk(wr, ESR_ELx_FSC_PERM_L(level), true);
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return -EPERM;
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}
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ret = kvm_swap_s1_desc(vcpu, ipa, desc, new_desc, wi);
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if (ret)
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return ret;
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@ -126,7 +126,9 @@ SYM_INNER_LABEL(__guest_exit, SYM_L_GLOBAL)
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add x1, x1, #VCPU_CONTEXT
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ALTERNATIVE(nop, SET_PSTATE_PAN(1), ARM64_HAS_PAN, CONFIG_ARM64_PAN)
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alternative_cb ARM64_ALWAYS_SYSTEM, kvm_pan_patch_el2_entry
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nop
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alternative_cb_end
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// Store the guest regs x2 and x3
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stp x2, x3, [x1, #CPU_XREG_OFFSET(2)]
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@ -854,7 +854,7 @@ static inline bool kvm_hyp_handle_exit(struct kvm_vcpu *vcpu, u64 *exit_code,
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return false;
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}
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static inline void synchronize_vcpu_pstate(struct kvm_vcpu *vcpu, u64 *exit_code)
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static inline void synchronize_vcpu_pstate(struct kvm_vcpu *vcpu)
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{
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/*
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* Check for the conditions of Cortex-A510's #2077057. When these occur
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@ -180,6 +180,9 @@ static void handle___pkvm_vcpu_load(struct kvm_cpu_context *host_ctxt)
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/* Propagate WFx trapping flags */
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hyp_vcpu->vcpu.arch.hcr_el2 &= ~(HCR_TWE | HCR_TWI);
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hyp_vcpu->vcpu.arch.hcr_el2 |= hcr_el2 & (HCR_TWE | HCR_TWI);
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} else {
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memcpy(&hyp_vcpu->vcpu.arch.fgt, hyp_vcpu->host_vcpu->arch.fgt,
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sizeof(hyp_vcpu->vcpu.arch.fgt));
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}
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}
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@ -172,7 +172,6 @@ static int pkvm_vcpu_init_traps(struct pkvm_hyp_vcpu *hyp_vcpu)
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/* Trust the host for non-protected vcpu features. */
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vcpu->arch.hcrx_el2 = host_vcpu->arch.hcrx_el2;
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memcpy(vcpu->arch.fgt, host_vcpu->arch.fgt, sizeof(vcpu->arch.fgt));
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return 0;
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}
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@ -211,7 +211,7 @@ static inline bool fixup_guest_exit(struct kvm_vcpu *vcpu, u64 *exit_code)
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{
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const exit_handler_fn *handlers = kvm_get_exit_handler_array(vcpu);
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synchronize_vcpu_pstate(vcpu, exit_code);
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synchronize_vcpu_pstate(vcpu);
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/*
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* Some guests (e.g., protected VMs) are not be allowed to run in
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@ -144,7 +144,7 @@ static bool kvm_pgtable_walk_continue(const struct kvm_pgtable_walker *walker,
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* page table walk.
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*/
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if (r == -EAGAIN)
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return !(walker->flags & KVM_PGTABLE_WALK_HANDLE_FAULT);
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return walker->flags & KVM_PGTABLE_WALK_IGNORE_EAGAIN;
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return !r;
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}
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@ -1262,7 +1262,8 @@ int kvm_pgtable_stage2_wrprotect(struct kvm_pgtable *pgt, u64 addr, u64 size)
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{
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return stage2_update_leaf_attrs(pgt, addr, size, 0,
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KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W,
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NULL, NULL, 0);
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NULL, NULL,
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KVM_PGTABLE_WALK_IGNORE_EAGAIN);
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}
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void kvm_pgtable_stage2_mkyoung(struct kvm_pgtable *pgt, u64 addr,
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|
|
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|
@ -536,7 +536,7 @@ static const exit_handler_fn hyp_exit_handlers[] = {
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static inline bool fixup_guest_exit(struct kvm_vcpu *vcpu, u64 *exit_code)
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{
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synchronize_vcpu_pstate(vcpu, exit_code);
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synchronize_vcpu_pstate(vcpu);
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/*
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* If we were in HYP context on entry, adjust the PSTATE view
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|
|
|
|||
|
|
@ -497,7 +497,7 @@ static int share_pfn_hyp(u64 pfn)
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this->count = 1;
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rb_link_node(&this->node, parent, node);
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rb_insert_color(&this->node, &hyp_shared_pfns);
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ret = kvm_call_hyp_nvhe(__pkvm_host_share_hyp, pfn, 1);
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ret = kvm_call_hyp_nvhe(__pkvm_host_share_hyp, pfn);
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unlock:
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mutex_unlock(&hyp_shared_pfns_lock);
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|
@ -523,7 +523,7 @@ static int unshare_pfn_hyp(u64 pfn)
|
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rb_erase(&this->node, &hyp_shared_pfns);
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kfree(this);
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ret = kvm_call_hyp_nvhe(__pkvm_host_unshare_hyp, pfn, 1);
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ret = kvm_call_hyp_nvhe(__pkvm_host_unshare_hyp, pfn);
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||||
unlock:
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mutex_unlock(&hyp_shared_pfns_lock);
|
||||
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||||
|
|
@ -1563,14 +1563,12 @@ static void adjust_nested_exec_perms(struct kvm *kvm,
|
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*prot &= ~KVM_PGTABLE_PROT_PX;
|
||||
}
|
||||
|
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#define KVM_PGTABLE_WALK_MEMABORT_FLAGS (KVM_PGTABLE_WALK_HANDLE_FAULT | KVM_PGTABLE_WALK_SHARED)
|
||||
|
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static int gmem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,
|
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struct kvm_s2_trans *nested,
|
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struct kvm_memory_slot *memslot, bool is_perm)
|
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{
|
||||
bool write_fault, exec_fault, writable;
|
||||
enum kvm_pgtable_walk_flags flags = KVM_PGTABLE_WALK_MEMABORT_FLAGS;
|
||||
enum kvm_pgtable_walk_flags flags = KVM_PGTABLE_WALK_SHARED;
|
||||
enum kvm_pgtable_prot prot = KVM_PGTABLE_PROT_R;
|
||||
struct kvm_pgtable *pgt = vcpu->arch.hw_mmu->pgt;
|
||||
unsigned long mmu_seq;
|
||||
|
|
@ -1665,7 +1663,7 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,
|
|||
struct kvm_pgtable *pgt;
|
||||
struct page *page;
|
||||
vm_flags_t vm_flags;
|
||||
enum kvm_pgtable_walk_flags flags = KVM_PGTABLE_WALK_MEMABORT_FLAGS;
|
||||
enum kvm_pgtable_walk_flags flags = KVM_PGTABLE_WALK_SHARED;
|
||||
|
||||
if (fault_is_perm)
|
||||
fault_granule = kvm_vcpu_trap_get_perm_fault_granule(vcpu);
|
||||
|
|
@ -1933,7 +1931,7 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,
|
|||
/* Resolve the access fault by making the page young again. */
|
||||
static void handle_access_fault(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa)
|
||||
{
|
||||
enum kvm_pgtable_walk_flags flags = KVM_PGTABLE_WALK_HANDLE_FAULT | KVM_PGTABLE_WALK_SHARED;
|
||||
enum kvm_pgtable_walk_flags flags = KVM_PGTABLE_WALK_SHARED;
|
||||
struct kvm_s2_mmu *mmu;
|
||||
|
||||
trace_kvm_access_fault(fault_ipa);
|
||||
|
|
|
|||
|
|
@ -4668,7 +4668,10 @@ static void perform_access(struct kvm_vcpu *vcpu,
|
|||
* that we don't know how to handle. This certainly qualifies
|
||||
* as a gross bug that should be fixed right away.
|
||||
*/
|
||||
BUG_ON(!r->access);
|
||||
if (!r->access) {
|
||||
bad_trap(vcpu, params, r, "register access");
|
||||
return;
|
||||
}
|
||||
|
||||
/* Skip instruction if instructed so */
|
||||
if (likely(r->access(vcpu, params, r)))
|
||||
|
|
|
|||
|
|
@ -296,3 +296,31 @@ void kvm_compute_final_ctr_el0(struct alt_instr *alt,
|
|||
generate_mov_q(read_sanitised_ftr_reg(SYS_CTR_EL0),
|
||||
origptr, updptr, nr_inst);
|
||||
}
|
||||
|
||||
void kvm_pan_patch_el2_entry(struct alt_instr *alt,
|
||||
__le32 *origptr, __le32 *updptr, int nr_inst)
|
||||
{
|
||||
/*
|
||||
* If we're running at EL1 without hVHE, then SCTLR_EL2.SPAN means
|
||||
* nothing to us (it is RES1), and we don't need to set PSTATE.PAN
|
||||
* to anything useful.
|
||||
*/
|
||||
if (!is_kernel_in_hyp_mode() && !cpus_have_cap(ARM64_KVM_HVHE))
|
||||
return;
|
||||
|
||||
/*
|
||||
* Leap of faith: at this point, we must be running VHE one way or
|
||||
* another, and FEAT_PAN is required to be implemented. If KVM
|
||||
* explodes at runtime because your system does not abide by this
|
||||
* requirement, call your favourite HW vendor, they have screwed up.
|
||||
*
|
||||
* We don't expect hVHE to access any userspace mapping, so always
|
||||
* set PSTATE.PAN on enty. Same thing if we have PAN enabled on an
|
||||
* EL2 kernel. Only force it to 0 if we have not configured PAN in
|
||||
* the kernel (and you know this is really silly).
|
||||
*/
|
||||
if (cpus_have_cap(ARM64_KVM_HVHE) || IS_ENABLED(CONFIG_ARM64_PAN))
|
||||
*updptr = cpu_to_le32(ENCODE_PSTATE(1, PAN));
|
||||
else
|
||||
*updptr = cpu_to_le32(ENCODE_PSTATE(0, PAN));
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user