mirror of
https://github.com/torvalds/linux.git
synced 2026-07-31 19:47:08 +02:00
Merge c3e0e1e23c ("Merge tag 'irq_urgent_for_v6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip") into android-mainline
Steps on the way to 6.0-final Signed-off-by: Greg Kroah-Hartman <gregkh@google.com> Change-Id: I7747e37514b804a84bce55ae6f0f59f9b6d11fdc
This commit is contained in:
commit
a937dcef6c
|
|
@ -8,7 +8,6 @@
|
|||
#include <linux/err.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/pm_clock.h>
|
||||
#include <linux/pm_domain.h>
|
||||
#include <linux/scmi_protocol.h>
|
||||
|
||||
|
|
@ -53,27 +52,6 @@ static int scmi_pd_power_off(struct generic_pm_domain *domain)
|
|||
return scmi_pd_power(domain, false);
|
||||
}
|
||||
|
||||
static int scmi_pd_attach_dev(struct generic_pm_domain *pd, struct device *dev)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = pm_clk_create(dev);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = of_pm_clk_add_clks(dev);
|
||||
if (ret >= 0)
|
||||
return 0;
|
||||
|
||||
pm_clk_destroy(dev);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void scmi_pd_detach_dev(struct generic_pm_domain *pd, struct device *dev)
|
||||
{
|
||||
pm_clk_destroy(dev);
|
||||
}
|
||||
|
||||
static int scmi_pm_domain_probe(struct scmi_device *sdev)
|
||||
{
|
||||
int num_domains, i;
|
||||
|
|
@ -124,10 +102,6 @@ static int scmi_pm_domain_probe(struct scmi_device *sdev)
|
|||
scmi_pd->genpd.name = scmi_pd->name;
|
||||
scmi_pd->genpd.power_off = scmi_pd_power_off;
|
||||
scmi_pd->genpd.power_on = scmi_pd_power_on;
|
||||
scmi_pd->genpd.attach_dev = scmi_pd_attach_dev;
|
||||
scmi_pd->genpd.detach_dev = scmi_pd_detach_dev;
|
||||
scmi_pd->genpd.flags = GENPD_FLAG_PM_CLK |
|
||||
GENPD_FLAG_ACTIVE_WAKEUP;
|
||||
|
||||
pm_genpd_init(&scmi_pd->genpd, NULL,
|
||||
state == SCMI_POWER_STATE_GENERIC_OFF);
|
||||
|
|
|
|||
|
|
@ -561,6 +561,11 @@ config IRQ_LOONGARCH_CPU
|
|||
select GENERIC_IRQ_CHIP
|
||||
select IRQ_DOMAIN
|
||||
select GENERIC_IRQ_EFFECTIVE_AFF_MASK
|
||||
select LOONGSON_LIOINTC
|
||||
select LOONGSON_EIOINTC
|
||||
select LOONGSON_PCH_PIC
|
||||
select LOONGSON_PCH_MSI
|
||||
select LOONGSON_PCH_LPC
|
||||
help
|
||||
Support for the LoongArch CPU Interrupt Controller. For details of
|
||||
irq chip hierarchy on LoongArch platforms please read the document
|
||||
|
|
@ -623,8 +628,9 @@ config LOONGSON_PCH_MSI
|
|||
|
||||
config LOONGSON_PCH_LPC
|
||||
bool "Loongson PCH LPC Controller"
|
||||
depends on LOONGARCH
|
||||
depends on MACH_LOONGSON64
|
||||
default (MACH_LOONGSON64 && LOONGARCH)
|
||||
default MACH_LOONGSON64
|
||||
select IRQ_DOMAIN_HIERARCHY
|
||||
help
|
||||
Support for the Loongson PCH LPC Controller.
|
||||
|
|
|
|||
|
|
@ -1574,13 +1574,15 @@ static int its_select_cpu(struct irq_data *d,
|
|||
const struct cpumask *aff_mask)
|
||||
{
|
||||
struct its_device *its_dev = irq_data_get_irq_chip_data(d);
|
||||
cpumask_var_t tmpmask;
|
||||
static DEFINE_RAW_SPINLOCK(tmpmask_lock);
|
||||
static struct cpumask __tmpmask;
|
||||
struct cpumask *tmpmask;
|
||||
unsigned long flags;
|
||||
int cpu, node;
|
||||
|
||||
if (!alloc_cpumask_var(&tmpmask, GFP_ATOMIC))
|
||||
return -ENOMEM;
|
||||
|
||||
node = its_dev->its->numa_node;
|
||||
tmpmask = &__tmpmask;
|
||||
|
||||
raw_spin_lock_irqsave(&tmpmask_lock, flags);
|
||||
|
||||
if (!irqd_affinity_is_managed(d)) {
|
||||
/* First try the NUMA node */
|
||||
|
|
@ -1634,7 +1636,7 @@ static int its_select_cpu(struct irq_data *d,
|
|||
cpu = cpumask_pick_least_loaded(d, tmpmask);
|
||||
}
|
||||
out:
|
||||
free_cpumask_var(tmpmask);
|
||||
raw_spin_unlock_irqrestore(&tmpmask_lock, flags);
|
||||
|
||||
pr_debug("IRQ%d -> %*pbl CPU%d\n", d->irq, cpumask_pr_args(aff_mask), cpu);
|
||||
return cpu;
|
||||
|
|
|
|||
|
|
@ -716,7 +716,7 @@ static int stm32_exti_h_domain_alloc(struct irq_domain *dm,
|
|||
|
||||
irq_domain_set_hwirq_and_chip(dm, virq, hwirq, chip, chip_data);
|
||||
|
||||
if (!host_data->drv_data || !host_data->drv_data->desc_irqs)
|
||||
if (!host_data->drv_data->desc_irqs)
|
||||
return -EINVAL;
|
||||
|
||||
desc_irq = host_data->drv_data->desc_irqs[hwirq];
|
||||
|
|
|
|||
|
|
@ -870,7 +870,8 @@ int mmc_sd_get_cid(struct mmc_host *host, u32 ocr, u32 *cid, u32 *rocr)
|
|||
* the CCS bit is set as well. We deliberately deviate from the spec in
|
||||
* regards to this, which allows UHS-I to be supported for SDSC cards.
|
||||
*/
|
||||
if (!mmc_host_is_spi(host) && rocr && (*rocr & SD_ROCR_S18A)) {
|
||||
if (!mmc_host_is_spi(host) && (ocr & SD_OCR_S18R) &&
|
||||
rocr && (*rocr & SD_ROCR_S18A)) {
|
||||
err = mmc_set_uhs_voltage(host, pocr);
|
||||
if (err == -EAGAIN) {
|
||||
retries--;
|
||||
|
|
|
|||
|
|
@ -34,7 +34,7 @@ static void mmc_hsq_pump_requests(struct mmc_hsq *hsq)
|
|||
spin_lock_irqsave(&hsq->lock, flags);
|
||||
|
||||
/* Make sure we are not already running a request now */
|
||||
if (hsq->mrq) {
|
||||
if (hsq->mrq || hsq->recovery_halt) {
|
||||
spin_unlock_irqrestore(&hsq->lock, flags);
|
||||
return;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -111,8 +111,8 @@
|
|||
#define CLK_DIV_MASK 0x7f
|
||||
|
||||
/* REG_BUS_WIDTH */
|
||||
#define BUS_WIDTH_8 BIT(2)
|
||||
#define BUS_WIDTH_4 BIT(1)
|
||||
#define BUS_WIDTH_4_SUPPORT BIT(3)
|
||||
#define BUS_WIDTH_4 BIT(2)
|
||||
#define BUS_WIDTH_1 BIT(0)
|
||||
|
||||
#define MMC_VDD_360 23
|
||||
|
|
@ -524,9 +524,6 @@ static void moxart_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
|
|||
case MMC_BUS_WIDTH_4:
|
||||
writel(BUS_WIDTH_4, host->base + REG_BUS_WIDTH);
|
||||
break;
|
||||
case MMC_BUS_WIDTH_8:
|
||||
writel(BUS_WIDTH_8, host->base + REG_BUS_WIDTH);
|
||||
break;
|
||||
default:
|
||||
writel(BUS_WIDTH_1, host->base + REG_BUS_WIDTH);
|
||||
break;
|
||||
|
|
@ -651,16 +648,8 @@ static int moxart_probe(struct platform_device *pdev)
|
|||
dmaengine_slave_config(host->dma_chan_rx, &cfg);
|
||||
}
|
||||
|
||||
switch ((readl(host->base + REG_BUS_WIDTH) >> 3) & 3) {
|
||||
case 1:
|
||||
if (readl(host->base + REG_BUS_WIDTH) & BUS_WIDTH_4_SUPPORT)
|
||||
mmc->caps |= MMC_CAP_4_BIT_DATA;
|
||||
break;
|
||||
case 2:
|
||||
mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
writel(0, host->base + REG_INTERRUPT_MASK);
|
||||
|
||||
|
|
|
|||
|
|
@ -3928,7 +3928,7 @@ bool sdhci_cqe_irq(struct sdhci_host *host, u32 intmask, int *cmd_error,
|
|||
|
||||
if (intmask & (SDHCI_INT_INDEX | SDHCI_INT_END_BIT | SDHCI_INT_CRC)) {
|
||||
*cmd_error = -EILSEQ;
|
||||
if (!mmc_op_tuning(host->cmd->opcode))
|
||||
if (!mmc_op_tuning(SDHCI_GET_CMD(sdhci_readw(host, SDHCI_COMMAND))))
|
||||
sdhci_err_stats_inc(host, CMD_CRC);
|
||||
} else if (intmask & SDHCI_INT_TIMEOUT) {
|
||||
*cmd_error = -ETIMEDOUT;
|
||||
|
|
@ -3938,7 +3938,7 @@ bool sdhci_cqe_irq(struct sdhci_host *host, u32 intmask, int *cmd_error,
|
|||
|
||||
if (intmask & (SDHCI_INT_DATA_END_BIT | SDHCI_INT_DATA_CRC)) {
|
||||
*data_error = -EILSEQ;
|
||||
if (!mmc_op_tuning(host->cmd->opcode))
|
||||
if (!mmc_op_tuning(SDHCI_GET_CMD(sdhci_readw(host, SDHCI_COMMAND))))
|
||||
sdhci_err_stats_inc(host, DAT_CRC);
|
||||
} else if (intmask & SDHCI_INT_DATA_TIMEOUT) {
|
||||
*data_error = -ETIMEDOUT;
|
||||
|
|
|
|||
|
|
@ -1788,42 +1788,6 @@ static inline void count_objcg_event(struct obj_cgroup *objcg,
|
|||
rcu_read_unlock();
|
||||
}
|
||||
|
||||
/**
|
||||
* get_mem_cgroup_from_obj - get a memcg associated with passed kernel object.
|
||||
* @p: pointer to object from which memcg should be extracted. It can be NULL.
|
||||
*
|
||||
* Retrieves the memory group into which the memory of the pointed kernel
|
||||
* object is accounted. If memcg is found, its reference is taken.
|
||||
* If a passed kernel object is uncharged, or if proper memcg cannot be found,
|
||||
* as well as if mem_cgroup is disabled, NULL is returned.
|
||||
*
|
||||
* Return: valid memcg pointer with taken reference or NULL.
|
||||
*/
|
||||
static inline struct mem_cgroup *get_mem_cgroup_from_obj(void *p)
|
||||
{
|
||||
struct mem_cgroup *memcg;
|
||||
|
||||
rcu_read_lock();
|
||||
do {
|
||||
memcg = mem_cgroup_from_obj(p);
|
||||
} while (memcg && !css_tryget(&memcg->css));
|
||||
rcu_read_unlock();
|
||||
return memcg;
|
||||
}
|
||||
|
||||
/**
|
||||
* mem_cgroup_or_root - always returns a pointer to a valid memory cgroup.
|
||||
* @memcg: pointer to a valid memory cgroup or NULL.
|
||||
*
|
||||
* If passed argument is not NULL, returns it without any additional checks
|
||||
* and changes. Otherwise, root_mem_cgroup is returned.
|
||||
*
|
||||
* NOTE: root_mem_cgroup can be NULL during early boot.
|
||||
*/
|
||||
static inline struct mem_cgroup *mem_cgroup_or_root(struct mem_cgroup *memcg)
|
||||
{
|
||||
return memcg ? memcg : root_mem_cgroup;
|
||||
}
|
||||
#else
|
||||
static inline bool mem_cgroup_kmem_disabled(void)
|
||||
{
|
||||
|
|
@ -1880,15 +1844,6 @@ static inline void count_objcg_event(struct obj_cgroup *objcg,
|
|||
{
|
||||
}
|
||||
|
||||
static inline struct mem_cgroup *get_mem_cgroup_from_obj(void *p)
|
||||
{
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static inline struct mem_cgroup *mem_cgroup_or_root(struct mem_cgroup *memcg)
|
||||
{
|
||||
return NULL;
|
||||
}
|
||||
#endif /* CONFIG_MEMCG_KMEM */
|
||||
|
||||
#if defined(CONFIG_MEMCG_KMEM) && defined(CONFIG_ZSWAP)
|
||||
|
|
|
|||
|
|
@ -18,7 +18,6 @@
|
|||
#include <linux/user_namespace.h>
|
||||
#include <linux/net_namespace.h>
|
||||
#include <linux/sched/task.h>
|
||||
#include <linux/sched/mm.h>
|
||||
#include <linux/uidgid.h>
|
||||
#include <linux/cookie.h>
|
||||
|
||||
|
|
@ -1144,13 +1143,7 @@ static int __register_pernet_operations(struct list_head *list,
|
|||
* setup_net() and cleanup_net() are not possible.
|
||||
*/
|
||||
for_each_net(net) {
|
||||
struct mem_cgroup *old, *memcg;
|
||||
|
||||
memcg = mem_cgroup_or_root(get_mem_cgroup_from_obj(net));
|
||||
old = set_active_memcg(memcg);
|
||||
error = ops_init(ops, net);
|
||||
set_active_memcg(old);
|
||||
mem_cgroup_put(memcg);
|
||||
if (error)
|
||||
goto out_undo;
|
||||
list_add_tail(&net->exit_list, &net_exit_list);
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user