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drm/i915/lt_phy: Add xe3plpd .dump_hw_state hook

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Add .dump_hw_state function pointer for xe3plpd platform
to support dpll framework. While at it, switch to use
drm_printer structure to print hw state information.

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260312080657.2648265-12-mika.kahola@intel.com
This commit is contained in:
Mika Kahola 2026-03-12 08:06:44 +00:00
parent 658b554a8b
commit a8acd1a61a
4 changed files with 19 additions and 12 deletions
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5
drivers/gpu/drm/i915/display/intel_display.c
View File

@ -5070,15 +5070,14 @@ pipe_config_lt_phy_pll_mismatch(struct drm_printer *p, bool fastset,
const struct intel_lt_phy_pll_state *a,
const struct intel_lt_phy_pll_state *b)
{
struct intel_display *display = to_intel_display(crtc);
char *chipname = "LTPHY";
pipe_config_mismatch(p, fastset, crtc, name, chipname);
drm_printf(p, "expected:\n");
intel_lt_phy_dump_hw_state(display, a);
intel_lt_phy_dump_hw_state(p, a);
drm_printf(p, "found:\n");
intel_lt_phy_dump_hw_state(display, b);
intel_lt_phy_dump_hw_state(p, b);
}
bool

7
drivers/gpu/drm/i915/display/intel_dpll_mgr.c
View File

@ -4649,6 +4649,12 @@ static int xe3plpd_compute_dplls(struct intel_atomic_state *state,
return xe3plpd_compute_non_tc_phy_dpll(state, crtc, encoder);
}
static void xe3plpd_dump_hw_state(struct drm_printer *p,
const struct intel_dpll_hw_state *dpll_hw_state)
{
intel_lt_phy_dump_hw_state(p, &dpll_hw_state->ltpll);
}
__maybe_unused
static const struct intel_dpll_mgr xe3plpd_pll_mgr = {
.dpll_info = xe3plpd_plls,
@ -4657,6 +4663,7 @@ static const struct intel_dpll_mgr xe3plpd_pll_mgr = {
.put_dplls = icl_put_dplls,
.update_active_dpll = icl_update_active_dpll,
.update_ref_clks = icl_update_dpll_ref_clks,
.dump_hw_state = xe3plpd_dump_hw_state,
};
/**

16
drivers/gpu/drm/i915/display/intel_lt_phy.c
View File

@ -2165,23 +2165,23 @@ void intel_lt_phy_set_signal_levels(struct intel_encoder *encoder,
intel_lt_phy_transaction_end(encoder, wakeref);
}
void intel_lt_phy_dump_hw_state(struct intel_display *display,
void intel_lt_phy_dump_hw_state(struct drm_printer *p,
const struct intel_lt_phy_pll_state *hw_state)
{
int i, j;
drm_dbg_kms(display->drm, "lt_phy_pll_hw_state: ssc enabled: %d, tbt mode: %d\n",
hw_state->ssc_enabled, hw_state->tbt_mode);
drm_printf(p, "lt_phy_pll_hw_state: ssc enabled: %d, tbt mode: %d\n",
hw_state->ssc_enabled, hw_state->tbt_mode);
for (i = 0; i < 3; i++) {
drm_dbg_kms(display->drm, "config[%d] = 0x%.4x,\n",
i, hw_state->config[i]);
drm_printf(p, "config[%d] = 0x%.4x,\n",
i, hw_state->config[i]);
}
for (i = 0; i <= 12; i++)
for (j = 3; j >= 0; j--)
drm_dbg_kms(display->drm, "vdr_data[%d][%d] = 0x%.4x,\n",
i, j, hw_state->data[i][j]);
drm_printf(p, "vdr_data[%d][%d] = 0x%.4x,\n",
i, j, hw_state->data[i][j]);
}
bool
@ -2336,7 +2336,7 @@ static void intel_lt_phy_pll_verify_clock(struct intel_display *display,
drm_printf(&p, "PLL state %s (%s):\n",
pll_state_name,
is_precomputed_state ? "precomputed" : "computed");
intel_lt_phy_dump_hw_state(display, pll_state);
intel_lt_phy_dump_hw_state(&p, pll_state);
}
static void intel_lt_phy_pll_verify_params(struct intel_display *display,

3
drivers/gpu/drm/i915/display/intel_lt_phy.h
View File

@ -8,6 +8,7 @@
#include <linux/types.h>
struct drm_printer;
struct intel_atomic_state;
struct intel_display;
struct intel_encoder;
@ -26,7 +27,7 @@ int intel_lt_phy_calc_port_clock(struct intel_display *display,
const struct intel_lt_phy_pll_state *lt_state);
void intel_lt_phy_set_signal_levels(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state);
void intel_lt_phy_dump_hw_state(struct intel_display *display,
void intel_lt_phy_dump_hw_state(struct drm_printer *p,
const struct intel_lt_phy_pll_state *hw_state);
bool
intel_lt_phy_pll_compare_hw_state(const struct intel_lt_phy_pll_state *a,