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net: airoha: Initialize PPE UPDMEM source-mac table

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UPDMEM source-mac table is a key-value map used to store devices mac
addresses according to the port identifier. UPDMEM source mac table is
used during IPv6 traffic hw acceleration since PPE entries, for space
constraints, do not contain the full source mac address but just the
identifier in the UPDMEM source-mac table.
Configure UPDMEM source-mac table with device mac addresses and set
the source-mac ID field for PPE IPv6 entries in order to select the
proper device mac address as source mac for L3 IPv6 hw accelerated traffic.

Fixes: 00a7678310 ("net: airoha: Introduce flowtable offload support")
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Reviewed-by: Simon Horman <horms@kernel.org>
Link: https://patch.msgid.link/20250602-airoha-flowtable-ipv6-fix-v2-1-3287f8b55214@kernel.org
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
This commit is contained in:
Lorenzo Bianconi 2025-06-02 12:55:37 +02:00 committed by Paolo Abeni
parent d3f2a9587e
commit a869d3a5eb
4 changed files with 38 additions and 1 deletions
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2
drivers/net/ethernet/airoha/airoha_eth.c
View File

@ -84,6 +84,8 @@ static void airoha_set_macaddr(struct airoha_gdm_port *port, const u8 *addr)
val = (addr[3] << 16) | (addr[4] << 8) | addr[5];
airoha_fe_wr(eth, REG_FE_MAC_LMIN(reg), val);
airoha_fe_wr(eth, REG_FE_MAC_LMAX(reg), val);
airoha_ppe_init_upd_mem(port);
}
static void airoha_set_gdm_port_fwd_cfg(struct airoha_eth *eth, u32 addr,

1
drivers/net/ethernet/airoha/airoha_eth.h
View File

@ -614,6 +614,7 @@ void airoha_ppe_check_skb(struct airoha_ppe *ppe, struct sk_buff *skb,
int airoha_ppe_setup_tc_block_cb(struct net_device *dev, void *type_data);
int airoha_ppe_init(struct airoha_eth *eth);
void airoha_ppe_deinit(struct airoha_eth *eth);
void airoha_ppe_init_upd_mem(struct airoha_gdm_port *port);
struct airoha_foe_entry *airoha_ppe_foe_get_entry(struct airoha_ppe *ppe,
u32 hash);
void airoha_ppe_foe_entry_get_stats(struct airoha_ppe *ppe, u32 hash,

26
drivers/net/ethernet/airoha/airoha_ppe.c
View File

@ -223,6 +223,7 @@ static int airoha_ppe_foe_entry_prepare(struct airoha_eth *eth,
int dsa_port = airoha_get_dsa_port(&dev);
struct airoha_foe_mac_info_common *l2;
u32 qdata, ports_pad, val;
u8 smac_id = 0xf;
memset(hwe, 0, sizeof(*hwe));
@ -257,6 +258,8 @@ static int airoha_ppe_foe_entry_prepare(struct airoha_eth *eth,
*/
if (airhoa_is_lan_gdm_port(port))
val |= AIROHA_FOE_IB2_FAST_PATH;
smac_id = port->id;
}
if (is_multicast_ether_addr(data->eth.h_dest))
@ -291,7 +294,7 @@ static int airoha_ppe_foe_entry_prepare(struct airoha_eth *eth,
hwe->ipv4.l2.src_mac_lo =
get_unaligned_be16(data->eth.h_source + 4);
} else {
l2->src_mac_hi = FIELD_PREP(AIROHA_FOE_MAC_SMAC_ID, 0xf);
l2->src_mac_hi = FIELD_PREP(AIROHA_FOE_MAC_SMAC_ID, smac_id);
}
if (data->vlan.num) {
@ -1238,6 +1241,27 @@ void airoha_ppe_check_skb(struct airoha_ppe *ppe, struct sk_buff *skb,
airoha_ppe_foe_insert_entry(ppe, skb, hash);
}
void airoha_ppe_init_upd_mem(struct airoha_gdm_port *port)
{
struct airoha_eth *eth = port->qdma->eth;
struct net_device *dev = port->dev;
const u8 *addr = dev->dev_addr;
u32 val;
val = (addr[2] << 24) | (addr[3] << 16) | (addr[4] << 8) | addr[5];
airoha_fe_wr(eth, REG_UPDMEM_DATA(0), val);
airoha_fe_wr(eth, REG_UPDMEM_CTRL(0),
FIELD_PREP(PPE_UPDMEM_ADDR_MASK, port->id) |
PPE_UPDMEM_WR_MASK | PPE_UPDMEM_REQ_MASK);
val = (addr[0] << 8) | addr[1];
airoha_fe_wr(eth, REG_UPDMEM_DATA(0), val);
airoha_fe_wr(eth, REG_UPDMEM_CTRL(0),
FIELD_PREP(PPE_UPDMEM_ADDR_MASK, port->id) |
FIELD_PREP(PPE_UPDMEM_OFFSET_MASK, 1) |
PPE_UPDMEM_WR_MASK | PPE_UPDMEM_REQ_MASK);
}
int airoha_ppe_init(struct airoha_eth *eth)
{
struct airoha_ppe *ppe;

10
drivers/net/ethernet/airoha/airoha_regs.h
View File

@ -313,6 +313,16 @@
#define REG_PPE_RAM_BASE(_n) (((_n) ? PPE2_BASE : PPE1_BASE) + 0x320)
#define REG_PPE_RAM_ENTRY(_m, _n) (REG_PPE_RAM_BASE(_m) + ((_n) << 2))
#define REG_UPDMEM_CTRL(_n) (((_n) ? PPE2_BASE : PPE1_BASE) + 0x370)
#define PPE_UPDMEM_ACK_MASK BIT(31)
#define PPE_UPDMEM_ADDR_MASK GENMASK(11, 8)
#define PPE_UPDMEM_OFFSET_MASK GENMASK(7, 4)
#define PPE_UPDMEM_SEL_MASK GENMASK(3, 2)
#define PPE_UPDMEM_WR_MASK BIT(1)
#define PPE_UPDMEM_REQ_MASK BIT(0)
#define REG_UPDMEM_DATA(_n) (((_n) ? PPE2_BASE : PPE1_BASE) + 0x374)
#define REG_FE_GDM_TX_OK_PKT_CNT_H(_n) (GDM_BASE(_n) + 0x280)
#define REG_FE_GDM_TX_OK_BYTE_CNT_H(_n) (GDM_BASE(_n) + 0x284)
#define REG_FE_GDM_TX_ETH_PKT_CNT_H(_n) (GDM_BASE(_n) + 0x288)