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drm/amdgpu: split amdgpu_ttm_set_buffer_funcs_status in 2 funcs
Makes a code slightly clearer and reduces indentation. --- v5: use amdgpu_in_reset in amdgpu_ttm_disable_buffer_funcs --- Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Suggested-by: Christian König <christian.koenig@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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5bd8aab55b
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a80df57157
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@ -2463,7 +2463,7 @@ static int amdgpu_device_ip_init(struct amdgpu_device *adev)
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if (r)
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goto init_failed;
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amdgpu_ttm_set_buffer_funcs_status(adev, true);
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amdgpu_ttm_enable_buffer_funcs(adev);
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/* Don't init kfd if whole hive need to be reset during init */
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if (adev->init_lvl->level != AMDGPU_INIT_LEVEL_MINIMAL_XGMI) {
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@ -3147,7 +3147,7 @@ static int amdgpu_device_ip_suspend(struct amdgpu_device *adev)
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amdgpu_virt_request_full_gpu(adev, false);
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}
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amdgpu_ttm_set_buffer_funcs_status(adev, false);
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amdgpu_ttm_disable_buffer_funcs(adev);
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r = amdgpu_device_ip_suspend_phase1(adev);
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if (r)
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@ -3362,7 +3362,7 @@ static int amdgpu_device_ip_resume(struct amdgpu_device *adev)
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r = amdgpu_device_ip_resume_phase2(adev);
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amdgpu_ttm_set_buffer_funcs_status(adev, true);
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amdgpu_ttm_enable_buffer_funcs(adev);
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if (r)
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return r;
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@ -4213,7 +4213,7 @@ void amdgpu_device_fini_hw(struct amdgpu_device *adev)
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/* disable ras feature must before hw fini */
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amdgpu_ras_pre_fini(adev);
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amdgpu_ttm_set_buffer_funcs_status(adev, false);
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amdgpu_ttm_disable_buffer_funcs(adev);
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/*
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* device went through surprise hotplug; we need to destroy topology
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@ -4480,7 +4480,7 @@ int amdgpu_device_suspend(struct drm_device *dev, bool notify_clients)
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if (r)
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goto unwind_userq;
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amdgpu_ttm_set_buffer_funcs_status(adev, false);
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amdgpu_ttm_disable_buffer_funcs(adev);
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amdgpu_fence_driver_hw_fini(adev);
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@ -4494,7 +4494,7 @@ int amdgpu_device_suspend(struct drm_device *dev, bool notify_clients)
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return 0;
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unwind_evict:
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amdgpu_ttm_set_buffer_funcs_status(adev, true);
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amdgpu_ttm_enable_buffer_funcs(adev);
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amdgpu_fence_driver_hw_init(adev);
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unwind_userq:
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@ -5228,7 +5228,7 @@ int amdgpu_device_reinit_after_reset(struct amdgpu_reset_context *reset_context)
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if (r)
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goto out;
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amdgpu_ttm_set_buffer_funcs_status(tmp_adev, true);
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amdgpu_ttm_enable_buffer_funcs(tmp_adev);
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r = amdgpu_device_ip_resume_phase3(tmp_adev);
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if (r)
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@ -2098,7 +2098,7 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
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}
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/* Change the size here instead of the init above so only lpfn is affected */
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amdgpu_ttm_set_buffer_funcs_status(adev, false);
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amdgpu_ttm_disable_buffer_funcs(adev);
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#ifdef CONFIG_64BIT
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#ifdef CONFIG_X86
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if (adev->gmc.xgmi.connected_to_cpu)
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@ -2278,116 +2278,92 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev)
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}
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/**
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* amdgpu_ttm_set_buffer_funcs_status - enable/disable use of buffer functions
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* amdgpu_ttm_enable_buffer_funcs - enable use of buffer functions
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*
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* @adev: amdgpu_device pointer
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* @enable: true when we can use buffer functions.
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*
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* Enable/disable use of buffer functions during suspend/resume. This should
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* Enable use of buffer functions during suspend/resume. This should
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* only be called at bootup or when userspace isn't running.
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*/
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void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu_device *adev, bool enable)
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void amdgpu_ttm_enable_buffer_funcs(struct amdgpu_device *adev)
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{
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struct ttm_resource_manager *man = ttm_manager_type(&adev->mman.bdev, TTM_PL_VRAM);
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u32 num_clear_entities, num_move_entities;
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uint64_t size;
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int r, i, j;
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if (!adev->mman.initialized || amdgpu_in_reset(adev) ||
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adev->mman.buffer_funcs_enabled == enable || adev->gmc.is_app_apu)
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adev->mman.buffer_funcs_enabled || adev->gmc.is_app_apu)
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return;
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if (enable) {
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if (!adev->mman.num_buffer_funcs_scheds) {
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dev_warn(adev->dev, "Not enabling DMA transfers for in kernel use");
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return;
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}
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if (!adev->mman.num_buffer_funcs_scheds) {
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dev_warn(adev->dev, "Not enabling DMA transfers for in kernel use");
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return;
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}
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/* default_entity doesn't need multiple schedulers so pass only 1. */
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r = amdgpu_ttm_buffer_entity_init(&adev->mman.gtt_mgr,
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&adev->mman.default_entity,
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DRM_SCHED_PRIORITY_KERNEL,
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adev->mman.buffer_funcs_scheds, 1, 0);
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if (r < 0) {
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dev_err(adev->dev,
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"Failed setting up TTM entity (%d)\n", r);
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return;
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}
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num_clear_entities = MIN(adev->mman.num_buffer_funcs_scheds, TTM_NUM_MOVE_FENCES);
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num_move_entities = MIN(adev->mman.num_buffer_funcs_scheds, TTM_NUM_MOVE_FENCES);
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adev->mman.clear_entities = kcalloc(num_clear_entities,
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sizeof(struct amdgpu_ttm_buffer_entity),
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GFP_KERNEL);
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atomic_set(&adev->mman.next_clear_entity, 0);
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if (!adev->mman.clear_entities)
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goto error_free_default_entity;
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adev->mman.num_clear_entities = num_clear_entities;
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for (i = 0; i < num_clear_entities; i++) {
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r = amdgpu_ttm_buffer_entity_init(
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&adev->mman.gtt_mgr,
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&adev->mman.clear_entities[i],
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DRM_SCHED_PRIORITY_NORMAL,
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adev->mman.buffer_funcs_scheds,
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adev->mman.num_buffer_funcs_scheds, 1);
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num_clear_entities = MIN(adev->mman.num_buffer_funcs_scheds, TTM_NUM_MOVE_FENCES);
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num_move_entities = MIN(adev->mman.num_buffer_funcs_scheds, TTM_NUM_MOVE_FENCES);
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/* default_entity doesn't need multiple schedulers so pass only 1. */
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r = amdgpu_ttm_buffer_entity_init(&adev->mman.gtt_mgr,
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&adev->mman.default_entity,
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DRM_SCHED_PRIORITY_KERNEL,
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adev->mman.buffer_funcs_scheds, 1, 0);
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if (r < 0) {
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dev_err(adev->dev,
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"Failed setting up TTM entity (%d)\n", r);
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return;
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}
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adev->mman.clear_entities = kcalloc(num_clear_entities,
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sizeof(struct amdgpu_ttm_buffer_entity),
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GFP_KERNEL);
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atomic_set(&adev->mman.next_clear_entity, 0);
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if (!adev->mman.clear_entities)
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for (j = 0; j < i; j++)
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amdgpu_ttm_buffer_entity_fini(
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&adev->mman.gtt_mgr, &adev->mman.clear_entities[j]);
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adev->mman.num_clear_entities = 0;
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kfree(adev->mman.clear_entities);
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goto error_free_default_entity;
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adev->mman.num_clear_entities = num_clear_entities;
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for (i = 0; i < num_clear_entities; i++) {
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r = amdgpu_ttm_buffer_entity_init(
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&adev->mman.gtt_mgr,
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&adev->mman.clear_entities[i],
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DRM_SCHED_PRIORITY_NORMAL,
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adev->mman.buffer_funcs_scheds,
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adev->mman.num_buffer_funcs_scheds, 1);
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if (r < 0) {
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for (j = 0; j < i; j++)
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amdgpu_ttm_buffer_entity_fini(
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&adev->mman.gtt_mgr, &adev->mman.clear_entities[j]);
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kfree(adev->mman.clear_entities);
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adev->mman.num_clear_entities = 0;
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adev->mman.clear_entities = NULL;
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goto error_free_default_entity;
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}
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}
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}
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adev->mman.num_move_entities = num_move_entities;
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atomic_set(&adev->mman.next_move_entity, 0);
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for (i = 0; i < num_move_entities; i++) {
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r = amdgpu_ttm_buffer_entity_init(
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&adev->mman.gtt_mgr,
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&adev->mman.move_entities[i],
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DRM_SCHED_PRIORITY_NORMAL,
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adev->mman.buffer_funcs_scheds,
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adev->mman.num_buffer_funcs_scheds, 2);
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adev->mman.num_move_entities = num_move_entities;
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atomic_set(&adev->mman.next_move_entity, 0);
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for (i = 0; i < num_move_entities; i++) {
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r = amdgpu_ttm_buffer_entity_init(
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&adev->mman.gtt_mgr,
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&adev->mman.move_entities[i],
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DRM_SCHED_PRIORITY_NORMAL,
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adev->mman.buffer_funcs_scheds,
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adev->mman.num_buffer_funcs_scheds, 2);
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if (r < 0) {
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for (j = 0; j < i; j++)
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amdgpu_ttm_buffer_entity_fini(
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&adev->mman.gtt_mgr, &adev->mman.move_entities[j]);
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adev->mman.num_move_entities = 0;
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goto error_free_clear_entities;
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}
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if (r < 0) {
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for (j = 0; j < i; j++)
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amdgpu_ttm_buffer_entity_fini(
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&adev->mman.gtt_mgr,
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&adev->mman.move_entities[j]);
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adev->mman.num_move_entities = 0;
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goto error_free_clear_entities;
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}
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} else {
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amdgpu_ttm_buffer_entity_fini(&adev->mman.gtt_mgr,
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&adev->mman.default_entity);
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for (i = 0; i < adev->mman.num_clear_entities; i++)
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amdgpu_ttm_buffer_entity_fini(&adev->mman.gtt_mgr,
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&adev->mman.clear_entities[i]);
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for (i = 0; i < adev->mman.num_move_entities; i++)
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amdgpu_ttm_buffer_entity_fini(&adev->mman.gtt_mgr,
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&adev->mman.move_entities[i]);
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/* Drop all the old fences since re-creating the scheduler entities
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* will allocate new contexts.
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*/
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ttm_resource_manager_cleanup(man);
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kfree(adev->mman.clear_entities);
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adev->mman.clear_entities = NULL;
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adev->mman.num_clear_entities = 0;
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adev->mman.num_move_entities = 0;
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}
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/* this just adjusts TTM size idea, which sets lpfn to the correct value */
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if (enable)
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size = adev->gmc.real_vram_size;
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else
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size = adev->gmc.visible_vram_size;
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man->size = size;
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adev->mman.buffer_funcs_enabled = enable;
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man->size = adev->gmc.real_vram_size;
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adev->mman.buffer_funcs_enabled = true;
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return;
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@ -2403,6 +2379,42 @@ void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu_device *adev, bool enable)
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&adev->mman.default_entity);
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}
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/**
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* amdgpu_ttm_disable_buffer_funcs - disable use of buffer functions
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*
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* @adev: amdgpu_device pointer
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*/
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void amdgpu_ttm_disable_buffer_funcs(struct amdgpu_device *adev)
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{
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struct ttm_resource_manager *man =
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ttm_manager_type(&adev->mman.bdev, TTM_PL_VRAM);
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int i;
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if (!adev->mman.buffer_funcs_enabled || amdgpu_in_reset(adev))
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return;
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amdgpu_ttm_buffer_entity_fini(&adev->mman.gtt_mgr,
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&adev->mman.default_entity);
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for (i = 0; i < adev->mman.num_move_entities; i++)
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amdgpu_ttm_buffer_entity_fini(&adev->mman.gtt_mgr,
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&adev->mman.move_entities[i]);
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for (i = 0; i < adev->mman.num_clear_entities; i++)
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amdgpu_ttm_buffer_entity_fini(&adev->mman.gtt_mgr,
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&adev->mman.clear_entities[i]);
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/* Drop all the old fences since re-creating the scheduler entities
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* will allocate new contexts.
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*/
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ttm_resource_manager_cleanup(man);
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kfree(adev->mman.clear_entities);
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adev->mman.clear_entities = NULL;
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adev->mman.num_clear_entities = 0;
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adev->mman.num_move_entities = 0;
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man->size = adev->gmc.visible_vram_size;
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adev->mman.buffer_funcs_enabled = false;
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}
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static int amdgpu_ttm_prepare_job(struct amdgpu_device *adev,
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struct amdgpu_ttm_buffer_entity *entity,
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unsigned int num_dw,
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@ -185,8 +185,8 @@ void amdgpu_ttm_unmark_vram_reserved(struct amdgpu_device *adev,
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int amdgpu_ttm_init(struct amdgpu_device *adev);
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void amdgpu_ttm_fini(struct amdgpu_device *adev);
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void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu_device *adev,
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bool enable);
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void amdgpu_ttm_enable_buffer_funcs(struct amdgpu_device *adev);
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void amdgpu_ttm_disable_buffer_funcs(struct amdgpu_device *adev);
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int amdgpu_copy_buffer(struct amdgpu_device *adev,
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struct amdgpu_ttm_buffer_entity *entity,
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uint64_t src_offset,
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