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net/mlx5: Add UD and UC packet pacing caps

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Add the needed capabilities in mlx5_ifc to support packet pacing for UC
and UD QPs.

Signed-off-by: Maher Sanalla <msanalla@nvidia.com>
Reviewed-by: Michael Guralnik <michaelgur@nvidia.com>
Signed-off-by: Edward Srouji <edwards@nvidia.com>
Link: https://patch.msgid.link/20260524-packet-pacing-v1-1-3d79439f8d08@nvidia.com
Signed-off-by: Leon Romanovsky <leon@kernel.org>
This commit is contained in:
Maher Sanalla 2026-05-24 18:38:02 +03:00 committed by Leon Romanovsky
parent 942cd47faa
commit a7b8dac888
1 changed files with 6 additions and 2 deletions
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8
include/linux/mlx5/mlx5_ifc.h
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@ -1116,7 +1116,10 @@ struct mlx5_ifc_qos_cap_bits {
u8 log_esw_max_sched_depth[0x4];
u8 reserved_at_10[0x10];
u8 reserved_at_20[0x9];
u8 reserved_at_20[0x2];
u8 packet_pacing_req_ud[0x1];
u8 packet_pacing_req_uc[0x1];
u8 reserved_at_24[0x5];
u8 esw_cross_esw_sched[0x1];
u8 reserved_at_2a[0x1];
u8 log_max_qos_nic_queue_group[0x5];
@ -3707,7 +3710,8 @@ struct mlx5_ifc_qpc_bits {
u8 cur_retry_count[0x3];
u8 reserved_at_39b[0x5];
u8 reserved_at_3a0[0x20];
u8 reserved_at_3a0[0x10];
u8 packet_pacing_rate_limit_index[0x10];
u8 reserved_at_3c0[0x8];
u8 next_send_psn[0x18];