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Device tree bindings updates for v6.16-rc1

Browse Source 
Convert the legacy interrupt controller (LIC) and APBDMA controller
 device tree bindings from freeform text to dt-schema.
 
 Document the ASUS Transformer Pad TF300TL compatible string and add
 missing compatible strings for newer generations of the Tegra CEC.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmgebUYACgkQ3SOs138+
 s6HwIg//VQyesSydRfzS204EjSvsa7ELtGrJSiiZbskUjdV+i2AxFN/FfpGroSfB
 cPlu5IG41QUi0eFLWPq3n9s5qdkD7ie6P3SEqXF6JxQRfI857E2RxLNEDRzb2nuj
 nX/x7s6zJJFJ4exTOBQBpKk8+tcOH9W0YFBx4Z9rWRr9ziN9xgMNrixU8VjvYXEq
 hInQMq8kSxxqRGocgVpYQ5W554xd9ZFDznxr4E1ocXeN0h2WCXTRz4t1zsx55xZi
 inY+l43d5S/IJkiCO/IlTPF14eTQ5ni6XRddk/VSjTKBksTylRVZT+Yd2HhkpAhu
 pIFjl7E28s7OEJT14H8rj2HRMx5VTCL6Eh/wouwfqfHPg5/wrKe+PFpPb+YlCzxV
 Pq4cmJFj4K0v9NE1NqqPzNnYG8P/MFdVIO8oaF8c7kHLTg7duKand6NUjsRccmXu
 ENmwDl7JXmz3ZHRGvt/w+DkUhI9E/3GYjaylFY8zpSc3cu1ReXNN9zwTUkcqi08n
 lHTSURFKpO9rL2jAuTJfswGdIGHAv95ECOavGQ0D55qUTyacB4EYlrqIyC5nwZOD
 egMKtUGtEl6wfw8RSU0EJlzESjd3KmA2AHEXqSROo+2892qkpulnJH41Nq3ldSRF
 hk/kJCxNFejhZ4nEyXQ0Y7HHXwHHUYjnN5Q+MBTYRzCCZsEw+bY=
 =bNoB
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmged+gACgkQYKtH/8kJ
 Uie8HxAAv2PSNLW0zBMhoECBZVbKA8/JGozW2ty0VYzXQ0QRY501kkS4tDCBq2Eq
 2hU8hyzl9axiPZ0SItLbSArLzcDquVunwVYI8of9M33eV3Ii5U8lwi1Ne2ooRtky
 Cm54QwBTV9DfS8rx2uFWjHJefsrW48XbeUFdnW0np/mnFB0fHgS/AoanYbA51rD2
 4K5EFE0YEB4+sJU6bXf4TV2Puw1osoB6qwWYnYBo3UC5rUPNZvGfS1COuxqzuVaq
 8/Vtmf9ZxJ9xzYUwF4RGgju+7AChrjFltW12PKRrh+9nsOGkMzHxGOc0HVOlLSwJ
 y28ewT1up1FQAmVoePy64lvK1OYQWkCtGmUMbdbeTKBGUrlSLVc1ZlC5fXL3WpYZ
 9LdMT2bVspMmv9iDS/+Vwa5D5fDRo226Q9buTxR7Nb/4phXmw0b6N8AoLk5Oyurm
 TXixzWgwTML8HT0JvwAx0a8CuDRuO7HB6G9/kGaZc8phwdDJL9ri0AKKK/AuiJI/
 23jTdurGScnQ2AgUuzP0mMdzckUikkzfldGPapEBdDLrs2bNROT9a04k2LVjYvCc
 pqiP4uHVIeVcG6T7JDbPQ1fX6P/TXpU+auXNly6kXL2Sd9sowMzkicZDbn7dNOj8
 4+h7L+px2QJ98bZukwPIppV4OCQXwVKmpC3zKHy+GbQfErQ1p9E=
 =K+FD
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-6.16-dt-bindings' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt

Device tree bindings updates for v6.16-rc1

Convert the legacy interrupt controller (LIC) and APBDMA controller
device tree bindings from freeform text to dt-schema.

Document the ASUS Transformer Pad TF300TL compatible string and add
missing compatible strings for newer generations of the Tegra CEC.

* tag 'tegra-for-6.16-dt-bindings' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  media: dt-bindings: Document Tegra186 and Tegra194 cec
  dt-bindings: arm: tegra: Add Asus Transformer Pad TF300TL
  dt-bindings: arm: tegra: Group Tegra30 based ASUS Transformers
  dt-bindings: interrupt-controller: Convert nvidia,tegra20-ictlr to DT schema
  dt-bindings: dma: nvidia,tegra20-apbdma: convert text based binding to json schema

Link: https://lore.kernel.org/r/20250509212604.2849901-1-treding@nvidia.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2025-05-09 23:47:14 +02:00
commit a793e78ef6
6 changed files with 190 additions and 100 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

19
Documentation/devicetree/bindings/arm/tegra.yaml
View File

@ -52,17 +52,14 @@ properties:
- nvidia,cardhu-a04
- const: nvidia,cardhu
- const: nvidia,tegra30
- items:
- const: asus,tf201
- const: nvidia,tegra30
- items:
- const: asus,tf300t
- const: nvidia,tegra30
- items:
- const: asus,tf300tg
- const: nvidia,tegra30
- items:
- const: asus,tf700t
- description: ASUS Transformers Device family
items:
- enum:
- asus,tf201
- asus,tf300t
- asus,tf300tg
- asus,tf300tl
- asus,tf700t
- const: nvidia,tegra30
- description: LG Optimus 4X P880
items:

44
Documentation/devicetree/bindings/dma/nvidia,tegra20-apbdma.txt
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@ -1,44 +0,0 @@
* NVIDIA Tegra APB DMA controller
Required properties:
- compatible: Should be "nvidia,<chip>-apbdma"
- reg: Should contain DMA registers location and length. This should include
all of the per-channel registers.
- interrupts: Should contain all of the per-channel DMA interrupts.
- clocks: Must contain one entry, for the module clock.
See ../clocks/clock-bindings.txt for details.
- resets : Must contain an entry for each entry in reset-names.
See ../reset/reset.txt for details.
- reset-names : Must include the following entries:
- dma
- #dma-cells : Must be <1>. This dictates the length of DMA specifiers in
client nodes' dmas properties. The specifier represents the DMA request
select value for the peripheral. For more details, consult the Tegra TRM's
documentation of the APB DMA channel control register REQ_SEL field.
Examples:
apbdma: dma@6000a000 {
compatible = "nvidia,tegra20-apbdma";
reg = <0x6000a000 0x1200>;
interrupts = < 0 136 0x04
0 137 0x04
0 138 0x04
0 139 0x04
0 140 0x04
0 141 0x04
0 142 0x04
0 143 0x04
0 144 0x04
0 145 0x04
0 146 0x04
0 147 0x04
0 148 0x04
0 149 0x04
0 150 0x04
0 151 0x04 >;
clocks = <&tegra_car 34>;
resets = <&tegra_car 34>;
reset-names = "dma";
#dma-cells = <1>;
};

90
Documentation/devicetree/bindings/dma/nvidia,tegra20-apbdma.yaml Normal file
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@ -0,0 +1,90 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/dma/nvidia,tegra20-apbdma.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NVIDIA Tegra APB DMA Controller
description:
The NVIDIA Tegra APB DMA controller is a hardware component that
enables direct memory access (DMA) on Tegra systems. It facilitates
data transfer between I/O devices and main memory without constant
CPU intervention.
maintainers:
- Jonathan Hunter <jonathanh@nvidia.com>
properties:
compatible:
oneOf:
- const: nvidia,tegra20-apbdma
- items:
- const: nvidia,tegra30-apbdma
- const: nvidia,tegra20-apbdma
reg:
maxItems: 1
"#dma-cells":
const: 1
clocks:
maxItems: 1
interrupts:
description:
Should contain all of the per-channel DMA interrupts in
ascending order with respect to the DMA channel index.
minItems: 1
maxItems: 32
resets:
maxItems: 1
reset-names:
const: dma
required:
- compatible
- reg
- "#dma-cells"
- clocks
- interrupts
- resets
- reset-names
allOf:
- $ref: dma-controller.yaml#
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/reset/tegra186-reset.h>
dma-controller@6000a000 {
compatible = "nvidia,tegra30-apbdma", "nvidia,tegra20-apbdma";
reg = <0x6000a000 0x1200>;
interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car 34>;
resets = <&tegra_car 34>;
reset-names = "dma";
#dma-cells = <1>;
};
...

41
Documentation/devicetree/bindings/interrupt-controller/nvidia,tegra20-ictlr.txt
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@ -1,41 +0,0 @@
NVIDIA Legacy Interrupt Controller
All Tegra SoCs contain a legacy interrupt controller that routes
interrupts to the GIC, and also serves as a wakeup source. It is also
referred to as "ictlr", hence the name of the binding.
The HW block exposes a number of interrupt controllers, each
implementing a set of 32 interrupts.
Required properties:
- compatible : should be: "nvidia,tegra<chip>-ictlr". The LIC on
subsequent SoCs remained backwards-compatible with Tegra30, so on
Tegra generations later than Tegra30 the compatible value should
include "nvidia,tegra30-ictlr".
- reg : Specifies base physical address and size of the registers.
Each controller must be described separately (Tegra20 has 4 of them,
whereas Tegra30 and later have 5).
- interrupt-controller : Identifies the node as an interrupt controller.
- #interrupt-cells : Specifies the number of cells needed to encode an
interrupt source. The value must be 3.
Notes:
- Because this HW ultimately routes interrupts to the GIC, the
interrupt specifier must be that of the GIC.
- Only SPIs can use the ictlr as an interrupt parent. SGIs and PPIs
are explicitly forbidden.
Example:
ictlr: interrupt-controller@60004000 {
compatible = "nvidia,tegra20-ictlr", "nvidia,tegra-ictlr";
reg = <0x60004000 64>,
<0x60004100 64>,
<0x60004200 64>,
<0x60004300 64>;
interrupt-controller;
#interrupt-cells = <3>;
interrupt-parent = <&intc>;
};

82
Documentation/devicetree/bindings/interrupt-controller/nvidia,tegra20-ictlr.yaml Normal file
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@ -0,0 +1,82 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interrupt-controller/nvidia,tegra20-ictlr.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NVIDIA Tegra20 Legacy Interrupt Controller
maintainers:
- Thierry Reding <treding@nvidia.com>
- Jonathan Hunter <jonathanh@nvidia.com>
description: >
All Tegra SoCs contain a legacy interrupt controller that routes interrupts to
the GIC, and also serves as a wakeup source. It is also referred to as
"ictlr", hence the name of the binding.
The HW block exposes a number of interrupt controllers, each implementing a
set of 32 interrupts.
Notes:
- Because this HW ultimately routes interrupts to the GIC, the
interrupt specifier must be that of the GIC.
- Only SPIs can use the ictlr as an interrupt parent. SGIs and PPIs
are explicitly forbidden.
properties:
compatible:
oneOf:
- items:
- enum:
- nvidia,tegra114-ictlr
- nvidia,tegra124-ictlr
- const: nvidia,tegra30-ictlr
- enum:
- nvidia,tegra20-ictlr
- nvidia,tegra30-ictlr
reg:
description: Each entry is a block of 32 interrupts
minItems: 4
maxItems: 5
interrupt-controller: true
'#interrupt-cells':
const: 3
required:
- compatible
- reg
- interrupt-controller
- '#interrupt-cells'
additionalProperties: false
allOf:
- if:
properties:
compatible:
contains:
const: nvidia,tegra20-ictlr
then:
properties:
reg:
maxItems: 4
else:
properties:
reg:
minItems: 5
examples:
- |
interrupt-controller@60004000 {
compatible = "nvidia,tegra20-ictlr";
reg = <0x60004000 64>,
<0x60004100 64>,
<0x60004200 64>,
<0x60004300 64>;
interrupt-controller;
#interrupt-cells = <3>;
};

14
Documentation/devicetree/bindings/media/cec/nvidia,tegra114-cec.yaml
View File

@ -14,10 +14,16 @@ allOf:
properties:
compatible:
enum:
- nvidia,tegra114-cec
- nvidia,tegra124-cec
- nvidia,tegra210-cec
oneOf:
- enum:
- nvidia,tegra114-cec
- nvidia,tegra124-cec
- nvidia,tegra210-cec
- items:
- enum:
- nvidia,tegra186-cec
- nvidia,tegra194-cec
- const: nvidia,tegra210-cec
clocks:
maxItems: 1