clk: rp1: Implement remaining clock tree

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The RP1 clock generator driver currently defines only the fundamental
clocks such as the front PLLs for system, audio and video subsystems
and the ethernet clock.

Add the remaining clocks to the tree so as to be completed, which means
that the following RP1 peripherals could now consume their specific clocks
and be enabled to work (provided that the relevant driver changes for each
specific peripheral, if any, are committed):

- ADC
- Audio IN/OUT
- DMA controller
- I2S
- MIPI DPI/DSI
- PWM
- SDIO
- UART
- Video Encoder

Signed-off-by: Andrea della Porta <andrea.porta@suse.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/17e5c6e0c085cfa0bf4b63b639cdc92c6a4c1418.1750714412.git.andrea.porta@suse.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>

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This commit is contained in:

Andrea della Porta 2025-06-23 23:46:28 +02:00 committed by Florian Fainelli

parent 07bab7b81d

commit a7713a7dd1

1 changed files with 968 additions and 8 deletions

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drivers/clk/clk-rp1.c

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