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drm/i915: constify the dpll clock vtable

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Most the dpll vtable into read-only memory.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/0414a27317de3f335a8453a29486b746aa6862e7.1632869550.git.jani.nikula@intel.com
This commit is contained in:
Dave Airlie 2021-09-29 01:58:03 +03:00 committed by Jani Nikula
parent 0a108bca94
commit a73477f881
3 changed files with 44 additions and 12 deletions
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6
drivers/gpu/drm/i915/display/intel_display.c
View File

@ -6833,10 +6833,10 @@ static int intel_crtc_atomic_check(struct intel_atomic_state *state,
crtc_state->update_wm_post = true;
if (mode_changed && crtc_state->hw.enable &&
dev_priv->dpll_funcs.crtc_compute_clock &&
dev_priv->dpll_funcs &&
!crtc_state->bigjoiner_slave &&
!drm_WARN_ON(&dev_priv->drm, crtc_state->shared_dpll)) {
ret = dev_priv->dpll_funcs.crtc_compute_clock(crtc_state);
ret = dev_priv->dpll_funcs->crtc_compute_clock(crtc_state);
if (ret)
return ret;
}
@ -8863,7 +8863,7 @@ static void intel_modeset_clear_plls(struct intel_atomic_state *state)
struct intel_crtc *crtc;
int i;
if (!dev_priv->dpll_funcs.crtc_compute_clock)
if (!dev_priv->dpll_funcs)
return;
for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {

48
drivers/gpu/drm/i915/display/intel_dpll.c
View File

@ -1365,25 +1365,57 @@ static int i8xx_crtc_compute_clock(struct intel_crtc_state *crtc_state)
return 0;
}
static const struct intel_dpll_funcs hsw_dpll_funcs = {
.crtc_compute_clock = hsw_crtc_compute_clock,
};
static const struct intel_dpll_funcs ilk_dpll_funcs = {
.crtc_compute_clock = ilk_crtc_compute_clock,
};
static const struct intel_dpll_funcs chv_dpll_funcs = {
.crtc_compute_clock = chv_crtc_compute_clock,
};
static const struct intel_dpll_funcs vlv_dpll_funcs = {
.crtc_compute_clock = vlv_crtc_compute_clock,
};
static const struct intel_dpll_funcs g4x_dpll_funcs = {
.crtc_compute_clock = g4x_crtc_compute_clock,
};
static const struct intel_dpll_funcs pnv_dpll_funcs = {
.crtc_compute_clock = pnv_crtc_compute_clock,
};
static const struct intel_dpll_funcs i9xx_dpll_funcs = {
.crtc_compute_clock = i9xx_crtc_compute_clock,
};
static const struct intel_dpll_funcs i8xx_dpll_funcs = {
.crtc_compute_clock = i8xx_crtc_compute_clock,
};
void
intel_dpll_init_clock_hook(struct drm_i915_private *dev_priv)
{
if (DISPLAY_VER(dev_priv) >= 9 || HAS_DDI(dev_priv))
dev_priv->dpll_funcs.crtc_compute_clock = hsw_crtc_compute_clock;
dev_priv->dpll_funcs = &hsw_dpll_funcs;
else if (HAS_PCH_SPLIT(dev_priv))
dev_priv->dpll_funcs.crtc_compute_clock = ilk_crtc_compute_clock;
dev_priv->dpll_funcs = &ilk_dpll_funcs;
else if (IS_CHERRYVIEW(dev_priv))
dev_priv->dpll_funcs.crtc_compute_clock = chv_crtc_compute_clock;
dev_priv->dpll_funcs = &chv_dpll_funcs;
else if (IS_VALLEYVIEW(dev_priv))
dev_priv->dpll_funcs.crtc_compute_clock = vlv_crtc_compute_clock;
dev_priv->dpll_funcs = &vlv_dpll_funcs;
else if (IS_G4X(dev_priv))
dev_priv->dpll_funcs.crtc_compute_clock = g4x_crtc_compute_clock;
dev_priv->dpll_funcs = &g4x_dpll_funcs;
else if (IS_PINEVIEW(dev_priv))
dev_priv->dpll_funcs.crtc_compute_clock = pnv_crtc_compute_clock;
dev_priv->dpll_funcs = &pnv_dpll_funcs;
else if (DISPLAY_VER(dev_priv) != 2)
dev_priv->dpll_funcs.crtc_compute_clock = i9xx_crtc_compute_clock;
dev_priv->dpll_funcs = &i9xx_dpll_funcs;
else
dev_priv->dpll_funcs.crtc_compute_clock = i8xx_crtc_compute_clock;
dev_priv->dpll_funcs = &i8xx_dpll_funcs;
}
static bool i9xx_has_pps(struct drm_i915_private *dev_priv)

2
drivers/gpu/drm/i915/i915_drv.h
View File

@ -994,7 +994,7 @@ struct drm_i915_private {
const struct intel_fdi_funcs *fdi_funcs;
/* display pll funcs */
struct intel_dpll_funcs dpll_funcs;
const struct intel_dpll_funcs *dpll_funcs;
/* Display functions */
struct drm_i915_display_funcs display;