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arm64: dts: rockchip: Add NanoPC T6 PCIe Ethernet support
Device tree entries for PCIe 2.5G Ethernet NICs Signed-off-by: John Clark <inindev@gmail.com> Link: https://lore.kernel.org/r/20230810003156.22123-1-inindev@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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@ -115,6 +115,16 @@ vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
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vin-supply = <&vcc4v0_sys>;
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};
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vcc_3v3_pcie20: vcc3v3-pcie20-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc_3v3_pcie20";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vcc_3v3_s3>;
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};
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vbus5v0_typec: vbus5v0-typec-regulator {
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compatible = "regulator-fixed";
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enable-active-high;
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@ -140,6 +150,18 @@ vcc3v3_pcie30: vcc3v3-pcie30-regulator {
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};
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};
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&combphy0_ps {
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status = "okay";
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};
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&combphy1_ps {
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status = "okay";
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};
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&combphy2_psu {
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status = "okay";
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};
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&cpu_l0 {
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cpu-supply = <&vdd_cpu_lit_s0>;
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};
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@ -391,6 +413,22 @@ i2s0_8ch_p0_0: endpoint {
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};
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};
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&pcie2x1l0 {
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reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>;
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vpcie3v3-supply = <&vcc_3v3_pcie20>;
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pinctrl-names = "default";
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pinctrl-0 = <&pcie2_0_rst>;
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status = "okay";
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};
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&pcie2x1l2 {
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reset-gpios = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>;
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vpcie3v3-supply = <&vcc_3v3_pcie20>;
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pinctrl-names = "default";
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pinctrl-0 = <&pcie2_2_rst>;
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status = "okay";
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};
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&pcie30phy {
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status = "okay";
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};
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@ -425,6 +463,14 @@ hym8563_int: hym8563-int {
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};
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pcie {
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pcie2_0_rst: pcie2-0-rst {
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rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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pcie2_2_rst: pcie2-2-rst {
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rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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pcie_m2_0_pwren: pcie-m20-pwren {
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rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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