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dt-bindings: display: msm: document DSI controller and phy on SA8775P

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Document DSI controller and phy on SA8775P platform.

Signed-off-by: Ayushi Makhija <quic_amakhija@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/649839/
Link: https://lore.kernel.org/r/20250424062431.2040692-4-quic_amakhija@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
This commit is contained in:
Ayushi Makhija 2025-04-24 11:54:23 +05:30 committed by Dmitry Baryshkov
parent 2a0195b94c
commit a6f2524f4d
1 changed files with 180 additions and 1 deletions
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181
Documentation/devicetree/bindings/display/msm/qcom,sa8775p-mdss.yaml
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@ -52,12 +52,23 @@ patternProperties:
items:
- const: qcom,sa8775p-dp
"^dsi@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
contains:
const: qcom,sa8775p-dsi-ctrl
"^phy@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
const: qcom,sa8775p-edp-phy
contains:
enum:
- qcom,sa8775p-dsi-phy-5nm
- qcom,sa8775p-edp-phy
required:
- compatible
@ -139,6 +150,20 @@ examples:
remote-endpoint = <&mdss0_dp0_in>;
};
};
port@1 {
reg = <1>;
dpu_intf1_out: endpoint {
remote-endpoint = <&mdss0_dsi0_in>;
};
};
port@2 {
reg = <2>;
dpu_intf2_out: endpoint {
remote-endpoint = <&mdss0_dsi1_in>;
};
};
};
mdss0_mdp_opp_table: opp-table {
@ -186,6 +211,160 @@ examples:
vdda-pll-supply = <&vreg_l4a>;
};
dsi@ae94000 {
compatible = "qcom,sa8775p-dsi-ctrl", "qcom,mdss-dsi-ctrl";
reg = <0x0ae94000 0x400>;
reg-names = "dsi_ctrl";
interrupt-parent = <&mdss>;
interrupts = <4>;
clocks = <&dispc_byte_clk>,
<&dispcc_intf_clk>,
<&dispcc_pclk>,
<&dispcc_esc_clk>,
<&dispcc_ahb_clk>,
<&gcc_bus_clk>;
clock-names = "byte",
"byte_intf",
"pixel",
"core",
"iface",
"bus";
assigned-clocks = <&dispcc_byte_clk>,
<&dispcc_pclk>;
assigned-clock-parents = <&mdss0_dsi0_phy 0>, <&mdss0_dsi0_phy 1>;
phys = <&mdss0_dsi0_phy>;
operating-points-v2 = <&dsi0_opp_table>;
power-domains = <&rpmhpd SA8775P_MMCX>;
#address-cells = <1>;
#size-cells = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
mdss0_dsi0_in: endpoint {
remote-endpoint = <&dpu_intf1_out>;
};
};
port@1 {
reg = <1>;
mdss0_dsi0_out: endpoint { };
};
};
dsi0_opp_table: opp-table {
compatible = "operating-points-v2";
opp-358000000 {
opp-hz = /bits/ 64 <358000000>;
required-opps = <&rpmhpd_opp_svs_l1>;
};
};
};
mdss0_dsi0_phy: phy@ae94400 {
compatible = "qcom,sa8775p-dsi-phy-5nm";
reg = <0x0ae94400 0x200>,
<0x0ae94600 0x280>,
<0x0ae94900 0x27c>;
reg-names = "dsi_phy",
"dsi_phy_lane",
"dsi_pll";
#clock-cells = <1>;
#phy-cells = <0>;
clocks = <&dispcc_iface_clk>,
<&rpmhcc_ref_clk>;
clock-names = "iface", "ref";
vdds-supply = <&vreg_dsi_supply>;
};
dsi@ae96000 {
compatible = "qcom,sa8775p-dsi-ctrl", "qcom,mdss-dsi-ctrl";
reg = <0x0ae96000 0x400>;
reg-names = "dsi_ctrl";
interrupt-parent = <&mdss>;
interrupts = <4>;
clocks = <&dispc_byte_clk>,
<&dispcc_intf_clk>,
<&dispcc_pclk>,
<&dispcc_esc_clk>,
<&dispcc_ahb_clk>,
<&gcc_bus_clk>;
clock-names = "byte",
"byte_intf",
"pixel",
"core",
"iface",
"bus";
assigned-clocks = <&dispcc_byte_clk>,
<&dispcc_pclk>;
assigned-clock-parents = <&mdss0_dsi1_phy 0>, <&mdss0_dsi1_phy 1>;
phys = <&mdss0_dsi1_phy>;
operating-points-v2 = <&dsi1_opp_table>;
power-domains = <&rpmhpd SA8775P_MMCX>;
#address-cells = <1>;
#size-cells = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
mdss0_dsi1_in: endpoint {
remote-endpoint = <&dpu_intf2_out>;
};
};
port@1 {
reg = <1>;
mdss0_dsi1_out: endpoint { };
};
};
dsi1_opp_table: opp-table {
compatible = "operating-points-v2";
opp-358000000 {
opp-hz = /bits/ 64 <358000000>;
required-opps = <&rpmhpd_opp_svs_l1>;
};
};
};
mdss0_dsi1_phy: phy@ae96400 {
compatible = "qcom,sa8775p-dsi-phy-5nm";
reg = <0x0ae96400 0x200>,
<0x0ae96600 0x280>,
<0x0ae96900 0x27c>;
reg-names = "dsi_phy",
"dsi_phy_lane",
"dsi_pll";
#clock-cells = <1>;
#phy-cells = <0>;
clocks = <&dispcc_iface_clk>,
<&rpmhcc_ref_clk>;
clock-names = "iface", "ref";
vdds-supply = <&vreg_dsi_supply>;
};
displayport-controller@af54000 {
compatible = "qcom,sa8775p-dp";