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drm/xe/sysctrl: Add system controller interrupt handler

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Add system controller interrupt handler which is denoted by 11th bit in
GFX master interrupt register. While at it, add worker for scheduling
system controller work.

Co-developed-by: Soham Purkait <soham.purkait@intel.com>
Signed-off-by: Soham Purkait <soham.purkait@intel.com>
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
Reviewed-by: Riana Tauro <riana.tauro@intel.com>
Link: https://patch.msgid.link/20260428054826.1202076-2-raag.jadav@intel.com
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
This commit is contained in:
Raag Jadav 2026-04-28 11:18:24 +05:30 committed by Riana Tauro
parent c59395e215
commit a68247371b
5 changed files with 36 additions and 7 deletions
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1
drivers/gpu/drm/xe/regs/xe_irq_regs.h
View File

@ -22,6 +22,7 @@
#define DISPLAY_IRQ REG_BIT(16)
#define SOC_H2DMEMINT_IRQ REG_BIT(13)
#define I2C_IRQ REG_BIT(12)
#define SYSCTRL_IRQ REG_BIT(11)
#define GT_DW_IRQ(x) REG_BIT(x)
/*

2
drivers/gpu/drm/xe/xe_irq.c
View File

@ -24,6 +24,7 @@
#include "xe_mmio.h"
#include "xe_pxp.h"
#include "xe_sriov.h"
#include "xe_sysctrl.h"
#include "xe_tile.h"
/*
@ -525,6 +526,7 @@ static irqreturn_t dg1_irq_handler(int irq, void *arg)
xe_heci_csc_irq_handler(xe, master_ctl);
xe_display_irq_handler(xe, master_ctl);
xe_i2c_irq_handler(xe, master_ctl);
xe_sysctrl_irq_handler(xe, master_ctl);
xe_mert_irq_handler(xe, master_ctl);
gu_misc_iir = gu_misc_irq_ack(xe, master_ctl);
}

35
drivers/gpu/drm/xe/xe_sysctrl.c
View File

@ -8,6 +8,7 @@
#include <drm/drm_managed.h>
#include "regs/xe_irq_regs.h"
#include "regs/xe_sysctrl_regs.h"
#include "xe_device.h"
#include "xe_mmio.h"
@ -30,10 +31,16 @@
static void sysctrl_fini(void *arg)
{
struct xe_device *xe = arg;
struct xe_sysctrl *sc = &xe->sc;
disable_work_sync(&sc->work);
xe->soc_remapper.set_sysctrl_region(xe, 0);
}
static void xe_sysctrl_work(struct work_struct *work)
{
}
/**
* xe_sysctrl_init() - Initialize System Controller subsystem
* @xe: xe device instance
@ -55,12 +62,6 @@ int xe_sysctrl_init(struct xe_device *xe)
if (!xe->info.has_sysctrl)
return 0;
xe->soc_remapper.set_sysctrl_region(xe, SYSCTRL_MAILBOX_INDEX);
ret = devm_add_action_or_reset(xe->drm.dev, sysctrl_fini, xe);
if (ret)
return ret;
sc->mmio = devm_kzalloc(xe->drm.dev, sizeof(*sc->mmio), GFP_KERNEL);
if (!sc->mmio)
return -ENOMEM;
@ -73,9 +74,29 @@ int xe_sysctrl_init(struct xe_device *xe)
if (ret)
return ret;
xe->soc_remapper.set_sysctrl_region(xe, SYSCTRL_MAILBOX_INDEX);
xe_sysctrl_mailbox_init(sc);
INIT_WORK(&sc->work, xe_sysctrl_work);
return 0;
return devm_add_action_or_reset(xe->drm.dev, sysctrl_fini, xe);
}
/**
* xe_sysctrl_irq_handler() - Handler for System Controller interrupts
* @xe: xe device instance
* @master_ctl: interrupt register
*
* Handle interrupts generated by System Controller.
*/
void xe_sysctrl_irq_handler(struct xe_device *xe, u32 master_ctl)
{
struct xe_sysctrl *sc = &xe->sc;
if (!xe->info.has_sysctrl || !sc->work.func)
return;
if (master_ctl & SYSCTRL_IRQ)
schedule_work(&sc->work);
}
/**

1
drivers/gpu/drm/xe/xe_sysctrl.h
View File

@ -17,6 +17,7 @@ static inline struct xe_device *sc_to_xe(struct xe_sysctrl *sc)
}
int xe_sysctrl_init(struct xe_device *xe);
void xe_sysctrl_irq_handler(struct xe_device *xe, u32 master_ctl);
void xe_sysctrl_pm_resume(struct xe_device *xe);
#endif

4
drivers/gpu/drm/xe/xe_sysctrl_types.h
View File

@ -8,6 +8,7 @@
#include <linux/mutex.h>
#include <linux/types.h>
#include <linux/workqueue_types.h>
struct xe_mmio;
@ -27,6 +28,9 @@ struct xe_sysctrl {
/** @phase_bit: Message boundary phase toggle bit (0 or 1) */
bool phase_bit;
/** @work: Pending events worker */
struct work_struct work;
};
#endif