drm/amd/display: move scaling helper to connector

[WHAT]
amdgpu_dm_update_stream_scaling_settings() computes the stream src/dst
rectangles for a connector's scaling mode. It is already declared in
amdgpu_dm_connector.h and consumed by create_stream_for_sink(), so move
its definition out of the oversized amdgpu_dm.c into
amdgpu_dm_connector.c where it belongs.

Relocate its KUnit tests from the amdgpu_dm suite to the
amdgpu_dm_connector suite accordingly. No functional change.

Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Hung 2026-07-09 18:04:43 -06:00 committed by Alex Deucher
parent 414da24137
commit a648ed2bfa
4 changed files with 266 additions and 265 deletions

View File

@ -3405,63 +3405,6 @@ static void fill_dc_dirty_rects(struct drm_plane *plane,
&flip_addrs->dirty_rect_count, true);
}
void amdgpu_dm_update_stream_scaling_settings(struct drm_device *dev,
const struct drm_display_mode *mode,
const struct dm_connector_state *dm_state,
struct dc_stream_state *stream)
{
enum amdgpu_rmx_type rmx_type;
struct rect src = { 0 }; /* viewport in composition space*/
struct rect dst = { 0 }; /* stream addressable area */
/* no mode. nothing to be done */
if (!mode)
return;
/* Full screen scaling by default */
src.width = mode->hdisplay;
src.height = mode->vdisplay;
dst.width = stream->timing.h_addressable;
dst.height = stream->timing.v_addressable;
if (dm_state) {
rmx_type = dm_state->scaling;
if (rmx_type == RMX_ASPECT || rmx_type == RMX_OFF) {
if (src.width * dst.height <
src.height * dst.width) {
/* height needs less upscaling/more downscaling */
dst.width = src.width *
dst.height / src.height;
} else {
/* width needs less upscaling/more downscaling */
dst.height = src.height *
dst.width / src.width;
}
} else if (rmx_type == RMX_CENTER) {
dst = src;
}
dst.x = (stream->timing.h_addressable - dst.width) / 2;
dst.y = (stream->timing.v_addressable - dst.height) / 2;
if (dm_state->underscan_enable) {
dst.x += dm_state->underscan_hborder / 2;
dst.y += dm_state->underscan_vborder / 2;
dst.width -= dm_state->underscan_hborder;
dst.height -= dm_state->underscan_vborder;
}
}
stream->src = src;
stream->dst = dst;
drm_dbg_kms(dev, "Destination Rectangle x:%d y:%d width:%d height:%d\n",
dst.x, dst.y, dst.width, dst.height);
}
EXPORT_IF_KUNIT(amdgpu_dm_update_stream_scaling_settings);
static int dm_update_mst_vcpi_slots_for_dsc(struct drm_atomic_commit *state,
struct dc_state *dc_state,
struct dsc_mst_fairness_vars *vars)

View File

@ -1389,6 +1389,63 @@ static void apply_dsc_policy_for_stream(struct amdgpu_dm_connector *aconnector,
}
#endif
void amdgpu_dm_update_stream_scaling_settings(struct drm_device *dev,
const struct drm_display_mode *mode,
const struct dm_connector_state *dm_state,
struct dc_stream_state *stream)
{
enum amdgpu_rmx_type rmx_type;
struct rect src = { 0 }; /* viewport in composition space*/
struct rect dst = { 0 }; /* stream addressable area */
/* no mode. nothing to be done */
if (!mode)
return;
/* Full screen scaling by default */
src.width = mode->hdisplay;
src.height = mode->vdisplay;
dst.width = stream->timing.h_addressable;
dst.height = stream->timing.v_addressable;
if (dm_state) {
rmx_type = dm_state->scaling;
if (rmx_type == RMX_ASPECT || rmx_type == RMX_OFF) {
if (src.width * dst.height <
src.height * dst.width) {
/* height needs less upscaling/more downscaling */
dst.width = src.width *
dst.height / src.height;
} else {
/* width needs less upscaling/more downscaling */
dst.height = src.height *
dst.width / src.width;
}
} else if (rmx_type == RMX_CENTER) {
dst = src;
}
dst.x = (stream->timing.h_addressable - dst.width) / 2;
dst.y = (stream->timing.v_addressable - dst.height) / 2;
if (dm_state->underscan_enable) {
dst.x += dm_state->underscan_hborder / 2;
dst.y += dm_state->underscan_vborder / 2;
dst.width -= dm_state->underscan_hborder;
dst.height -= dm_state->underscan_vborder;
}
}
stream->src = src;
stream->dst = dst;
drm_dbg_kms(dev, "Destination Rectangle x:%d y:%d width:%d height:%d\n",
dst.x, dst.y, dst.width, dst.height);
}
EXPORT_IF_KUNIT(amdgpu_dm_update_stream_scaling_settings);
STATIC_IFN_KUNIT struct dc_stream_state *
create_stream_for_sink(struct drm_connector *connector,
const struct drm_display_mode *drm_mode,

View File

@ -28,6 +28,7 @@
#include "amdgpu_dm_connector.h"
#include "amdgpu_dm_backlight.h"
#include "include/grph_object_id.h"
#include "amdgpu_dm_kunit_test_helpers.h"
/* Tests for get_subconnector_type() */
@ -5061,6 +5062,206 @@ static void dm_test_update_after_detect_sink_unchanged(struct kunit *test)
KUNIT_EXPECT_NULL(test, aconnector->dc_sink);
}
/* Tests for amdgpu_dm_update_stream_scaling_settings() */
/**
* dm_test_update_scaling_null_mode - Test NULL mode leaves the stream rects untouched
* @test: The KUnit test context
*/
static void dm_test_update_scaling_null_mode(struct kunit *test)
{
struct amdgpu_device *adev = dm_kunit_alloc_adev(test);
struct dc_stream_state *stream = dm_kunit_alloc_stream(test, NULL);
stream->timing.h_addressable = 1920;
stream->timing.v_addressable = 1080;
amdgpu_dm_update_stream_scaling_settings(&adev->ddev, NULL, NULL, stream);
/* NULL mode: early return before touching src/dst */
KUNIT_EXPECT_EQ(test, stream->src.width, 0);
KUNIT_EXPECT_EQ(test, stream->dst.width, 0);
}
/**
* dm_test_update_scaling_fullscreen_default - Test full-screen default with no dm_state
* @test: The KUnit test context
*/
static void dm_test_update_scaling_fullscreen_default(struct kunit *test)
{
struct amdgpu_device *adev = dm_kunit_alloc_adev(test);
struct dc_stream_state *stream = dm_kunit_alloc_stream(test, NULL);
struct drm_display_mode mode = { 0 };
mode.hdisplay = 1920;
mode.vdisplay = 1080;
stream->timing.h_addressable = 2560;
stream->timing.v_addressable = 1440;
amdgpu_dm_update_stream_scaling_settings(&adev->ddev, &mode, NULL, stream);
/* src = mode, dst = timing addressable, no centering without dm_state */
KUNIT_EXPECT_EQ(test, stream->src.width, 1920);
KUNIT_EXPECT_EQ(test, stream->src.height, 1080);
KUNIT_EXPECT_EQ(test, stream->dst.width, 2560);
KUNIT_EXPECT_EQ(test, stream->dst.height, 1440);
KUNIT_EXPECT_EQ(test, stream->dst.x, 0);
KUNIT_EXPECT_EQ(test, stream->dst.y, 0);
}
/**
* dm_test_update_scaling_rmx_full - Test RMX_FULL keeps a full-size, centered dst
* @test: The KUnit test context
*/
static void dm_test_update_scaling_rmx_full(struct kunit *test)
{
struct amdgpu_device *adev = dm_kunit_alloc_adev(test);
struct dc_stream_state *stream = dm_kunit_alloc_stream(test, NULL);
struct dm_connector_state *dm_state;
struct drm_display_mode mode = { 0 };
dm_state = kunit_kzalloc(test, sizeof(*dm_state), GFP_KERNEL);
KUNIT_ASSERT_NOT_NULL(test, dm_state);
mode.hdisplay = 1280;
mode.vdisplay = 720;
stream->timing.h_addressable = 1920;
stream->timing.v_addressable = 1080;
dm_state->scaling = RMX_FULL;
amdgpu_dm_update_stream_scaling_settings(&adev->ddev, &mode, dm_state, stream);
/* RMX_FULL: dst stays full addressable, offset 0 */
KUNIT_EXPECT_EQ(test, stream->dst.width, 1920);
KUNIT_EXPECT_EQ(test, stream->dst.height, 1080);
KUNIT_EXPECT_EQ(test, stream->dst.x, 0);
KUNIT_EXPECT_EQ(test, stream->dst.y, 0);
}
/**
* dm_test_update_scaling_rmx_aspect_pillarbox - Test RMX_ASPECT preserves aspect ratio
* @test: The KUnit test context
*/
static void dm_test_update_scaling_rmx_aspect_pillarbox(struct kunit *test)
{
struct amdgpu_device *adev = dm_kunit_alloc_adev(test);
struct dc_stream_state *stream = dm_kunit_alloc_stream(test, NULL);
struct dm_connector_state *dm_state;
struct drm_display_mode mode = { 0 };
dm_state = kunit_kzalloc(test, sizeof(*dm_state), GFP_KERNEL);
KUNIT_ASSERT_NOT_NULL(test, dm_state);
/* 4:3 source on a 16:9 panel -> pillarboxed */
mode.hdisplay = 1024;
mode.vdisplay = 768;
stream->timing.h_addressable = 1920;
stream->timing.v_addressable = 1080;
dm_state->scaling = RMX_ASPECT;
amdgpu_dm_update_stream_scaling_settings(&adev->ddev, &mode, dm_state, stream);
/*
* src.width*dst.height (1024*1080) < src.height*dst.width (768*1920):
* width scaled to src.width*dst.height/src.height = 1440, height stays
* 1080, centered horizontally at (1920-1440)/2 = 240.
*/
KUNIT_EXPECT_EQ(test, stream->dst.width, 1440);
KUNIT_EXPECT_EQ(test, stream->dst.height, 1080);
KUNIT_EXPECT_EQ(test, stream->dst.x, 240);
KUNIT_EXPECT_EQ(test, stream->dst.y, 0);
}
/**
* dm_test_update_scaling_rmx_aspect_letterbox - Test RMX_ASPECT letterboxes wide sources
* @test: The KUnit test context
*/
static void dm_test_update_scaling_rmx_aspect_letterbox(struct kunit *test)
{
struct amdgpu_device *adev = dm_kunit_alloc_adev(test);
struct dc_stream_state *stream = dm_kunit_alloc_stream(test, NULL);
struct dm_connector_state *dm_state;
struct drm_display_mode mode = { 0 };
dm_state = kunit_kzalloc(test, sizeof(*dm_state), GFP_KERNEL);
KUNIT_ASSERT_NOT_NULL(test, dm_state);
/* 16:9 source on a 4:3 panel -> letterboxed */
mode.hdisplay = 1920;
mode.vdisplay = 1080;
stream->timing.h_addressable = 1024;
stream->timing.v_addressable = 768;
dm_state->scaling = RMX_ASPECT;
amdgpu_dm_update_stream_scaling_settings(&adev->ddev, &mode, dm_state, stream);
KUNIT_EXPECT_EQ(test, stream->dst.width, 1024);
KUNIT_EXPECT_EQ(test, stream->dst.height, 576);
KUNIT_EXPECT_EQ(test, stream->dst.x, 0);
KUNIT_EXPECT_EQ(test, stream->dst.y, 96);
}
/**
* dm_test_update_scaling_rmx_center - Test RMX_CENTER centers a 1:1 dst
* @test: The KUnit test context
*/
static void dm_test_update_scaling_rmx_center(struct kunit *test)
{
struct amdgpu_device *adev = dm_kunit_alloc_adev(test);
struct dc_stream_state *stream = dm_kunit_alloc_stream(test, NULL);
struct dm_connector_state *dm_state;
struct drm_display_mode mode = { 0 };
dm_state = kunit_kzalloc(test, sizeof(*dm_state), GFP_KERNEL);
KUNIT_ASSERT_NOT_NULL(test, dm_state);
mode.hdisplay = 1280;
mode.vdisplay = 720;
stream->timing.h_addressable = 1920;
stream->timing.v_addressable = 1080;
dm_state->scaling = RMX_CENTER;
amdgpu_dm_update_stream_scaling_settings(&adev->ddev, &mode, dm_state, stream);
/* RMX_CENTER: dst = src, centered on the addressable area */
KUNIT_EXPECT_EQ(test, stream->dst.width, 1280);
KUNIT_EXPECT_EQ(test, stream->dst.height, 720);
KUNIT_EXPECT_EQ(test, stream->dst.x, 320);
KUNIT_EXPECT_EQ(test, stream->dst.y, 180);
}
/**
* dm_test_update_scaling_underscan - Test underscan borders shrink and offset dst
* @test: The KUnit test context
*/
static void dm_test_update_scaling_underscan(struct kunit *test)
{
struct amdgpu_device *adev = dm_kunit_alloc_adev(test);
struct dc_stream_state *stream = dm_kunit_alloc_stream(test, NULL);
struct dm_connector_state *dm_state;
struct drm_display_mode mode = { 0 };
dm_state = kunit_kzalloc(test, sizeof(*dm_state), GFP_KERNEL);
KUNIT_ASSERT_NOT_NULL(test, dm_state);
mode.hdisplay = 1920;
mode.vdisplay = 1080;
stream->timing.h_addressable = 1920;
stream->timing.v_addressable = 1080;
dm_state->scaling = RMX_FULL;
dm_state->underscan_enable = true;
dm_state->underscan_hborder = 64;
dm_state->underscan_vborder = 32;
amdgpu_dm_update_stream_scaling_settings(&adev->ddev, &mode, dm_state, stream);
/* Full dst, then underscan: x/y += border/2, width/height -= border */
KUNIT_EXPECT_EQ(test, stream->dst.x, 32);
KUNIT_EXPECT_EQ(test, stream->dst.y, 16);
KUNIT_EXPECT_EQ(test, stream->dst.width, 1856);
KUNIT_EXPECT_EQ(test, stream->dst.height, 1048);
}
static struct kunit_case amdgpu_dm_connector_tests[] = {
/* get_subconnector_type */
KUNIT_CASE(dm_test_subconnector_type_none),
@ -5340,6 +5541,14 @@ static struct kunit_case amdgpu_dm_connector_tests[] = {
/* amdgpu_dm_update_connector_after_detect */
KUNIT_CASE(dm_test_update_after_detect_mst_noop),
KUNIT_CASE(dm_test_update_after_detect_sink_unchanged),
/* amdgpu_dm_update_stream_scaling_settings */
KUNIT_CASE(dm_test_update_scaling_null_mode),
KUNIT_CASE(dm_test_update_scaling_fullscreen_default),
KUNIT_CASE(dm_test_update_scaling_rmx_full),
KUNIT_CASE(dm_test_update_scaling_rmx_aspect_pillarbox),
KUNIT_CASE(dm_test_update_scaling_rmx_aspect_letterbox),
KUNIT_CASE(dm_test_update_scaling_rmx_center),
KUNIT_CASE(dm_test_update_scaling_underscan),
{}
};

View File

@ -1225,206 +1225,6 @@ static void dm_test_master_stream_defaults_to_first(struct kunit *test)
stream0);
}
/* Tests for amdgpu_dm_update_stream_scaling_settings() */
/**
* dm_test_update_scaling_null_mode - Test NULL mode leaves the stream rects untouched
* @test: The KUnit test context
*/
static void dm_test_update_scaling_null_mode(struct kunit *test)
{
struct amdgpu_device *adev = dm_kunit_alloc_adev(test);
struct dc_stream_state *stream = dm_kunit_alloc_stream(test, NULL);
stream->timing.h_addressable = 1920;
stream->timing.v_addressable = 1080;
amdgpu_dm_update_stream_scaling_settings(&adev->ddev, NULL, NULL, stream);
/* NULL mode: early return before touching src/dst */
KUNIT_EXPECT_EQ(test, stream->src.width, 0);
KUNIT_EXPECT_EQ(test, stream->dst.width, 0);
}
/**
* dm_test_update_scaling_fullscreen_default - Test full-screen default with no dm_state
* @test: The KUnit test context
*/
static void dm_test_update_scaling_fullscreen_default(struct kunit *test)
{
struct amdgpu_device *adev = dm_kunit_alloc_adev(test);
struct dc_stream_state *stream = dm_kunit_alloc_stream(test, NULL);
struct drm_display_mode mode = { 0 };
mode.hdisplay = 1920;
mode.vdisplay = 1080;
stream->timing.h_addressable = 2560;
stream->timing.v_addressable = 1440;
amdgpu_dm_update_stream_scaling_settings(&adev->ddev, &mode, NULL, stream);
/* src = mode, dst = timing addressable, no centering without dm_state */
KUNIT_EXPECT_EQ(test, stream->src.width, 1920);
KUNIT_EXPECT_EQ(test, stream->src.height, 1080);
KUNIT_EXPECT_EQ(test, stream->dst.width, 2560);
KUNIT_EXPECT_EQ(test, stream->dst.height, 1440);
KUNIT_EXPECT_EQ(test, stream->dst.x, 0);
KUNIT_EXPECT_EQ(test, stream->dst.y, 0);
}
/**
* dm_test_update_scaling_rmx_full - Test RMX_FULL keeps a full-size, centered dst
* @test: The KUnit test context
*/
static void dm_test_update_scaling_rmx_full(struct kunit *test)
{
struct amdgpu_device *adev = dm_kunit_alloc_adev(test);
struct dc_stream_state *stream = dm_kunit_alloc_stream(test, NULL);
struct dm_connector_state *dm_state;
struct drm_display_mode mode = { 0 };
dm_state = kunit_kzalloc(test, sizeof(*dm_state), GFP_KERNEL);
KUNIT_ASSERT_NOT_NULL(test, dm_state);
mode.hdisplay = 1280;
mode.vdisplay = 720;
stream->timing.h_addressable = 1920;
stream->timing.v_addressable = 1080;
dm_state->scaling = RMX_FULL;
amdgpu_dm_update_stream_scaling_settings(&adev->ddev, &mode, dm_state, stream);
/* RMX_FULL: dst stays full addressable, offset 0 */
KUNIT_EXPECT_EQ(test, stream->dst.width, 1920);
KUNIT_EXPECT_EQ(test, stream->dst.height, 1080);
KUNIT_EXPECT_EQ(test, stream->dst.x, 0);
KUNIT_EXPECT_EQ(test, stream->dst.y, 0);
}
/**
* dm_test_update_scaling_rmx_aspect_pillarbox - Test RMX_ASPECT preserves aspect ratio
* @test: The KUnit test context
*/
static void dm_test_update_scaling_rmx_aspect_pillarbox(struct kunit *test)
{
struct amdgpu_device *adev = dm_kunit_alloc_adev(test);
struct dc_stream_state *stream = dm_kunit_alloc_stream(test, NULL);
struct dm_connector_state *dm_state;
struct drm_display_mode mode = { 0 };
dm_state = kunit_kzalloc(test, sizeof(*dm_state), GFP_KERNEL);
KUNIT_ASSERT_NOT_NULL(test, dm_state);
/* 4:3 source on a 16:9 panel -> pillarboxed */
mode.hdisplay = 1024;
mode.vdisplay = 768;
stream->timing.h_addressable = 1920;
stream->timing.v_addressable = 1080;
dm_state->scaling = RMX_ASPECT;
amdgpu_dm_update_stream_scaling_settings(&adev->ddev, &mode, dm_state, stream);
/*
* src.width*dst.height (1024*1080) < src.height*dst.width (768*1920):
* width scaled to src.width*dst.height/src.height = 1440, height stays
* 1080, centered horizontally at (1920-1440)/2 = 240.
*/
KUNIT_EXPECT_EQ(test, stream->dst.width, 1440);
KUNIT_EXPECT_EQ(test, stream->dst.height, 1080);
KUNIT_EXPECT_EQ(test, stream->dst.x, 240);
KUNIT_EXPECT_EQ(test, stream->dst.y, 0);
}
/**
* dm_test_update_scaling_rmx_aspect_letterbox - Test RMX_ASPECT letterboxes wide sources
* @test: The KUnit test context
*/
static void dm_test_update_scaling_rmx_aspect_letterbox(struct kunit *test)
{
struct amdgpu_device *adev = dm_kunit_alloc_adev(test);
struct dc_stream_state *stream = dm_kunit_alloc_stream(test, NULL);
struct dm_connector_state *dm_state;
struct drm_display_mode mode = { 0 };
dm_state = kunit_kzalloc(test, sizeof(*dm_state), GFP_KERNEL);
KUNIT_ASSERT_NOT_NULL(test, dm_state);
/* 16:9 source on a 4:3 panel -> letterboxed */
mode.hdisplay = 1920;
mode.vdisplay = 1080;
stream->timing.h_addressable = 1024;
stream->timing.v_addressable = 768;
dm_state->scaling = RMX_ASPECT;
amdgpu_dm_update_stream_scaling_settings(&adev->ddev, &mode, dm_state, stream);
KUNIT_EXPECT_EQ(test, stream->dst.width, 1024);
KUNIT_EXPECT_EQ(test, stream->dst.height, 576);
KUNIT_EXPECT_EQ(test, stream->dst.x, 0);
KUNIT_EXPECT_EQ(test, stream->dst.y, 96);
}
/**
* dm_test_update_scaling_rmx_center - Test RMX_CENTER centers a 1:1 dst
* @test: The KUnit test context
*/
static void dm_test_update_scaling_rmx_center(struct kunit *test)
{
struct amdgpu_device *adev = dm_kunit_alloc_adev(test);
struct dc_stream_state *stream = dm_kunit_alloc_stream(test, NULL);
struct dm_connector_state *dm_state;
struct drm_display_mode mode = { 0 };
dm_state = kunit_kzalloc(test, sizeof(*dm_state), GFP_KERNEL);
KUNIT_ASSERT_NOT_NULL(test, dm_state);
mode.hdisplay = 1280;
mode.vdisplay = 720;
stream->timing.h_addressable = 1920;
stream->timing.v_addressable = 1080;
dm_state->scaling = RMX_CENTER;
amdgpu_dm_update_stream_scaling_settings(&adev->ddev, &mode, dm_state, stream);
/* RMX_CENTER: dst = src, centered on the addressable area */
KUNIT_EXPECT_EQ(test, stream->dst.width, 1280);
KUNIT_EXPECT_EQ(test, stream->dst.height, 720);
KUNIT_EXPECT_EQ(test, stream->dst.x, 320);
KUNIT_EXPECT_EQ(test, stream->dst.y, 180);
}
/**
* dm_test_update_scaling_underscan - Test underscan borders shrink and offset dst
* @test: The KUnit test context
*/
static void dm_test_update_scaling_underscan(struct kunit *test)
{
struct amdgpu_device *adev = dm_kunit_alloc_adev(test);
struct dc_stream_state *stream = dm_kunit_alloc_stream(test, NULL);
struct dm_connector_state *dm_state;
struct drm_display_mode mode = { 0 };
dm_state = kunit_kzalloc(test, sizeof(*dm_state), GFP_KERNEL);
KUNIT_ASSERT_NOT_NULL(test, dm_state);
mode.hdisplay = 1920;
mode.vdisplay = 1080;
stream->timing.h_addressable = 1920;
stream->timing.v_addressable = 1080;
dm_state->scaling = RMX_FULL;
dm_state->underscan_enable = true;
dm_state->underscan_hborder = 64;
dm_state->underscan_vborder = 32;
amdgpu_dm_update_stream_scaling_settings(&adev->ddev, &mode, dm_state, stream);
/* Full dst, then underscan: x/y += border/2, width/height -= border */
KUNIT_EXPECT_EQ(test, stream->dst.x, 32);
KUNIT_EXPECT_EQ(test, stream->dst.y, 16);
KUNIT_EXPECT_EQ(test, stream->dst.width, 1856);
KUNIT_EXPECT_EQ(test, stream->dst.height, 1048);
}
/* Tests for is_content_protection_different() */
struct dm_test_cp_ctx {
@ -2113,14 +1913,6 @@ static struct kunit_case amdgpu_dm_tests[] = {
/* set_master_stream */
KUNIT_CASE(dm_test_master_stream_highest_refresh),
KUNIT_CASE(dm_test_master_stream_defaults_to_first),
/* amdgpu_dm_update_stream_scaling_settings */
KUNIT_CASE(dm_test_update_scaling_null_mode),
KUNIT_CASE(dm_test_update_scaling_fullscreen_default),
KUNIT_CASE(dm_test_update_scaling_rmx_full),
KUNIT_CASE(dm_test_update_scaling_rmx_aspect_pillarbox),
KUNIT_CASE(dm_test_update_scaling_rmx_aspect_letterbox),
KUNIT_CASE(dm_test_update_scaling_rmx_center),
KUNIT_CASE(dm_test_update_scaling_underscan),
/* is_content_protection_different */
KUNIT_CASE(dm_test_cp_diff_hdcp_type_change),
KUNIT_CASE(dm_test_cp_diff_reenable_mode_changed),