From a62e6f515e00ef3ef33c57d06fbf803dbe4c3f08 Mon Sep 17 00:00:00 2001 From: Charlene Liu Date: Mon, 20 Apr 2026 20:30:55 -0400 Subject: [PATCH] drm/amd/display: remove watermark range notify [Why & How] dcn42 only use one set of watermark A, driver always update set A runtime. no need to notify pmfw the clock range. Reviewed-by: Dmytro Laktyushkin Signed-off-by: Charlene Liu Signed-off-by: James Lin Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c index a0cdaf69056e..c4ed6c3594c2 100644 --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c @@ -1020,7 +1020,7 @@ static struct clk_mgr_funcs dcn42_funcs = { .init_clocks = dcn42_init_clocks, .enable_pme_wa = dcn42_enable_pme_wa, .are_clock_states_equal = dcn42_are_clock_states_equal, - .notify_wm_ranges = dcn42_notify_wm_ranges, + .notify_wm_ranges = NULL, .set_low_power_state = dcn42_set_low_power_state, .exit_low_power_state = dcn42_exit_low_power_state, .get_max_clock_khz = dcn42_get_max_clock_khz,