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ARM: dts: stm32: phyboard-sargas: Introduce SoM device tree
Add stm32mp15xx-phycore-som.dtsi device tree file to split hardware features between the phyBOARD (baseboard) and the phyCORE (SoM). Signed-off-by: Christophe Parant <c.parant@phytec.fr> Link: https://lore.kernel.org/r/20251210101611.27008-3-c.parant@phytec.fr Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
This commit is contained in:
parent
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commit
a620efc8ab
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@ -9,7 +9,7 @@
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#include <dt-bindings/pinctrl/stm32-pinfunc.h>
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#include "stm32mp157.dtsi"
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#include "stm32mp15xc.dtsi"
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#include "stm32mp15xxac-pinctrl.dtsi"
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#include "stm32mp15xx-phycore-som.dtsi"
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#include "stm32mp15xx-phyboard-sargas.dtsi"
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/ {
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@ -5,23 +5,13 @@
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* Author: Dom VOVARD <dom.vovard@linrt.com>.
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/leds/leds-pca9532.h>
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#include <dt-bindings/mfd/st,stpmic1.h>
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#include <dt-bindings/net/ti-dp83867.h>
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#include "stm32mp15-pinctrl.dtsi"
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/ {
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aliases {
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ethernet0 = ðernet0;
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rtc0 = &i2c4_rtc;
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rtc1 = &rtc;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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@ -42,48 +32,6 @@ key-enter {
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};
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};
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reserved-memory {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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retram: retram@38000000 {
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compatible = "shared-dma-pool";
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reg = <0x38000000 0x10000>;
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no-map;
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};
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mcuram: mcuram@30000000 {
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compatible = "shared-dma-pool";
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reg = <0x30000000 0x40000>;
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no-map;
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};
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mcuram2: mcuram2@10000000 {
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compatible = "shared-dma-pool";
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reg = <0x10000000 0x40000>;
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no-map;
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};
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vdev0vring0: vdev0vring0@10040000 {
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compatible = "shared-dma-pool";
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reg = <0x10040000 0x1000>;
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no-map;
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};
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vdev0vring1: vdev0vring1@10041000 {
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compatible = "shared-dma-pool";
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reg = <0x10041000 0x1000>;
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no-map;
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};
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vdev0buffer: vdev0buffer@10042000 {
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compatible = "shared-dma-pool";
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reg = <0x10042000 0x4000>;
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no-map;
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};
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};
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sound {
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compatible = "audio-graph-card";
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label = "STM32MP1-PHYCORE";
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@ -93,44 +41,6 @@ sound {
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dais = <&sai2b_port>,
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<&sai2a_port>;
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};
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regulator_vin: regulator {
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compatible = "regulator-fixed";
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regulator-name = "vin";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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};
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};
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ðernet0 {
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pinctrl-0 = <ðernet0_rgmii_pins_d>;
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pinctrl-1 = <ðernet0_rgmii_sleep_pins_d>;
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pinctrl-names = "default", "sleep";
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phy-mode = "rgmii-id";
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max-speed = <1000>;
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phy-handle = <&phy0>;
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st,eth-clk-sel;
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status = "okay";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "snps,dwmac-mdio";
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phy0: ethernet-phy@1 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <1>;
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interrupt-parent = <&gpiog>;
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interrupts = <12 IRQ_TYPE_EDGE_FALLING>;
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ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
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ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
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ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
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ti,min-output-impedance;
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enet-phy-lane-no-swap;
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ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
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};
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};
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};
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&i2c1 {
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@ -222,176 +132,6 @@ led-2 {
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};
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};
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&i2c4 {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&i2c4_pins_a>;
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pinctrl-1 = <&i2c4_sleep_pins_a>;
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i2c-scl-rising-time-ns = <185>;
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i2c-scl-falling-time-ns = <20>;
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status = "okay";
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pmic@33 {
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compatible = "st,stpmic1";
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reg = <0x33>;
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interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
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interrupt-controller;
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#interrupt-cells = <2>;
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regulators {
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compatible = "st,stpmic1-regulators";
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buck1-supply = <®ulator_vin>;
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buck2-supply = <®ulator_vin>;
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buck3-supply = <®ulator_vin>;
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buck4-supply = <®ulator_vin>;
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ldo1-supply = <&v3v3>;
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ldo2-supply = <&v3v3>;
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ldo3-supply = <&vdd_ddr>;
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ldo4-supply = <®ulator_vin>;
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ldo5-supply = <&v3v3>;
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ldo6-supply = <&v3v3>;
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boost-supply = <®ulator_vin>;
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pwr_sw1-supply = <&bst_out>;
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pwr_sw2-supply = <&bst_out>;
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vddcore: buck1 {
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regulator-name = "vddcore";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1350000>;
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regulator-always-on;
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regulator-initial-mode = <0>;
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};
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vdd_ddr: buck2 {
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regulator-name = "vdd_ddr";
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regulator-min-microvolt = <1350000>;
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regulator-max-microvolt = <1350000>;
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regulator-always-on;
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regulator-initial-mode = <0>;
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};
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vdd: buck3 {
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regulator-name = "vdd";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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st,mask-reset;
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regulator-initial-mode = <0>;
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};
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v3v3: buck4 {
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regulator-name = "v3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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regulator-initial-mode = <0>;
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};
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v1v8_audio: ldo1 {
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regulator-name = "v1v8_audio";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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interrupts = <IT_CURLIM_LDO1 0>;
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};
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vdd_eth_2v5: ldo2 {
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regulator-name = "dd_eth_2v5";
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regulator-min-microvolt = <2500000>;
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regulator-max-microvolt = <2500000>;
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regulator-always-on;
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interrupts = <IT_CURLIM_LDO2 0>;
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};
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vtt_ddr: ldo3 {
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regulator-name = "vtt_ddr";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <750000>;
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regulator-always-on;
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regulator-over-current-protection;
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};
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vdd_usb: ldo4 {
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regulator-name = "vdd_usb";
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interrupts = <IT_CURLIM_LDO4 0>;
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};
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vdda: ldo5 {
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regulator-name = "vdda";
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regulator-min-microvolt = <2900000>;
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regulator-max-microvolt = <2900000>;
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interrupts = <IT_CURLIM_LDO5 0>;
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regulator-boot-on;
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};
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vdd_eth_1v0: ldo6 {
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regulator-name = "vdd_eth_1v0";
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-always-on;
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interrupts = <IT_CURLIM_LDO6 0>;
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};
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vref_ddr: vref_ddr {
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regulator-name = "vref_ddr";
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regulator-always-on;
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};
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bst_out: boost {
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regulator-name = "bst_out";
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interrupts = <IT_OCP_BOOST 0>;
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};
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vbus_otg: pwr_sw1 {
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regulator-name = "vbus_otg";
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interrupts = <IT_OCP_OTG 0>;
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regulator-active-discharge = <1>;
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};
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vbus_sw: pwr_sw2 {
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regulator-name = "vbus_sw";
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interrupts = <IT_OCP_SWOUT 0>;
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regulator-active-discharge = <1>;
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};
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};
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onkey {
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compatible = "st,stpmic1-onkey";
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interrupts = <IT_PONKEY_F 0>,
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<IT_PONKEY_R 0>;
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interrupt-names = "onkey-falling",
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"onkey-rising";
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power-off-time-sec = <10>;
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};
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watchdog {
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compatible = "st,stpmic1-wdt";
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};
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};
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i2c4_eeprom: eeprom@50 {
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compatible = "microchip,24c32",
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"atmel,24c32";
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reg = <0x50>;
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};
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i2c4_rtc: rtc@52 {
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compatible = "microcrystal,rv3028";
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reg = <0x52>;
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};
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};
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&ipcc {
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status = "okay";
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};
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&iwdg2 {
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timeout-sec = <32>;
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status = "okay";
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};
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&m_can2 {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&m_can2_pins_a>;
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@ -399,46 +139,6 @@ &m_can2 {
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status = "okay";
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};
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&m4_rproc {
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memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
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<&vdev0vring1>, <&vdev0buffer>;
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mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>;
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mbox-names = "vq0", "vq1", "shutdown", "detach";
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interrupt-parent = <&exti>;
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interrupts = <68 1>;
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status = "okay";
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};
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&pwr_regulators {
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vdd-supply = <&vdd>;
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vdd_3v3_usbfs-supply = <&vdd_usb>;
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};
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&qspi {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>;
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pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>;
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status = "okay";
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flash0: flash@0 {
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compatible = "winbond,w25q128", "jedec,spi-nor";
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reg = <0>;
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spi-rx-bus-width = <4>;
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spi-max-frequency = <50000000>;
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m25p,fast-read;
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#address-cells = <1>;
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#size-cells = <1>;
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};
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};
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&rng1 {
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status = "okay";
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};
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&rtc {
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status = "okay";
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};
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&sai2 {
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clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
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clock-names = "pclk", "x8k", "x11k";
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@ -492,21 +192,6 @@ &sdmmc1 {
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status = "okay";
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};
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&sdmmc2 {
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pinctrl-names = "default", "opendrain", "sleep";
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pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_e>;
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pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_e>;
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pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_e>;
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non-removable;
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no-sd;
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no-sdio;
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st,neg-edge;
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bus-width = <8>;
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vmmc-supply = <&v3v3>;
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vqmmc-supply = <&v3v3>;
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mmc-ddr-3_3v;
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};
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&spi1 {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&spi1_pins_a>;
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329
arch/arm/boot/dts/st/stm32mp15xx-phycore-som.dtsi
Normal file
329
arch/arm/boot/dts/st/stm32mp15xx-phycore-som.dtsi
Normal file
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@ -0,0 +1,329 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/*
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* Copyright (C) Phytec GmbH 2019-2020 - All Rights Reserved
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* Author: Dom VOVARD <dom.vovard@linrt.com>
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* Copyright (C) 2022-2023 Steffen Trumtrar <kernel@pengutronix.de>
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* Copyright (C) 2024 PHYTEC Messtechnik GmbH
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* Author: Christophe Parant <c.parant@phytec.fr>
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/mfd/st,stpmic1.h>
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#include <dt-bindings/net/ti-dp83867.h>
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#include "stm32mp15-pinctrl.dtsi"
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#include "stm32mp15xxac-pinctrl.dtsi"
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/ {
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aliases {
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ethernet0 = ðernet0;
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rtc0 = &i2c4_rtc;
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rtc1 = &rtc;
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};
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reserved-memory {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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retram: retram@38000000 {
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compatible = "shared-dma-pool";
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reg = <0x38000000 0x10000>;
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no-map;
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};
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mcuram: mcuram@30000000 {
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compatible = "shared-dma-pool";
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reg = <0x30000000 0x40000>;
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no-map;
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};
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mcuram2: mcuram2@10000000 {
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compatible = "shared-dma-pool";
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reg = <0x10000000 0x40000>;
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no-map;
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};
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vdev0vring0: vdev0vring0@10040000 {
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compatible = "shared-dma-pool";
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reg = <0x10040000 0x1000>;
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no-map;
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};
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vdev0vring1: vdev0vring1@10041000 {
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compatible = "shared-dma-pool";
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reg = <0x10041000 0x1000>;
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no-map;
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};
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vdev0buffer: vdev0buffer@10042000 {
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compatible = "shared-dma-pool";
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reg = <0x10042000 0x4000>;
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no-map;
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};
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};
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regulator_vin: regulator {
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compatible = "regulator-fixed";
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regulator-name = "vin";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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};
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};
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ðernet0 {
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pinctrl-0 = <ðernet0_rgmii_pins_d>;
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pinctrl-1 = <ðernet0_rgmii_sleep_pins_d>;
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pinctrl-names = "default", "sleep";
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phy-mode = "rgmii-id";
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max-speed = <1000>;
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phy-handle = <&phy0>;
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st,eth-clk-sel;
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status = "okay";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
|
||||
compatible = "snps,dwmac-mdio";
|
||||
|
||||
phy0: ethernet-phy@1 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <1>;
|
||||
interrupt-parent = <&gpiog>;
|
||||
interrupts = <12 IRQ_TYPE_EDGE_FALLING>;
|
||||
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
|
||||
ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
|
||||
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
|
||||
ti,min-output-impedance;
|
||||
enet-phy-lane-no-swap;
|
||||
ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c4 {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&i2c4_pins_a>;
|
||||
pinctrl-1 = <&i2c4_sleep_pins_a>;
|
||||
i2c-scl-rising-time-ns = <185>;
|
||||
i2c-scl-falling-time-ns = <20>;
|
||||
status = "okay";
|
||||
|
||||
pmic@33 {
|
||||
compatible = "st,stpmic1";
|
||||
reg = <0x33>;
|
||||
interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
|
||||
regulators {
|
||||
compatible = "st,stpmic1-regulators";
|
||||
buck1-supply = <®ulator_vin>;
|
||||
buck2-supply = <®ulator_vin>;
|
||||
buck3-supply = <®ulator_vin>;
|
||||
buck4-supply = <®ulator_vin>;
|
||||
ldo1-supply = <&v3v3>;
|
||||
ldo2-supply = <&v3v3>;
|
||||
ldo3-supply = <&vdd_ddr>;
|
||||
ldo4-supply = <®ulator_vin>;
|
||||
ldo5-supply = <&v3v3>;
|
||||
ldo6-supply = <&v3v3>;
|
||||
boost-supply = <®ulator_vin>;
|
||||
pwr_sw1-supply = <&bst_out>;
|
||||
pwr_sw2-supply = <&bst_out>;
|
||||
|
||||
vddcore: buck1 {
|
||||
regulator-name = "vddcore";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1350000>;
|
||||
regulator-always-on;
|
||||
regulator-initial-mode = <0>;
|
||||
};
|
||||
|
||||
vdd_ddr: buck2 {
|
||||
regulator-name = "vdd_ddr";
|
||||
regulator-min-microvolt = <1350000>;
|
||||
regulator-max-microvolt = <1350000>;
|
||||
regulator-always-on;
|
||||
regulator-initial-mode = <0>;
|
||||
};
|
||||
|
||||
vdd: buck3 {
|
||||
regulator-name = "vdd";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
st,mask-reset;
|
||||
regulator-initial-mode = <0>;
|
||||
};
|
||||
|
||||
v3v3: buck4 {
|
||||
regulator-name = "v3v3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
regulator-initial-mode = <0>;
|
||||
};
|
||||
|
||||
v1v8_audio: ldo1 {
|
||||
regulator-name = "v1v8_audio";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
interrupts = <IT_CURLIM_LDO1 0>;
|
||||
|
||||
};
|
||||
|
||||
vdd_eth_2v5: ldo2 {
|
||||
regulator-name = "dd_eth_2v5";
|
||||
regulator-min-microvolt = <2500000>;
|
||||
regulator-max-microvolt = <2500000>;
|
||||
regulator-always-on;
|
||||
interrupts = <IT_CURLIM_LDO2 0>;
|
||||
|
||||
};
|
||||
|
||||
vtt_ddr: ldo3 {
|
||||
regulator-name = "vtt_ddr";
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <750000>;
|
||||
regulator-always-on;
|
||||
regulator-over-current-protection;
|
||||
};
|
||||
|
||||
vdd_usb: ldo4 {
|
||||
regulator-name = "vdd_usb";
|
||||
interrupts = <IT_CURLIM_LDO4 0>;
|
||||
};
|
||||
|
||||
vdda: ldo5 {
|
||||
regulator-name = "vdda";
|
||||
regulator-min-microvolt = <2900000>;
|
||||
regulator-max-microvolt = <2900000>;
|
||||
interrupts = <IT_CURLIM_LDO5 0>;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vdd_eth_1v0: ldo6 {
|
||||
regulator-name = "vdd_eth_1v0";
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
regulator-always-on;
|
||||
interrupts = <IT_CURLIM_LDO6 0>;
|
||||
|
||||
};
|
||||
|
||||
vref_ddr: vref_ddr {
|
||||
regulator-name = "vref_ddr";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
bst_out: boost {
|
||||
regulator-name = "bst_out";
|
||||
interrupts = <IT_OCP_BOOST 0>;
|
||||
};
|
||||
|
||||
vbus_otg: pwr_sw1 {
|
||||
regulator-name = "vbus_otg";
|
||||
interrupts = <IT_OCP_OTG 0>;
|
||||
regulator-active-discharge = <1>;
|
||||
};
|
||||
|
||||
vbus_sw: pwr_sw2 {
|
||||
regulator-name = "vbus_sw";
|
||||
interrupts = <IT_OCP_SWOUT 0>;
|
||||
regulator-active-discharge = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
onkey {
|
||||
compatible = "st,stpmic1-onkey";
|
||||
interrupts = <IT_PONKEY_F 0>,
|
||||
<IT_PONKEY_R 0>;
|
||||
interrupt-names = "onkey-falling",
|
||||
"onkey-rising";
|
||||
power-off-time-sec = <10>;
|
||||
};
|
||||
|
||||
watchdog {
|
||||
compatible = "st,stpmic1-wdt";
|
||||
};
|
||||
};
|
||||
|
||||
i2c4_eeprom: eeprom@50 {
|
||||
compatible = "microchip,24c32",
|
||||
"atmel,24c32";
|
||||
reg = <0x50>;
|
||||
};
|
||||
|
||||
i2c4_rtc: rtc@52 {
|
||||
compatible = "microcrystal,rv3028";
|
||||
reg = <0x52>;
|
||||
};
|
||||
};
|
||||
|
||||
&ipcc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&iwdg2 {
|
||||
timeout-sec = <32>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&m4_rproc {
|
||||
memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
|
||||
<&vdev0vring1>, <&vdev0buffer>;
|
||||
mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>;
|
||||
mbox-names = "vq0", "vq1", "shutdown", "detach";
|
||||
interrupt-parent = <&exti>;
|
||||
interrupts = <68 1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwr_regulators {
|
||||
vdd-supply = <&vdd>;
|
||||
vdd_3v3_usbfs-supply = <&vdd_usb>;
|
||||
};
|
||||
|
||||
&qspi {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>;
|
||||
pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>;
|
||||
status = "okay";
|
||||
|
||||
flash0: flash@0 {
|
||||
compatible = "winbond,w25q128", "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-rx-bus-width = <4>;
|
||||
spi-max-frequency = <50000000>;
|
||||
m25p,fast-read;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&rng1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rtc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdmmc2 {
|
||||
pinctrl-names = "default", "opendrain", "sleep";
|
||||
pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_e>;
|
||||
pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_e>;
|
||||
pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_e>;
|
||||
non-removable;
|
||||
no-sd;
|
||||
no-sdio;
|
||||
st,neg-edge;
|
||||
bus-width = <8>;
|
||||
vmmc-supply = <&v3v3>;
|
||||
vqmmc-supply = <&v3v3>;
|
||||
mmc-ddr-3_3v;
|
||||
};
|
||||
Loading…
Reference in New Issue
Block a user