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ice: check low latency PHY timer update firmware capability
Newer versions of firmware support programming the PHY timer via the low latency interface exposed over REG_LL_PROXY_L and REG_LL_PROXY_H. Add support for checking the device capabilities for this feature. Co-developed-by: Karol Kolacinski <karol.kolacinski@intel.com> Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com> Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Reviewed-by: Milena Olech <milena.olech@intel.com> Signed-off-by: Anton Nadezhdin <anton.nadezhdin@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
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@ -2641,6 +2641,7 @@ ice_parse_1588_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,
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info->ts_ll_read = ((number & ICE_TS_LL_TX_TS_READ_M) != 0);
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info->ts_ll_int_read = ((number & ICE_TS_LL_TX_TS_INT_READ_M) != 0);
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info->ll_phy_tmr_update = ((number & ICE_TS_LL_PHY_TMR_UPDATE_M) != 0);
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info->ena_ports = logical_id;
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info->tmr_own_map = phys_id;
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@ -2663,6 +2664,8 @@ ice_parse_1588_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,
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info->ts_ll_read);
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ice_debug(hw, ICE_DBG_INIT, "dev caps: ts_ll_int_read = %u\n",
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info->ts_ll_int_read);
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ice_debug(hw, ICE_DBG_INIT, "dev caps: ll_phy_tmr_update = %u\n",
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info->ll_phy_tmr_update);
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ice_debug(hw, ICE_DBG_INIT, "dev caps: ieee_1588 ena_ports = %u\n",
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info->ena_ports);
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ice_debug(hw, ICE_DBG_INIT, "dev caps: tmr_own_map = %u\n",
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@ -369,6 +369,7 @@ struct ice_ts_func_info {
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#define ICE_TS_TMR1_ENA_M BIT(26)
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#define ICE_TS_LL_TX_TS_READ_M BIT(28)
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#define ICE_TS_LL_TX_TS_INT_READ_M BIT(29)
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#define ICE_TS_LL_PHY_TMR_UPDATE_M BIT(30)
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struct ice_ts_dev_info {
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/* Device specific info */
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@ -383,6 +384,7 @@ struct ice_ts_dev_info {
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u8 tmr1_ena;
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u8 ts_ll_read;
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u8 ts_ll_int_read;
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u8 ll_phy_tmr_update;
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};
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#define ICE_NAC_TOPO_PRIMARY_M BIT(0)
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