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Merge "bus: mhi: host: Add snapshot of MHI bus misc driver"
This commit is contained in:
qctecmdr
Gerrit - the friendly Code Review server
commit
a5b6faf118
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@ -29,3 +29,11 @@ config MHI_BUS_PCI_GENERIC
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This driver provides MHI PCI controller driver for devices such as
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Qualcomm SDX55 based PCIe modems.
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config MHI_BUS_MISC
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bool "Support for miscellaneous MHI features"
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depends on MHI_BUS
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help
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Miscellaneous features support for MHI Bus driver includes IPC logs,
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introduction of a list of controllers for debug using ramdumps and
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other features not present upstream such as Dynamic Resource Vote,
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SFR parsing using RDDM dumps, scanning for the RDDM cookie and more.
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@ -1,5 +1,6 @@
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obj-$(CONFIG_MHI_BUS) += mhi.o
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mhi-y := init.o main.o pm.o boot.o
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mhi-$(CONFIG_MHI_BUS_MISC) += misc.o
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mhi-$(CONFIG_MHI_BUS_DEBUG) += debugfs.o
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obj-$(CONFIG_MHI_BUS_PCI_GENERIC) += mhi_pci_generic.o
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@ -8,6 +8,7 @@
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#define _MHI_INT_H
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#include "../common.h"
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#include "misc.h"
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extern struct bus_type mhi_bus_type;
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1913
drivers/bus/mhi/host/misc.c
Normal file
1913
drivers/bus/mhi/host/misc.c
Normal file
File diff suppressed because it is too large
Load Diff
340
drivers/bus/mhi/host/misc.h
Normal file
340
drivers/bus/mhi/host/misc.h
Normal file
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@ -0,0 +1,340 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. */
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#ifndef _MHI_CORE_MISC_H_
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#define _MHI_CORE_MISC_H_
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#include <linux/mhi_misc.h>
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#include <linux/msm_pcie.h>
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#define MHI_FORCE_WAKE_DELAY_US (100)
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#define MHI_IPC_LOG_PAGES (100)
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#define MAX_RDDM_TABLE_SIZE (8)
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#define MHI_REG_SIZE (SZ_4K)
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#define REG_WRITE_QUEUE_LEN 512
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/* MHI misc capability registers */
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#define MISC_OFFSET (0x24)
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#define MISC_CAP_MASK (0xFFFFFFFF)
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#define MISC_CAP_SHIFT (0)
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#define CAP_CAPID_MASK (0xFF000000)
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#define CAP_CAPID_SHIFT (24)
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#define CAP_NEXT_CAP_MASK (0x00FFF000)
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#define CAP_NEXT_CAP_SHIFT (12)
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/* MHI Bandwidth scaling offsets */
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#define BW_SCALE_CFG_OFFSET (0x04)
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#define BW_SCALE_CFG_CHAN_DB_ID_MASK (0xFE000000)
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#define BW_SCALE_CFG_CHAN_DB_ID_SHIFT (25)
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#define BW_SCALE_CFG_ENABLED_MASK (0x01000000)
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#define BW_SCALE_CFG_ENABLED_SHIFT (24)
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#define BW_SCALE_CFG_ER_ID_MASK (0x00F80000)
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#define BW_SCALE_CFG_ER_ID_SHIFT (19)
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#define BW_SCALE_CAP_ID (3)
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#define MHI_TRE_GET_EV_BW_REQ_SEQ(tre) (((tre)->dword[0] >> 8) & 0xFF)
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#define MHI_BW_SCALE_CHAN_DB 126
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#define MHI_BW_SCALE_SETUP(er_index) (((MHI_BW_SCALE_CHAN_DB << \
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BW_SCALE_CFG_CHAN_DB_ID_SHIFT) & BW_SCALE_CFG_CHAN_DB_ID_MASK) | \
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((1 << BW_SCALE_CFG_ENABLED_SHIFT) & BW_SCALE_CFG_ENABLED_MASK) | \
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(((er_index) << BW_SCALE_CFG_ER_ID_SHIFT) & BW_SCALE_CFG_ER_ID_MASK))
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#define MHI_BW_SCALE_RESULT(status, seq) (((status) & 0xF) << 8 | \
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((seq) & 0xFF))
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#define MHI_BW_SCALE_NACK 0xF
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/* subsystem failure reason cfg command */
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#define MHI_TRE_CMD_SFR_CFG_PTR(ptr) (ptr)
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#define MHI_TRE_CMD_SFR_CFG_DWORD0(len) (len)
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#define MHI_TRE_CMD_SFR_CFG_DWORD1 (MHI_CMD_SFR_CFG << 16)
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/* MHI Timesync offsets */
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#define TIMESYNC_CFG_OFFSET (0x04)
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#define TIMESYNC_CFG_ENABLED_MASK (0x80000000)
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#define TIMESYNC_CFG_ENABLED_SHIFT (31)
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#define TIMESYNC_CFG_CHAN_DB_ID_MASK (0x0000FF00)
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#define TIMESYNC_CFG_CHAN_DB_ID_SHIFT (8)
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#define TIMESYNC_CFG_ER_ID_MASK (0x000000FF)
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#define TIMESYNC_CFG_ER_ID_SHIFT (0)
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#define TIMESYNC_TIME_LOW_OFFSET (0x8)
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#define TIMESYNC_TIME_HIGH_OFFSET (0xC)
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#define MHI_TIMESYNC_CHAN_DB (125)
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#define TIMESYNC_CAP_ID (2)
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#define MHI_TIMESYNC_DB_SETUP(er_index) ((MHI_TIMESYNC_CHAN_DB << \
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TIMESYNC_CFG_CHAN_DB_ID_SHIFT) & TIMESYNC_CFG_CHAN_DB_ID_MASK | \
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(1 << TIMESYNC_CFG_ENABLED_SHIFT) & TIMESYNC_CFG_ENABLED_MASK | \
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((er_index) << TIMESYNC_CFG_ER_ID_SHIFT) & TIMESYNC_CFG_ER_ID_MASK)
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#define MHI_VERB(dev, fmt, ...) do { \
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struct mhi_private *mhi_priv = \
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dev_get_drvdata(&mhi_cntrl->mhi_dev->dev); \
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dev_dbg(dev, "[D][%s] " fmt, __func__, ##__VA_ARGS__); \
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if (mhi_priv && mhi_priv->log_lvl <= MHI_MSG_LVL_VERBOSE) \
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ipc_log_string(mhi_priv->log_buf, "[D][%s] " fmt, __func__, \
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##__VA_ARGS__); \
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} while (0)
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#define MHI_LOG(dev, fmt, ...) do { \
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struct mhi_private *mhi_priv = \
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dev_get_drvdata(&mhi_cntrl->mhi_dev->dev); \
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dev_dbg(dev, "[I][%s] " fmt, __func__, ##__VA_ARGS__); \
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if (mhi_priv && mhi_priv->log_lvl <= MHI_MSG_LVL_INFO) \
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ipc_log_string(mhi_priv->log_buf, "[I][%s] " fmt, __func__, \
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##__VA_ARGS__); \
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} while (0)
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#define MHI_ERR(dev, fmt, ...) do { \
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struct mhi_private *mhi_priv = \
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dev_get_drvdata(&mhi_cntrl->mhi_dev->dev); \
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dev_err(dev, "[E][%s] " fmt, __func__, ##__VA_ARGS__); \
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if (mhi_priv && mhi_priv->log_lvl <= MHI_MSG_LVL_ERROR) \
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ipc_log_string(mhi_priv->log_buf, "[E][%s] " fmt, __func__, \
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##__VA_ARGS__); \
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} while (0)
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#define MHI_CRITICAL(dev, fmt, ...) do { \
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struct mhi_private *mhi_priv = \
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dev_get_drvdata(&mhi_cntrl->mhi_dev->dev); \
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dev_crit(dev, "[C][%s] " fmt, __func__, ##__VA_ARGS__); \
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if (mhi_priv && mhi_priv->log_lvl <= MHI_MSG_LVL_CRITICAL) \
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ipc_log_string(mhi_priv->log_buf, "[C][%s] " fmt, __func__, \
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##__VA_ARGS__); \
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} while (0)
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/**
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* struct rddm_table_info - rddm table info
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* @base_address - Start offset of the file
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* @actual_phys_address - phys addr offset of file
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* @size - size of file
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* @description - file description
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* @file_name - name of file
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*/
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struct rddm_table_info {
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u64 base_address;
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u64 actual_phys_address;
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u64 size;
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char description[20];
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char file_name[20];
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};
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/**
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* struct rddm_header - rddm header
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* @version - header ver
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* @header_size - size of header
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* @rddm_table_info - array of rddm table info
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*/
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struct rddm_header {
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u32 version;
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u32 header_size;
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struct rddm_table_info table_info[MAX_RDDM_TABLE_SIZE];
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};
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/**
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* struct file_info - keeping track of file info while traversing the rddm
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* table header
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* @file_offset - current file offset
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* @seg_idx - mhi buf seg array index
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* @rem_seg_len - remaining length of the segment containing current file
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*/
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struct file_info {
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u8 *file_offset;
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u32 file_size;
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u32 seg_idx;
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u32 rem_seg_len;
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};
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/**
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* struct reg_write_info - offload reg write info
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* @reg_addr - register address
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* @val - value to be written to register
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* @chan - channel number
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* @valid - entry is valid or not
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*/
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struct reg_write_info {
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void __iomem *reg_addr;
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u32 val;
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bool valid;
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};
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/**
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* struct mhi_private - For private variables of an MHI controller
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*/
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struct mhi_private {
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struct list_head node;
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struct mhi_controller *mhi_cntrl;
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enum MHI_DEBUG_LEVEL log_lvl;
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void *log_buf;
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u32 saved_pm_state;
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enum mhi_state saved_dev_state;
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u32 m2_timeout_ms;
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void *priv_data;
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void __iomem *bw_scale_db;
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int (*bw_scale)(struct mhi_controller *mhi_cntrl,
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struct mhi_link_info *link_info);
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phys_addr_t base_addr;
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u32 numeric_id;
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u32 bw_response;
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struct mhi_sfr_info *sfr_info;
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struct mhi_timesync *timesync;
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/* reg write offload */
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struct workqueue_struct *offload_wq;
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struct work_struct reg_write_work;
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struct reg_write_info *reg_write_q;
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atomic_t write_idx;
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u32 read_idx;
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};
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/**
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* struct mhi_bus - For MHI controller debug
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*/
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struct mhi_bus {
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struct list_head controller_list;
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struct mutex lock;
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};
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/**
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* struct mhi_sfr_info - For receiving MHI subsystem failure reason
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*/
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struct mhi_sfr_info {
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void *buf_addr;
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dma_addr_t dma_addr;
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size_t len;
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char *str;
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unsigned int ccs;
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struct completion completion;
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};
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/**
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* struct mhi_timesync - For enabling use of MHI time synchronization feature
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*/
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struct mhi_timesync {
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u64 (*time_get)(struct mhi_controller *mhi_cntrl);
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int (*lpm_disable)(struct mhi_controller *mhi_cntrl);
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int (*lpm_enable)(struct mhi_controller *mhi_cntrl);
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void __iomem *time_reg;
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void __iomem *time_db;
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u32 int_sequence;
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u64 local_time;
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u64 remote_time;
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bool db_pending;
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struct completion completion;
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spinlock_t lock; /* list protection */
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struct list_head head;
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struct mutex mutex;
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};
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/**
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* struct tsync_node - Stores requests when using the timesync doorbell method
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*/
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struct tsync_node {
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struct list_head node;
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u32 sequence;
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u64 remote_time;
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struct mhi_device *mhi_dev;
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void (*cb_func)(struct mhi_device *mhi_dev, u32 sequence,
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u64 local_time, u64 remote_time);
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};
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#ifdef CONFIG_MHI_BUS_MISC
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void mhi_misc_init(void);
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void mhi_misc_exit(void);
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int mhi_misc_init_mmio(struct mhi_controller *mhi_cntrl);
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int mhi_misc_register_controller(struct mhi_controller *mhi_cntrl);
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void mhi_misc_unregister_controller(struct mhi_controller *mhi_cntrl);
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int mhi_process_misc_bw_ev_ring(struct mhi_controller *mhi_cntrl,
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struct mhi_event *mhi_event, u32 event_quota);
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int mhi_process_misc_tsync_ev_ring(struct mhi_controller *mhi_cntrl,
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struct mhi_event *mhi_event, u32 event_quota);
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void mhi_misc_mission_mode(struct mhi_controller *mhi_cntrl);
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void mhi_misc_dbs_pending(struct mhi_controller *mhi_cntrl);
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void mhi_misc_disable(struct mhi_controller *mhi_cntrl);
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void mhi_misc_cmd_configure(struct mhi_controller *mhi_cntrl,
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unsigned int type, u64 *ptr, u32 *dword0,
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u32 *dword1);
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void mhi_misc_cmd_completion(struct mhi_controller *mhi_cntrl,
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unsigned int type, unsigned int ccs);
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void mhi_write_offload_wakedb(struct mhi_controller *mhi_cntrl, int db_val);
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void mhi_reset_reg_write_q(struct mhi_controller *mhi_cntrl);
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void mhi_force_reg_write(struct mhi_controller *mhi_cntrl);
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#else
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static inline void mhi_misc_init(void)
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{
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}
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static inline void mhi_misc_exit(void)
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{
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}
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static inline int mhi_misc_init_mmio(struct mhi_controller *mhi_cntrl)
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{
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return 0;
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}
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static inline int mhi_misc_register_controller(struct mhi_controller *mhi_cntrl)
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{
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return 0;
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}
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static inline void mhi_misc_unregister_controller(struct mhi_controller
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*mhi_cntrl)
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{
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}
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static inline int mhi_process_misc_bw_ev_ring(struct mhi_controller *mhi_cntrl,
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struct mhi_event *mhi_event, u32 event_quota)
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{
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return 0;
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}
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static inline int mhi_process_misc_tsync_ev_ring
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(struct mhi_controller *mhi_cntrl,
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struct mhi_event *mhi_event, u32 event_quota)
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{
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return 0;
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}
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static inline void mhi_misc_mission_mode(struct mhi_controller *mhi_cntrl)
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{
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}
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static inline void mhi_special_dbs_pending(struct mhi_controller *mhi_cntrl)
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{
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}
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static inline void mhi_misc_disable(struct mhi_controller *mhi_cntrl)
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{
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}
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static inline void mhi_misc_cmd_configure(struct mhi_controller *mhi_cntrl,
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unsigned int type, u64 *ptr,
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u32 *dword0, u32 *dword1)
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{
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}
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static inline void mhi_misc_cmd_completion(struct mhi_controller *mhi_cntrl,
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unsigned int type, unsigned int ccs)
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{
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}
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static inline void mhi_write_offload_wakedb(struct mhi_controller *mhi_cntrl,
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int db_val)
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{
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}
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void mhi_reset_reg_write_q(struct mhi_controller *mhi_cntrl)
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{
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}
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void mhi_force_reg_write(struct mhi_controller *mhi_cntrl)
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{
|
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}
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#endif
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#endif /* _MHI_CORE_MISC_H_ */
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669
include/linux/mhi_misc.h
Normal file
669
include/linux/mhi_misc.h
Normal file
|
|
@ -0,0 +1,669 @@
|
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/* SPDX-License-Identifier: GPL-2.0-only */
|
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/* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. */
|
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|
||||
#ifndef _MHI_MISC_H_
|
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#define _MHI_MISC_H_
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|
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#include <linux/mhi.h>
|
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#include <linux/ipc_logging.h>
|
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|
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/**
|
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* enum MHI_DEBUG_LEVEL - various debugging levels
|
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*/
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enum MHI_DEBUG_LEVEL {
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MHI_MSG_LVL_VERBOSE,
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MHI_MSG_LVL_INFO,
|
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MHI_MSG_LVL_ERROR,
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MHI_MSG_LVL_CRITICAL,
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MHI_MSG_LVL_MASK_ALL,
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MHI_MSG_LVL_MAX,
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};
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/**
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* struct mhi_buf - MHI Buffer description
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* @node: list entry point
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* @buf: Virtual address of the buffer
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* @name: Buffer label. For offload channel, configurations name must be:
|
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* ECA - Event context array data
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* CCA - Channel context array data
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* @dma_addr: IOMMU address of the buffer
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* @phys_addr: physical address of the buffer
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* @len: # of bytes
|
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* @is_io: buffer is of IO/registesr type (resource) rather than of DDR/RAM type
|
||||
*/
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struct mhi_buf_extended {
|
||||
struct list_head node;
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||||
void *buf;
|
||||
const char *name;
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||||
dma_addr_t dma_addr;
|
||||
phys_addr_t phys_addr;
|
||||
size_t len;
|
||||
bool is_io;
|
||||
};
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||||
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||||
#ifdef CONFIG_MHI_BUS_MISC
|
||||
|
||||
/**
|
||||
* mhi_report_error - Can be used by controller to signal error condition to the
|
||||
* MHI core driver in case of any need to halt processing or incoming sideband
|
||||
* signal detects an error on endpoint
|
||||
* @mhi_cntrl: MHI controller
|
||||
*
|
||||
* Returns:
|
||||
* 0 if success in reporting the error condition to MHI core
|
||||
* error code on failure
|
||||
*/
|
||||
int mhi_report_error(struct mhi_controller *mhi_cntrl);
|
||||
|
||||
/**
|
||||
* mhi_controller_set_privdata - Set private data for MHI controller
|
||||
* @mhi_cntrl: MHI controller
|
||||
* @priv: pointer to data
|
||||
*/
|
||||
void mhi_controller_set_privdata(struct mhi_controller *mhi_cntrl, void *priv);
|
||||
|
||||
/**
|
||||
* mhi_controller_get_privdata - Get private data from MHI controller
|
||||
* @mhi_cntrl: MHI controller
|
||||
*/
|
||||
void *mhi_controller_get_privdata(struct mhi_controller *mhi_cntrl);
|
||||
|
||||
/**
|
||||
* mhi_bdf_to_controller - Get controller associated with given BDF values
|
||||
* @domain: Domain or root complex of PCIe port
|
||||
* @bus: Bus number
|
||||
* @slot: PCI slot or function number
|
||||
* @dev_id: Device ID of the endpoint
|
||||
*
|
||||
* Returns:
|
||||
* MHI controller structure pointer if BDF match is found
|
||||
* NULL if cookie is not found
|
||||
*/
|
||||
struct mhi_controller *mhi_bdf_to_controller(u32 domain, u32 bus, u32 slot, u32 dev_id);
|
||||
|
||||
/**
|
||||
* mhi_set_m2_timeout_ms - Set M2 timeout in milliseconds to wait before a
|
||||
* fast/silent suspend
|
||||
* @mhi_cntrl: MHI controller
|
||||
* @timeout: timeout in ms
|
||||
*/
|
||||
void mhi_set_m2_timeout_ms(struct mhi_controller *mhi_cntrl, u32 timeout);
|
||||
|
||||
/**
|
||||
* mhi_pm_fast_resume - Resume MHI from a fast/silent suspended state
|
||||
* @mhi_cntrl: MHI controller
|
||||
* @notify_clients: if true, clients will be notified of the resume transition
|
||||
*/
|
||||
int mhi_pm_fast_resume(struct mhi_controller *mhi_cntrl, bool notify_clients);
|
||||
|
||||
/**
|
||||
* mhi_pm_fast_suspend - Move MHI into a fast/silent suspended state
|
||||
* @mhi_cntrl: MHI controller
|
||||
* @notify_clients: if true, clients will be notified of the suspend transition
|
||||
*/
|
||||
int mhi_pm_fast_suspend(struct mhi_controller *mhi_cntrl, bool notify_clients);
|
||||
|
||||
/**
|
||||
* mhi_debug_reg_dump - dump MHI registers for debug purpose
|
||||
* @mhi_cntrl: MHI controller
|
||||
*/
|
||||
void mhi_debug_reg_dump(struct mhi_controller *mhi_cntrl);
|
||||
|
||||
/**
|
||||
* mhi_dump_sfr - Print SFR string from RDDM table.
|
||||
* @mhi_cntrl: MHI controller
|
||||
*/
|
||||
void mhi_dump_sfr(struct mhi_controller *mhi_cntrl);
|
||||
|
||||
/**
|
||||
* mhi_device_configure - Allow devices with offload channels to setup their own
|
||||
* channel and event ring context.
|
||||
* @mhi_dev: MHI device
|
||||
* @dir: direction associated with the channel needed to configure
|
||||
* @cfg_tbl: Buffer with ECA/CCA information and data needed to setup context
|
||||
* @elements: Number of items to iterate over from the configuration table
|
||||
*/
|
||||
int mhi_device_configure(struct mhi_device *mhi_dev,
|
||||
enum dma_data_direction dir,
|
||||
struct mhi_buf *cfg_tbl,
|
||||
int elements);
|
||||
|
||||
/**
|
||||
* mhi_scan_rddm_cookie - Look for supplied cookie value in the BHI debug
|
||||
* registers set by device to indicate rddm readiness for debugging purposes.
|
||||
* @mhi_cntrl: MHI controller
|
||||
* @cookie: cookie/pattern value to match
|
||||
*
|
||||
* Returns:
|
||||
* true if cookie is found
|
||||
* false if cookie is not found
|
||||
*/
|
||||
bool mhi_scan_rddm_cookie(struct mhi_controller *mhi_cntrl, u32 cookie);
|
||||
|
||||
/**
|
||||
* mhi_device_get_sync_atomic - Asserts device_wait and moves device to M0
|
||||
* @mhi_dev: Device associated with the channels
|
||||
* @timeout_us: timeout, in micro-seconds
|
||||
* @in_panic: If requested while kernel is in panic state and no ISRs expected
|
||||
*
|
||||
* The device_wake is asserted to keep device in M0 or bring it to M0.
|
||||
* If device is not in M0 state, then this function will wait for device to
|
||||
* move to M0, until @timeout_us elapses.
|
||||
* However, if device's M1 state-change event races with this function
|
||||
* then there is a possiblity of device moving from M0 to M2 and back
|
||||
* to M0. That can't be avoided as host must transition device from M1 to M2
|
||||
* as per the spec.
|
||||
* Clients can ignore that transition after this function returns as the device
|
||||
* is expected to immediately move from M2 to M0 as wake is asserted and
|
||||
* wouldn't enter low power state.
|
||||
* If in_panic boolean is set, no ISRs are expected, hence this API will have to
|
||||
* resort to reading the MHI status register and poll on M0 state change.
|
||||
*
|
||||
* Returns:
|
||||
* 0 if operation was successful (however, M0 -> M2 -> M0 is possible later) as
|
||||
* mentioned above.
|
||||
* -ETIMEDOUT is device faled to move to M0 before @timeout_us elapsed
|
||||
* -EIO if the MHI state is one of the ERROR states.
|
||||
*/
|
||||
int mhi_device_get_sync_atomic(struct mhi_device *mhi_dev, int timeout_us,
|
||||
bool in_panic);
|
||||
|
||||
/**
|
||||
* mhi_controller_set_bw_scale_cb - Set the BW scale callback for MHI controller
|
||||
* @mhi_cntrl: MHI controller
|
||||
* @cb_func: Callback to set for the MHI controller to receive BW scale requests
|
||||
*/
|
||||
void mhi_controller_set_bw_scale_cb(struct mhi_controller *mhi_cntrl,
|
||||
int (*cb_func)(struct mhi_controller *mhi_cntrl,
|
||||
struct mhi_link_info *link_info));
|
||||
/**
|
||||
* mhi_controller_set_base - Set the controller base / resource start address
|
||||
* @mhi_cntrl: MHI controller
|
||||
* @base: Physical address to be set for future reference
|
||||
*/
|
||||
void mhi_controller_set_base(struct mhi_controller *mhi_cntrl,
|
||||
phys_addr_t base);
|
||||
|
||||
/**
|
||||
* mhi_controller_get_base - Get the controller base / resource start address
|
||||
* @mhi_cntrl: MHI controller
|
||||
* @base: Pointer to physical address to be populated
|
||||
*/
|
||||
int mhi_controller_get_base(struct mhi_controller *mhi_cntrl,
|
||||
phys_addr_t *base);
|
||||
|
||||
/**
|
||||
* mhi_controller_get_numeric_id - set numeric ID for controller
|
||||
* @mhi_cntrl: MHI controller
|
||||
* returns value set as ID or 0 if no value was set
|
||||
*/
|
||||
u32 mhi_controller_get_numeric_id(struct mhi_controller *mhi_cntrl);
|
||||
|
||||
/**
|
||||
* mhi_get_channel_db_base - retrieve the channel doorbell base address
|
||||
* @mhi_dev: Device associated with the channels
|
||||
* @value: Pointer to an address value which will be populated
|
||||
*/
|
||||
int mhi_get_channel_db_base(struct mhi_device *mhi_dev, phys_addr_t *value);
|
||||
|
||||
/**
|
||||
* mhi_get_event_ring_db_base - retrieve the event ring doorbell base address
|
||||
* @mhi_dev: Device associated with the channels
|
||||
* @value: Pointer to an address value which will be populated
|
||||
*/
|
||||
int mhi_get_event_ring_db_base(struct mhi_device *mhi_dev, phys_addr_t *value);
|
||||
|
||||
/**
|
||||
* mhi_get_device_for_channel - get the MHI device for a specific channel number
|
||||
* @mhi_cntrl: MHI controller
|
||||
* @channel - channel number
|
||||
*
|
||||
* Returns:
|
||||
* Pointer to the MHI device associated with the channel
|
||||
*/
|
||||
struct mhi_device *mhi_get_device_for_channel(struct mhi_controller *mhi_cntrl,
|
||||
u32 channel);
|
||||
|
||||
/**
|
||||
* mhi_device_ioctl - user space IOCTL support for MHI channels
|
||||
* Native support for setting TIOCM
|
||||
* @mhi_dev: Device associated with the channels
|
||||
* @cmd: IOCTL cmd
|
||||
* @arg: Optional parameter, iotcl cmd specific
|
||||
*/
|
||||
long mhi_device_ioctl(struct mhi_device *mhi_dev, unsigned int cmd,
|
||||
unsigned long arg);
|
||||
|
||||
/**
|
||||
* mhi_controller_set_sfr_support - Set support for subsystem failure reason
|
||||
* @mhi_cntrl: MHI controller
|
||||
*
|
||||
* Returns:
|
||||
* 0 for success, error code for failure
|
||||
*/
|
||||
int mhi_controller_set_sfr_support(struct mhi_controller *mhi_cntrl,
|
||||
size_t len);
|
||||
|
||||
/**
|
||||
* mhi_controller_setup_timesync - Set support for time synchronization feature
|
||||
* @mhi_cntrl: MHI controller
|
||||
* @time_get: Callback to set for the MHI controller to receive host time
|
||||
* @lpm_disable: Callback to set for the MHI controller to disable link LPM
|
||||
* @lpm_enable: Callback to set for the MHI controller to enable link LPM
|
||||
*
|
||||
* Returns:
|
||||
* 0 for success, error code for failure
|
||||
*/
|
||||
int mhi_controller_setup_timesync(struct mhi_controller *mhi_cntrl,
|
||||
u64 (*time_get)(struct mhi_controller *c),
|
||||
int (*lpm_disable)(struct mhi_controller *c),
|
||||
int (*lpm_enable)(struct mhi_controller *c));
|
||||
|
||||
/**
|
||||
* mhi_get_remote_time_sync - Get external soc time relative to local soc time
|
||||
* using MMIO method.
|
||||
* @mhi_dev: Device associated with the channels
|
||||
* @t_host: Pointer to output local soc time
|
||||
* @t_dev: Pointer to output remote soc time
|
||||
*
|
||||
* Returns:
|
||||
* 0 for success, error code for failure
|
||||
*/
|
||||
int mhi_get_remote_time_sync(struct mhi_device *mhi_dev,
|
||||
u64 *t_host,
|
||||
u64 *t_dev);
|
||||
|
||||
/**
|
||||
* mhi_get_remote_time - Get external modem time relative to host time
|
||||
* Trigger event to capture modem time, also capture host time so client
|
||||
* can do a relative drift comparision.
|
||||
* Recommended only tsync device calls this method and do not call this
|
||||
* from atomic context
|
||||
* @mhi_dev: Device associated with the channels
|
||||
* @sequence:unique sequence id track event
|
||||
* @cb_func: callback function to call back
|
||||
*
|
||||
* Returns:
|
||||
* 0 for success, error code for failure
|
||||
*/
|
||||
int mhi_get_remote_time(struct mhi_device *mhi_dev,
|
||||
u32 sequence,
|
||||
void (*cb_func)(struct mhi_device *mhi_dev,
|
||||
u32 sequence,
|
||||
u64 local_time,
|
||||
u64 remote_time));
|
||||
|
||||
/**
|
||||
* mhi_force_reset - does host reset request to collect device side dumps
|
||||
* for debugging purpose
|
||||
* @mhi_cntrl: MHI controller
|
||||
*/
|
||||
int mhi_force_reset(struct mhi_controller *mhi_cntrl);
|
||||
|
||||
/**
|
||||
* mhi_controller_set_loglevel - API for controller to set a desired log level
|
||||
* which will be set to VERBOSE or 0 by default
|
||||
* @mhi_cntrl: MHI controller
|
||||
* @lvl: Log level from MHI_DEBUG_LEVEL enumerator
|
||||
*/
|
||||
void mhi_controller_set_loglevel(struct mhi_controller *mhi_cntrl,
|
||||
enum MHI_DEBUG_LEVEL lvl);
|
||||
|
||||
/**
|
||||
* mhi_get_soc_info - Get SoC info before registering mhi controller
|
||||
* @mhi_cntrl: MHI controller
|
||||
*/
|
||||
int mhi_get_soc_info(struct mhi_controller *mhi_cntrl);
|
||||
|
||||
#else
|
||||
|
||||
/**
|
||||
* mhi_report_error - Can be used by controller to signal error condition to the
|
||||
* MHI core driver in case of any need to halt processing or incoming sideband
|
||||
* signal detects an error on endpoint
|
||||
* @mhi_cntrl: MHI controller
|
||||
*
|
||||
* Returns:
|
||||
* 0 if success in reporting the error condition to MHI core
|
||||
* error code on failure
|
||||
*/
|
||||
static inline int mhi_report_error(struct mhi_controller *mhi_cntrl)
|
||||
{
|
||||
return -EPERM;
|
||||
}
|
||||
|
||||
/**
|
||||
* mhi_controller_set_privdata - Set private data for MHI controller
|
||||
* @mhi_cntrl: MHI controller
|
||||
* @priv: pointer to data
|
||||
*/
|
||||
void mhi_controller_set_privdata(struct mhi_controller *mhi_cntrl, void *priv)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* mhi_controller_get_privdata - Get private data from MHI controller
|
||||
* @mhi_cntrl: MHI controller
|
||||
*/
|
||||
void *mhi_controller_get_privdata(struct mhi_controller *mhi_cntrl)
|
||||
{
|
||||
return ERR_PTR(-EINVAL);
|
||||
}
|
||||
|
||||
/**
|
||||
* mhi_bdf_to_controller - Get controller associated with given BDF values
|
||||
* @domain: Domain or root complex of PCIe port
|
||||
* @bus: Bus number
|
||||
* @slot: PCI slot or function number
|
||||
* @dev_id: Device ID of the endpoint
|
||||
*
|
||||
* Returns:
|
||||
* MHI controller structure pointer if BDF match is found
|
||||
* NULL if cookie is not found
|
||||
*/
|
||||
struct mhi_controller *mhi_bdf_to_controller(u32 domain, u32 bus, u32 slot, u32 dev_id)
|
||||
{
|
||||
return ERR_PTR(-EINVAL);
|
||||
}
|
||||
|
||||
/**
|
||||
* mhi_set_m2_timeout_ms - Set M2 timeout in milliseconds to wait before a
|
||||
* fast/silent suspend
|
||||
* @mhi_cntrl: MHI controller
|
||||
* @timeout: timeout in ms
|
||||
*/
|
||||
void mhi_set_m2_timeout_ms(struct mhi_controller *mhi_cntrl, u32 timeout)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* mhi_pm_fast_resume - Resume MHI from a fast/silent suspended state
|
||||
* @mhi_cntrl: MHI controller
|
||||
* @notify_clients: if true, clients will be notified of the resume transition
|
||||
*/
|
||||
int mhi_pm_fast_resume(struct mhi_controller *mhi_cntrl, bool notify_clients)
|
||||
{
|
||||
return -EPERM;
|
||||
}
|
||||
|
||||
/**
|
||||
* mhi_pm_fast_suspend - Move MHI into a fast/silent suspended state
|
||||
* @mhi_cntrl: MHI controller
|
||||
* @notify_clients: if true, clients will be notified of the suspend transition
|
||||
*/
|
||||
int mhi_pm_fast_suspend(struct mhi_controller *mhi_cntrl, bool notify_clients)
|
||||
{
|
||||
return -EPERM;
|
||||
}
|
||||
|
||||
/**
|
||||
* mhi_debug_reg_dump - dump MHI registers for debug purpose
|
||||
* @mhi_cntrl: MHI controller
|
||||
*/
|
||||
void mhi_debug_reg_dump(struct mhi_controller *mhi_cntrl)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* mhi_dump_sfr - Print SFR string from RDDM table.
|
||||
* @mhi_cntrl: MHI controller
|
||||
*/
|
||||
void mhi_dump_sfr(struct mhi_controller *mhi_cntrl)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* mhi_device_configure - Allow devices with offload channels to setup their own
|
||||
* channel and event ring context.
|
||||
* @mhi_dev: MHI device
|
||||
* @dir: direction associated with the channel needed to configure
|
||||
* @cfg_tbl: Buffer with ECA/CCA information and data needed to setup context
|
||||
* @elements: Number of items to iterate over from the configuration table
|
||||
*/
|
||||
int mhi_device_configure(struct mhi_device *mhi_dev,
|
||||
enum dma_data_direction dir,
|
||||
struct mhi_buf *cfg_tbl,
|
||||
int elements)
|
||||
{
|
||||
return -EPERM;
|
||||
}
|
||||
|
||||
/**
|
||||
* mhi_scan_rddm_cookie - Look for supplied cookie value in the BHI debug
|
||||
* registers set by device to indicate rddm readiness for debugging purposes.
|
||||
* @mhi_cntrl: MHI controller
|
||||
* @cookie: cookie/pattern value to match
|
||||
*
|
||||
* Returns:
|
||||
* true if cookie is found
|
||||
* false if cookie is not found
|
||||
*/
|
||||
bool mhi_scan_rddm_cookie(struct mhi_controller *mhi_cntrl, u32 cookie)
|
||||
{
|
||||
return false;
|
||||
}
|
||||
|
||||
/**
|
||||
* mhi_device_get_sync_atomic - Asserts device_wait and moves device to M0
|
||||
* @mhi_dev: Device associated with the channels
|
||||
* @timeout_us: timeout, in micro-seconds
|
||||
* @in_panic: If requested while kernel is in panic state and no ISRs expected
|
||||
*
|
||||
* The device_wake is asserted to keep device in M0 or bring it to M0.
|
||||
* If device is not in M0 state, then this function will wait for device to
|
||||
* move to M0, until @timeout_us elapses.
|
||||
* However, if device's M1 state-change event races with this function
|
||||
* then there is a possiblity of device moving from M0 to M2 and back
|
||||
* to M0. That can't be avoided as host must transition device from M1 to M2
|
||||
* as per the spec.
|
||||
* Clients can ignore that transition after this function returns as the device
|
||||
* is expected to immediately move from M2 to M0 as wake is asserted and
|
||||
* wouldn't enter low power state.
|
||||
* If in_panic boolean is set, no ISRs are expected, hence this API will have to
|
||||
* resort to reading the MHI status register and poll on M0 state change.
|
||||
*
|
||||
* Returns:
|
||||
* 0 if operation was successful (however, M0 -> M2 -> M0 is possible later) as
|
||||
* mentioned above.
|
||||
* -ETIMEDOUT is device faled to move to M0 before @timeout_us elapsed
|
||||
* -EIO if the MHI state is one of the ERROR states.
|
||||
*/
|
||||
int mhi_device_get_sync_atomic(struct mhi_device *mhi_dev, int timeout_us,
|
||||
bool in_panic)
|
||||
{
|
||||
return -EPERM;
|
||||
}
|
||||
|
||||
/**
|
||||
* mhi_controller_set_bw_scale_cb - Set the BW scale callback for MHI controller
|
||||
* @mhi_cntrl: MHI controller
|
||||
* @cb_func: Callback to set for the MHI controller to receive BW scale requests
|
||||
*/
|
||||
void mhi_controller_set_bw_scale_cb(struct mhi_controller *mhi_cntrl,
|
||||
int (*cb_func)(struct mhi_controller *mhi_cntrl,
|
||||
struct mhi_link_info *link_info))
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* mhi_controller_set_base - Set the controller base / resource start address
|
||||
* @mhi_cntrl: MHI controller
|
||||
* @base: Physical address to be set for future reference
|
||||
*/
|
||||
void mhi_controller_set_base(struct mhi_controller *mhi_cntrl,
|
||||
phys_addr_t base)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* mhi_controller_get_base - Get the controller base / resource start address
|
||||
* @mhi_cntrl: MHI controller
|
||||
* @base: Pointer to physical address to be populated
|
||||
*/
|
||||
int mhi_controller_get_base(struct mhi_controller *mhi_cntrl,
|
||||
phys_addr_t *base)
|
||||
{
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/**
|
||||
* mhi_controller_get_numeric_id - set numeric ID for controller
|
||||
* @mhi_cntrl: MHI controller
|
||||
* returns value set as ID or 0 if no value was set
|
||||
*/
|
||||
u32 mhi_controller_get_numeric_id(struct mhi_controller *mhi_cntrl)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* mhi_get_channel_db_base - retrieve the channel doorbell base address
|
||||
* @mhi_dev: Device associated with the channels
|
||||
* @value: Pointer to an address value which will be populated
|
||||
*/
|
||||
int mhi_get_channel_db_base(struct mhi_device *mhi_dev, phys_addr_t *value)
|
||||
{
|
||||
return -EPERM;
|
||||
}
|
||||
|
||||
/**
|
||||
* mhi_get_event_ring_db_base - retrieve the event ring doorbell base address
|
||||
* @mhi_dev: Device associated with the channels
|
||||
* @value: Pointer to an address value which will be populated
|
||||
*/
|
||||
int mhi_get_event_ring_db_base(struct mhi_device *mhi_dev, phys_addr_t *value)
|
||||
{
|
||||
return -EPERM;
|
||||
}
|
||||
|
||||
/**
|
||||
* mhi_get_device_for_channel - get the MHI device for a specific channel number
|
||||
* @mhi_cntrl: MHI controller
|
||||
* @channel - channel number
|
||||
*
|
||||
* Returns:
|
||||
* Pointer to the MHI device associated with the channel
|
||||
*/
|
||||
struct mhi_device *mhi_get_device_for_channel(struct mhi_controller *mhi_cntrl,
|
||||
u32 channel)
|
||||
{
|
||||
return ERR_PTR(-EINVAL);
|
||||
}
|
||||
|
||||
/**
|
||||
* mhi_device_ioctl - user space IOCTL support for MHI channels
|
||||
* Native support for setting TIOCM
|
||||
* @mhi_dev: Device associated with the channels
|
||||
* @cmd: IOCTL cmd
|
||||
* @arg: Optional parameter, iotcl cmd specific
|
||||
*/
|
||||
long mhi_device_ioctl(struct mhi_device *mhi_dev, unsigned int cmd,
|
||||
unsigned long arg)
|
||||
{
|
||||
return -EPERM;
|
||||
}
|
||||
|
||||
/**
|
||||
* mhi_controller_set_sfr_support - Set support for subsystem failure reason
|
||||
* @mhi_cntrl: MHI controller
|
||||
*
|
||||
* Returns:
|
||||
* 0 for success, error code for failure
|
||||
*/
|
||||
int mhi_controller_set_sfr_support(struct mhi_controller *mhi_cntrl,
|
||||
size_t len)
|
||||
{
|
||||
return -EPERM;
|
||||
}
|
||||
|
||||
/**
|
||||
* mhi_controller_setup_timesync - Set support for time synchronization feature
|
||||
* @mhi_cntrl: MHI controller
|
||||
* @time_get: Callback to set for the MHI controller to receive host time
|
||||
* @lpm_disable: Callback to set for the MHI controller to disable link LPM
|
||||
* @lpm_enable: Callback to set for the MHI controller to enable link LPM
|
||||
*
|
||||
* Returns:
|
||||
* 0 for success, error code for failure
|
||||
*/
|
||||
int mhi_controller_setup_timesync(struct mhi_controller *mhi_cntrl,
|
||||
u64 (*time_get)(struct mhi_controller *c),
|
||||
int (*lpm_disable)(struct mhi_controller *c),
|
||||
int (*lpm_enable)(struct mhi_controller *c))
|
||||
{
|
||||
return -EPERM;
|
||||
}
|
||||
|
||||
/**
|
||||
* mhi_get_remote_time_sync - Get external soc time relative to local soc time
|
||||
* using MMIO method.
|
||||
* @mhi_dev: Device associated with the channels
|
||||
* @t_host: Pointer to output local soc time
|
||||
* @t_dev: Pointer to output remote soc time
|
||||
*
|
||||
* Returns:
|
||||
* 0 for success, error code for failure
|
||||
*/
|
||||
int mhi_get_remote_time_sync(struct mhi_device *mhi_dev,
|
||||
u64 *t_host,
|
||||
u64 *t_dev)
|
||||
{
|
||||
return -EPERM;
|
||||
}
|
||||
|
||||
/**
|
||||
* mhi_get_remote_time - Get external modem time relative to host time
|
||||
* Trigger event to capture modem time, also capture host time so client
|
||||
* can do a relative drift comparision.
|
||||
* Recommended only tsync device calls this method and do not call this
|
||||
* from atomic context
|
||||
* @mhi_dev: Device associated with the channels
|
||||
* @sequence:unique sequence id track event
|
||||
* @cb_func: callback function to call back
|
||||
*
|
||||
* Returns:
|
||||
* 0 for success, error code for failure
|
||||
*/
|
||||
int mhi_get_remote_time(struct mhi_device *mhi_dev,
|
||||
u32 sequence,
|
||||
void (*cb_func)(struct mhi_device *mhi_dev,
|
||||
u32 sequence,
|
||||
u64 local_time,
|
||||
u64 remote_time))
|
||||
{
|
||||
return -EPERM;
|
||||
}
|
||||
|
||||
/**
|
||||
* mhi_force_reset - does host reset request to collect device side dumps
|
||||
* for debugging purpose
|
||||
* @mhi_cntrl: MHI controller
|
||||
*/
|
||||
int mhi_force_reset(struct mhi_controller *mhi_cntrl)
|
||||
{
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/**
|
||||
* mhi_controller_set_loglevel - API for controller to set a desired log level
|
||||
* which will be set to VERBOSE or 0 by default
|
||||
* @mhi_cntrl: MHI controller
|
||||
* @lvl: Log level from MHI_DEBUG_LEVEL enumerator
|
||||
*/
|
||||
void mhi_controller_set_loglevel(struct mhi_controller *mhi_cntrl,
|
||||
enum MHI_DEBUG_LEVEL lvl)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* mhi_get_soc_info - Get SoC info before registering mhi controller
|
||||
* @mhi_cntrl: MHI controller
|
||||
*/
|
||||
int mhi_get_soc_info(struct mhi_controller *mhi_cntrl)
|
||||
{
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_MHI_BUS_MISC */
|
||||
|
||||
#endif /* _MHI_MISC_H_ */
|
||||
Loading…
Reference in New Issue
Block a user