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ARM: dts: qcom: msm8226: Add pinctrl for sdhci nodes

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Also remove the pinctrl from qcom-apq8026-lg-lenok as it is the same
value as the generic pinctrl.

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220216212433.1373903-4-luca@z3ntu.xyz
This commit is contained in:
Luca Weiss 2022-02-16 22:24:30 +01:00 committed by Bjorn Andersson
parent c8a8f75517
commit a5683471b6
2 changed files with 57 additions and 17 deletions
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17
arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts
View File

@ -204,9 +204,6 @@ &sdhc_1 {
bus-width = <8>;
non-removable;
pinctrl-names = "default";
pinctrl-0 = <&sdhc1_pin_a>;
};
&smbb {
@ -219,20 +216,6 @@ &smbb {
};
&tlmm {
sdhc1_pin_a: sdhc1-pin-active {
clk {
pins = "sdc1_clk";
drive-strength = <10>;
bias-disable;
};
cmd-data {
pins = "sdc1_cmd", "sdc1_data";
drive-strength = <10>;
bias-pull-up;
};
};
touch_pins: touch {
irq {
pins = "gpio17";

57
arch/arm/boot/dts/qcom-msm8226.dtsi
View File

@ -116,6 +116,8 @@ sdhc_1: sdhci@f9824900 {
<&gcc GCC_SDCC1_AHB_CLK>,
<&xo_board>;
clock-names = "core", "iface", "xo";
pinctrl-names = "default";
pinctrl-0 = <&sdhc1_default_state>;
status = "disabled";
};
@ -130,6 +132,8 @@ sdhc_2: sdhci@f98a4900 {
<&gcc GCC_SDCC2_AHB_CLK>,
<&xo_board>;
clock-names = "core", "iface", "xo";
pinctrl-names = "default";
pinctrl-0 = <&sdhc2_default_state>;
status = "disabled";
};
@ -144,6 +148,8 @@ sdhc_3: sdhci@f9864900 {
<&gcc GCC_SDCC3_AHB_CLK>,
<&xo_board>;
clock-names = "core", "iface", "xo";
pinctrl-names = "default";
pinctrl-0 = <&sdhc3_default_state>;
status = "disabled";
};
@ -320,6 +326,57 @@ blsp1_i2c5_pins: blsp1-i2c5 {
drive-strength = <2>;
bias-disable;
};
sdhc1_default_state: sdhc1-default-state {
clk {
pins = "sdc1_clk";
drive-strength = <10>;
bias-disable;
};
cmd-data {
pins = "sdc1_cmd", "sdc1_data";
drive-strength = <10>;
bias-pull-up;
};
};
sdhc2_default_state: sdhc2-default-state {
clk {
pins = "sdc2_clk";
drive-strength = <10>;
bias-disable;
};
cmd-data {
pins = "sdc2_cmd", "sdc2_data";
drive-strength = <10>;
bias-pull-up;
};
};
sdhc3_default_state: sdhc3-default-state {
clk {
pins = "gpio44";
function = "sdc3";
drive-strength = <8>;
bias-disable;
};
cmd {
pins = "gpio43";
function = "sdc3";
drive-strength = <8>;
bias-pull-up;
};
data {
pins = "gpio39", "gpio40", "gpio41", "gpio42";
function = "sdc3";
drive-strength = <8>;
bias-pull-up;
};
};
};
restart@fc4ab000 {