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media: i2c: imx214: Prepare for variable clock frequency

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Move clock frequency related parameters out of the constant register
sequences, such that the hard coded external clock frequency can be
replaced by a variable in the upcoming patches.

Acked-by: Ricardo Ribalda <ribalda@chromium.org>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: André Apitzsch <git@apitzsch.eu>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
This commit is contained in:
André Apitzsch 2025-05-24 11:14:37 +02:00 committed by Hans Verkuil
parent 4743c1fad0
commit a55a5e616b
1 changed files with 31 additions and 23 deletions
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54
drivers/media/i2c/imx214.c
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@ -299,16 +299,6 @@ static const struct cci_reg_sequence mode_4096x2304[] = {
{ IMX214_REG_DIG_CROP_WIDTH, 4096 },
{ IMX214_REG_DIG_CROP_HEIGHT, 2304 },
{ IMX214_REG_VTPXCK_DIV, 5 },
{ IMX214_REG_VTSYCK_DIV, 2 },
{ IMX214_REG_PREPLLCK_VT_DIV, 3 },
{ IMX214_REG_PLL_VT_MPY, 150 },
{ IMX214_REG_OPPXCK_DIV, 10 },
{ IMX214_REG_OPSYCK_DIV, 1 },
{ IMX214_REG_PLL_MULT_DRIV, IMX214_PLL_SINGLE },
{ IMX214_REG_REQ_LINK_BIT_RATE, IMX214_LINK_BIT_RATE_MBPS(4800) },
{ CCI_REG8(0x3A03), 0x09 },
{ CCI_REG8(0x3A04), 0x50 },
{ CCI_REG8(0x3A05), 0x01 },
@ -362,16 +352,6 @@ static const struct cci_reg_sequence mode_1920x1080[] = {
{ IMX214_REG_DIG_CROP_WIDTH, 1920 },
{ IMX214_REG_DIG_CROP_HEIGHT, 1080 },
{ IMX214_REG_VTPXCK_DIV, 5 },
{ IMX214_REG_VTSYCK_DIV, 2 },
{ IMX214_REG_PREPLLCK_VT_DIV, 3 },
{ IMX214_REG_PLL_VT_MPY, 150 },
{ IMX214_REG_OPPXCK_DIV, 10 },
{ IMX214_REG_OPSYCK_DIV, 1 },
{ IMX214_REG_PLL_MULT_DRIV, IMX214_PLL_SINGLE },
{ IMX214_REG_REQ_LINK_BIT_RATE, IMX214_LINK_BIT_RATE_MBPS(4800) },
{ CCI_REG8(0x3A03), 0x04 },
{ CCI_REG8(0x3A04), 0xF8 },
{ CCI_REG8(0x3A05), 0x02 },
@ -405,9 +385,6 @@ static const struct cci_reg_sequence mode_table_common[] = {
/* ATR setting */
{ IMX214_REG_ATR_FAST_MOVE, 2 },
/* external clock setting */
{ IMX214_REG_EXCK_FREQ, IMX214_EXCK_FREQ(IMX214_DEFAULT_CLK_FREQ / 1000000) },
/* global setting */
/* basic config */
{ IMX214_REG_MASK_CORR_FRAMES, IMX214_CORR_FRAMES_MASK },
@ -777,6 +754,24 @@ static int imx214_entity_init_state(struct v4l2_subdev *subdev,
return 0;
}
static int imx214_configure_pll(struct imx214 *imx214)
{
int ret = 0;
cci_write(imx214->regmap, IMX214_REG_VTPXCK_DIV, 5, &ret);
cci_write(imx214->regmap, IMX214_REG_VTSYCK_DIV, 2, &ret);
cci_write(imx214->regmap, IMX214_REG_PREPLLCK_VT_DIV, 3, &ret);
cci_write(imx214->regmap, IMX214_REG_PLL_VT_MPY, 150, &ret);
cci_write(imx214->regmap, IMX214_REG_OPPXCK_DIV, 10, &ret);
cci_write(imx214->regmap, IMX214_REG_OPSYCK_DIV, 1, &ret);
cci_write(imx214->regmap, IMX214_REG_PLL_MULT_DRIV,
IMX214_PLL_SINGLE, &ret);
cci_write(imx214->regmap, IMX214_REG_EXCK_FREQ,
IMX214_EXCK_FREQ(IMX214_DEFAULT_CLK_FREQ / 1000000), &ret);
return ret;
}
static int imx214_update_digital_gain(struct imx214 *imx214, u32 val)
{
int ret = 0;
@ -1020,6 +1015,19 @@ static int imx214_start_streaming(struct imx214 *imx214)
return ret;
}
ret = imx214_configure_pll(imx214);
if (ret) {
dev_err(imx214->dev, "failed to configure PLL: %d\n", ret);
return ret;
}
ret = cci_write(imx214->regmap, IMX214_REG_REQ_LINK_BIT_RATE,
IMX214_LINK_BIT_RATE_MBPS(4800), NULL);
if (ret) {
dev_err(imx214->dev, "failed to configure link bit rate\n");
return ret;
}
ret = cci_write(imx214->regmap, IMX214_REG_CSI_LANE_MODE,
IMX214_CSI_4_LANE_MODE, NULL);
if (ret) {