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wifi: mt76: mt7925: add NAN MCU helpers
Add the mt7925 NAN MCU ABI and helpers for enable, disable, configuration updates, availability updates and peer schedule commands. Upper-layer integration is added by later patches. Co-developed-by: Stella Liu <yu-ching.liu@mediatek.com> Signed-off-by: Stella Liu <yu-ching.liu@mediatek.com> Co-developed-by: Jeremy Yu <chengwei.yu@mediatek.com> Signed-off-by: Jeremy Yu <chengwei.yu@mediatek.com> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Link: https://patch.msgid.link/20260625001834.475094-5-sean.wang@kernel.org Signed-off-by: Felix Fietkau <nbd@nbd.name>
This commit is contained in:
Sean Wang
Felix Fietkau
parent
b7ab9f780d
commit
a5487a6824
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@ -4,7 +4,7 @@ obj-$(CONFIG_MT7925_COMMON) += mt7925-common.o
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obj-$(CONFIG_MT7925E) += mt7925e.o
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obj-$(CONFIG_MT7925U) += mt7925u.o
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mt7925-common-y := mac.o mcu.o regd.o main.o init.o debugfs.o
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mt7925-common-y := mac.o mcu.o regd.o main.o init.o debugfs.o nan.o
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mt7925-common-$(CONFIG_NL80211_TESTMODE) += testmode.o
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mt7925e-y := pci.o pci_mac.o pci_mcu.o
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mt7925u-y := usb.o
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927
drivers/net/wireless/mediatek/mt76/mt7925/nan.c
Normal file
927
drivers/net/wireless/mediatek/mt76/mt7925/nan.c
Normal file
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@ -0,0 +1,927 @@
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// SPDX-License-Identifier: BSD-3-Clause-Clear
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/* Copyright (C) 2025-2026 MediaTek Inc. */
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#include <asm/byteorder.h>
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#include <linux/bitfield.h>
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#include <linux/errno.h>
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#include <linux/kernel.h>
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#include <linux/stddef.h>
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#include <linux/string.h>
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#include <linux/types.h>
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#include <linux/ieee80211.h>
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#include <net/cfg80211.h>
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#include <net/mac80211.h>
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#include "mt7925.h"
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#include "mcu.h"
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#include "nan.h"
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#include "regd.h"
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static void mt7925_nan_set_5g_channel(struct mt792x_dev *dev,
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struct mt7925_nan_enable_req_tlv *req,
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struct cfg80211_nan_conf *conf)
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{
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struct ieee80211_channel *chan;
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u32 ch5g = 0;
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chan = conf->band_cfgs[NL80211_BAND_5GHZ].chan;
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if (!chan)
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return;
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if (!mt7925_regd_is_valid_channel(dev, NL80211_BAND_5GHZ, chan))
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return;
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req->config_5g_channel = 1;
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if (chan->hw_value == NAN_5G_LOW_DISC_CHANNEL)
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ch5g |= BIT(0);
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else if (chan->hw_value == NAN_5G_HIGH_DISC_CHANNEL)
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ch5g |= BIT(1);
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req->channel_5g_val = cpu_to_le32(ch5g);
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}
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static void mt7925_nan_set_cluster_id(struct mt7925_nan_enable_req_tlv *req,
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const u8 *cluster_id)
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{
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if (!cluster_id)
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return;
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req->cluster_high = cpu_to_le16(cluster_id[4] | cluster_id[5] << 8);
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req->cluster_low = cpu_to_le16((u16)cluster_id[3]);
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}
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static void mt7925_nan_set_dw_interval(struct mt7925_nan_enable_req_tlv *req,
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struct cfg80211_nan_conf *conf)
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{
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if (conf->band_cfgs[NL80211_BAND_2GHZ].awake_dw_interval > 0) {
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req->config_dw.config_2dot4g_dw_band = 1;
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req->config_dw.dw_2dot4g_interval_val =
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cpu_to_le32(conf->band_cfgs[NL80211_BAND_2GHZ].awake_dw_interval);
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}
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if (conf->band_cfgs[NL80211_BAND_5GHZ].awake_dw_interval > 0) {
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req->config_dw.config_5g_dw_band = 1;
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req->config_dw.dw_5g_interval_val =
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cpu_to_le32(conf->band_cfgs[NL80211_BAND_5GHZ].awake_dw_interval);
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}
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}
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static void mt7925_nan_set_disc_beacon(struct mt7925_nan_enable_req_tlv *req,
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struct cfg80211_nan_conf *conf)
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{
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if (conf->discovery_beacon_interval > 0) {
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req->config_2dot4g_beacons = true;
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req->beacon_2dot4g_val = conf->discovery_beacon_interval;
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}
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}
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static void mt7925_nan_set_rssi_thresholds(struct mt7925_nan_enable_req_tlv *req,
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struct cfg80211_nan_conf *conf)
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{
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if (conf->band_cfgs[NL80211_BAND_2GHZ].chan) {
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req->config_2dot4g_rssi_close = 1;
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req->rssi_close_2dot4g_val =
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abs(conf->band_cfgs[NL80211_BAND_2GHZ].rssi_close);
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req->config_2dot4g_rssi_middle = 1;
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req->rssi_middle_2dot4g_val =
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abs(conf->band_cfgs[NL80211_BAND_2GHZ].rssi_middle);
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}
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if (conf->band_cfgs[NL80211_BAND_5GHZ].chan) {
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req->config_5g_rssi_close = 1;
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req->rssi_close_5g_val =
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abs(conf->band_cfgs[NL80211_BAND_5GHZ].rssi_close);
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req->config_5g_rssi_middle = 1;
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req->rssi_middle_5g_val =
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abs(conf->band_cfgs[NL80211_BAND_5GHZ].rssi_middle);
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}
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}
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static void mt7925_nan_set_scan_params(struct mt7925_nan_enable_req_tlv *req,
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struct cfg80211_nan_conf *conf)
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{
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req->scan_params_val.scan_period[0] =
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cpu_to_le16(conf->scan_period < 255 ? conf->scan_period : 255);
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req->scan_params_val.dwell_time[0] =
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conf->scan_dwell_time < 255 ? conf->scan_dwell_time : 255;
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}
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static u16
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mt7925_nan_avail_attr_ctrl(const struct ieee80211_nan_sched_cfg *sched)
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{
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if (sched->avail_blob_len < NAN_AVAIL_ATTR_CTRL_OFFSET + 2)
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return 0;
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return sched->avail_blob[NAN_AVAIL_ATTR_CTRL_OFFSET] |
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sched->avail_blob[NAN_AVAIL_ATTR_CTRL_OFFSET + 1] << 8;
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}
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static void
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mt7925_nan_update_conf(struct mt792x_vif *mvif,
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const struct cfg80211_nan_conf *conf)
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{
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mvif->nan.conf.master_pref = conf->master_pref;
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mvif->nan.conf.bands = conf->bands;
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mvif->nan.conf.discovery_beacon_interval =
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conf->discovery_beacon_interval;
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mvif->nan.conf.enable_dw_notification =
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conf->enable_dw_notification;
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memcpy(mvif->nan.conf.cluster_id, conf->cluster_id, ETH_ALEN);
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}
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int mt7925_nan_enable(struct ieee80211_vif *vif,
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struct mt792x_dev *dev,
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struct cfg80211_nan_conf *conf)
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{
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struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv;
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struct mt76_dev *mdev = &dev->mt76;
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struct {
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u8 rsv[4];
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struct mt7925_nan_enable_req_tlv nan_req_tlv;
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} nan_cmd = {
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.rsv = { 0 },
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.nan_req_tlv = {
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.tag = cpu_to_le16(NAN_UNI_CMD_ENABLE_REQUEST),
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.len = cpu_to_le16(sizeof(struct mt7925_nan_enable_req_tlv)),
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.config_random_factor_force = 0,
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.random_factor_force_val = 0,
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.config_hop_count_force = 0,
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.hop_count_force_val = 0,
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},
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};
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struct mt7925_nan_enable_req_tlv *p_nan_req_tlv = &nan_cmd.nan_req_tlv;
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if (!vif || !dev || !conf)
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return -EINVAL;
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p_nan_req_tlv->master_pref = conf->master_pref;
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mt7925_nan_set_5g_channel(dev, p_nan_req_tlv, conf);
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mt7925_nan_set_cluster_id(p_nan_req_tlv, conf->cluster_id);
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mt7925_nan_set_dw_interval(p_nan_req_tlv, conf);
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mt7925_nan_set_disc_beacon(p_nan_req_tlv, conf);
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mt7925_nan_set_rssi_thresholds(p_nan_req_tlv, conf);
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mt7925_nan_set_scan_params(p_nan_req_tlv, conf);
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mt7925_nan_update_conf(mvif, conf);
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return mt76_mcu_send_msg(mdev, MCU_UNI_CMD(NAN), &nan_cmd, sizeof(nan_cmd), true);
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}
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int mt7925_nan_disable(struct ieee80211_vif *vif, struct mt792x_dev *dev)
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{
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struct mt76_dev *mdev = &dev->mt76;
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struct {
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u8 rsv[4];
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struct tlv nan_dis_tlv;
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} nan_cmd = {
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.rsv = { 0 },
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.nan_dis_tlv = {
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.tag = cpu_to_le16(NAN_UNI_CMD_DISABLE_REQUEST),
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.len = cpu_to_le16(sizeof(struct tlv)),
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},
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};
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if (!dev)
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return -EINVAL;
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return mt76_mcu_send_msg(mdev, MCU_UNI_CMD(NAN), &nan_cmd, sizeof(nan_cmd), true);
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}
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static int
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mt7925_nan_mp_tlv(struct sk_buff *skb, u8 master_pref)
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{
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struct mt7925_nan_master_preference_tlv *mp_tlv = NULL;
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struct tlv *tlv = NULL;
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if (!skb)
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return -EINVAL;
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tlv = mt76_connac_mcu_add_tlv(skb, NAN_UNI_CMD_SET_MASTER_PREFERENCE,
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sizeof(struct mt7925_nan_master_preference_tlv));
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if (!tlv)
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return -ENOMEM;
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mp_tlv = (struct mt7925_nan_master_preference_tlv *)tlv;
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if (master_pref > NAN_MAX_MASTER_PREFERENCE)
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return 0;
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mp_tlv->master_preference = master_pref;
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return 0;
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}
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static int
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mt7925_nan_dw_tlv(struct sk_buff *skb, struct cfg80211_nan_conf *conf)
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{
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struct mt7925_nan_dw_interval_tlv *dw_tlv = NULL;
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struct tlv *tlv = NULL;
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u16 interval;
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if (!skb || !conf)
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return -EINVAL;
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tlv = mt76_connac_mcu_add_tlv(skb, NAN_UNI_CMD_SET_DW_INTERVAL,
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sizeof(struct mt7925_nan_dw_interval_tlv));
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if (!tlv)
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return -ENOMEM;
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dw_tlv = (struct mt7925_nan_dw_interval_tlv *)tlv;
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/* Set DW interval for 2.4GHz and 5GHz bands if available */
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if (conf->band_cfgs[NL80211_BAND_2GHZ].awake_dw_interval > 0) {
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dw_tlv->dw_interval = conf->band_cfgs[NL80211_BAND_2GHZ].awake_dw_interval;
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} else if (conf->band_cfgs[NL80211_BAND_5GHZ].awake_dw_interval > 0) {
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dw_tlv->dw_interval = conf->band_cfgs[NL80211_BAND_5GHZ].awake_dw_interval;
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} else {
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/* Fallback to a default value or log a warning */
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dw_tlv->dw_interval = NAN_DEFAULT_DW_INTERVAL;
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}
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/* Validate and set NAN Discovery Beacon Interval */
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interval = conf->discovery_beacon_interval > 0 ?
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conf->discovery_beacon_interval :
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NAN_DEFAULT_DISC_BCN_INTERVAL;
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dw_tlv->disc_bcn_interval = cpu_to_le16(interval);
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return 0;
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}
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static int
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mt7925_nan_cluster_id_tlv(struct sk_buff *skb, const u8 *cluster_id)
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{
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struct mt7925_nan_cluster_id_tlv *cluster_tlv = NULL;
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struct tlv *tlv = NULL;
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if (!skb || !cluster_id)
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return -EINVAL;
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tlv = mt76_connac_mcu_add_tlv(skb, NAN_UNI_CMD_SET_CLUSTER_ID,
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sizeof(struct mt7925_nan_cluster_id_tlv));
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if (!tlv)
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return -ENOMEM;
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cluster_tlv = (struct mt7925_nan_cluster_id_tlv *)tlv;
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memcpy(cluster_tlv->cluster_id, cluster_id, ETH_ALEN);
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return 0;
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}
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static int
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mt7925_nan_sync_rssi_tlv(struct sk_buff *skb, struct cfg80211_nan_conf *conf)
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{
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struct mt7925_nan_sync_rssi_tlv *rssi_tlv = NULL;
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struct tlv *tlv = NULL;
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if (!skb || !conf)
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return -EINVAL;
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tlv = mt76_connac_mcu_add_tlv(skb, NAN_UNI_CMD_SET_SYNC_RSSI,
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sizeof(struct mt7925_nan_sync_rssi_tlv));
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if (!tlv)
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return -ENOMEM;
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rssi_tlv = (struct mt7925_nan_sync_rssi_tlv *)tlv;
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if (conf->band_cfgs[NL80211_BAND_2GHZ].chan) {
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rssi_tlv->rssi_close_2g =
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conf->band_cfgs[NL80211_BAND_2GHZ].rssi_close;
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rssi_tlv->rssi_middle_2g =
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conf->band_cfgs[NL80211_BAND_2GHZ].rssi_middle;
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}
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if (conf->band_cfgs[NL80211_BAND_5GHZ].chan) {
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rssi_tlv->rssi_close_5g =
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conf->band_cfgs[NL80211_BAND_5GHZ].rssi_close;
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rssi_tlv->rssi_middle_5g =
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conf->band_cfgs[NL80211_BAND_5GHZ].rssi_middle;
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}
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return 0;
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}
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int mt7925_nan_change_configure(struct ieee80211_vif *vif,
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struct mt792x_dev *dev,
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struct cfg80211_nan_conf *conf)
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{
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struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv;
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struct mt7925_nan_common_hdr *hdr = NULL;
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struct mt76_dev *mdev = &dev->mt76;
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struct sk_buff *skb = NULL;
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if (!vif || !dev || !conf)
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return -EINVAL;
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skb = mt76_mcu_msg_alloc(mdev, NULL, MT7925_NAN_CONF_MAX_SIZE);
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if (!skb)
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return -ENOMEM;
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hdr = (struct mt7925_nan_common_hdr *)skb_put(skb, sizeof(*hdr));
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memset(hdr, 0, sizeof(*hdr));
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if (mt7925_nan_mp_tlv(skb, conf->master_pref) ||
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mt7925_nan_dw_tlv(skb, conf) ||
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mt7925_nan_cluster_id_tlv(skb, conf->cluster_id) ||
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mt7925_nan_sync_rssi_tlv(skb, conf)) {
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dev_kfree_skb(skb);
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return -ENOMEM;
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}
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mt7925_nan_update_conf(mvif, conf);
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return mt76_mcu_skb_send_msg(mdev, skb,
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MCU_UNI_CMD(NAN), true);
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}
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static void
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mt7925_nan_handle_dw_ind(struct mt792x_dev *dev, struct tlv *tlv)
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{
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struct ieee80211_channel *chan;
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struct nan_rpt_dw_evt *evt;
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struct wireless_dev *wdev;
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u16 len, channel, dw_num;
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struct mt792x_vif *mvif;
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enum nl80211_band band;
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int freq;
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if (!dev || !tlv)
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return;
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len = le16_to_cpu(tlv->len);
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if (len < sizeof(*tlv) + sizeof(*evt)) {
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dev_warn(dev->mt76.dev,
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"nan: short dw event tlv len=%u\n", len);
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return;
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}
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if (!dev->nan_vif || !ieee80211_vif_nan_started(dev->nan_vif))
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return;
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wdev = ieee80211_vif_to_wdev(dev->nan_vif);
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if (!wdev)
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return;
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mvif = (struct mt792x_vif *)dev->nan_vif->drv_priv;
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if (!mvif->nan.conf.enable_dw_notification)
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return;
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evt = (struct nan_rpt_dw_evt *)tlv->data;
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channel = le16_to_cpu(evt->channel);
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dw_num = le16_to_cpu(evt->dw_num);
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band = channel > 13 ? NL80211_BAND_5GHZ : NL80211_BAND_2GHZ;
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freq = ieee80211_channel_to_frequency(channel, band);
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chan = ieee80211_get_channel(dev->mt76.hw->wiphy, freq);
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if (!chan) {
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dev_dbg(dev->mt76.dev,
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"nan: no channel for dw end event ch=%u dw=%u\n",
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channel, dw_num);
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return;
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}
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cfg80211_next_nan_dw_notif(wdev, chan, GFP_KERNEL);
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}
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static void
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mt7925_nan_mcu_handle_de_event(struct mt792x_dev *dev, struct tlv *tlv)
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{
|
||||
u8 cluster_id[ETH_ALEN] __aligned(2) = {0x50, 0x6f, 0x9a, 0x01, 0x00, 0x00};
|
||||
struct mt7925_nan_de_event *de_evt = NULL;
|
||||
u16 len;
|
||||
|
||||
if (!dev || !tlv) {
|
||||
if (dev)
|
||||
dev_warn(dev->mt76.dev, "nan: failed to parse TLV\n");
|
||||
return;
|
||||
}
|
||||
|
||||
len = le16_to_cpu(tlv->len);
|
||||
if (len < sizeof(*tlv) + sizeof(*de_evt)) {
|
||||
dev_warn(dev->mt76.dev,
|
||||
"nan: short de_event tlv len=%u\n", len);
|
||||
return;
|
||||
}
|
||||
|
||||
de_evt = (struct mt7925_nan_de_event *)tlv->data;
|
||||
if (!de_evt) {
|
||||
dev_warn(dev->mt76.dev, "nan: missing DE event payload\n");
|
||||
return;
|
||||
}
|
||||
|
||||
if (de_evt->event_type == NAN_EVENT_ID_DISC_MAC_ADDR)
|
||||
return;
|
||||
|
||||
memcpy(cluster_id, de_evt->cluster_id, ETH_ALEN);
|
||||
|
||||
dev_dbg(dev->mt76.dev, "nan: evt=%u cluster=%pM\n",
|
||||
de_evt->event_type, de_evt->cluster_id);
|
||||
|
||||
if (de_evt->event_type != NAN_EVENT_ID_JOINED_CLUSTER)
|
||||
return;
|
||||
|
||||
if (!ieee80211_vif_nan_started(dev->nan_vif)) {
|
||||
dev_warn(dev->mt76.dev, "nan: joined-cluster event but NAN not started\n");
|
||||
return;
|
||||
}
|
||||
|
||||
dev_dbg(dev->mt76.dev, "nan: anchor_master_rank=%*phN\n",
|
||||
NAN_ANCHOR_MASTER_RANK_NUM, de_evt->anchor_master_rank);
|
||||
|
||||
dev_dbg(dev->mt76.dev, "nan: own_nmi=%pM master_nmi=%pM\n",
|
||||
de_evt->own_nmi, de_evt->master_nmi);
|
||||
|
||||
ieee80211_nan_cluster_joined(dev->nan_vif, cluster_id, true, GFP_KERNEL);
|
||||
}
|
||||
|
||||
void mt7925_nan_mcu_event(struct mt792x_dev *dev, struct sk_buff *skb)
|
||||
{
|
||||
struct tlv *tlv;
|
||||
u32 tlv_len;
|
||||
|
||||
if (!dev || !skb)
|
||||
return;
|
||||
|
||||
if (skb->len < sizeof(struct mt7925_mcu_rxd) + 4)
|
||||
return;
|
||||
|
||||
skb_pull(skb, sizeof(struct mt7925_mcu_rxd) + 4);
|
||||
tlv = (struct tlv *)skb->data;
|
||||
tlv_len = skb->len;
|
||||
|
||||
while (tlv_len >= sizeof(*tlv)) {
|
||||
u16 len = le16_to_cpu(tlv->len);
|
||||
|
||||
if (len < sizeof(*tlv) || len > tlv_len)
|
||||
break;
|
||||
|
||||
switch (le16_to_cpu(tlv->tag)) {
|
||||
case NAN_UNI_EVENT_ID_DE_EVENT_IND:
|
||||
mt7925_nan_mcu_handle_de_event(dev, tlv);
|
||||
break;
|
||||
case NAN_UNI_EVENT_REPORT_DW_END:
|
||||
mt7925_nan_handle_dw_ind(dev, tlv);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
tlv_len -= len;
|
||||
tlv = (struct tlv *)((u8 *)tlv + len);
|
||||
}
|
||||
}
|
||||
|
||||
static int mt7925_nan_avail_ctrl_tlv(struct sk_buff *skb,
|
||||
struct ieee80211_vif *vif)
|
||||
{
|
||||
struct mt7925_nan_avail_ctrl_tlv *avail_ctrl_tlv;
|
||||
struct ieee80211_nan_sched_cfg *sched;
|
||||
struct tlv *tlv;
|
||||
u8 seq_id = 0;
|
||||
u16 ctrl = 0;
|
||||
|
||||
if (!skb || !vif)
|
||||
return -EINVAL;
|
||||
|
||||
tlv = mt76_connac_mcu_add_tlv(skb, NAN_UNI_CMD_UPDATE_AVAILABILITY_CTRL,
|
||||
sizeof(struct mt7925_nan_avail_ctrl_tlv));
|
||||
|
||||
if (!tlv)
|
||||
return -ENOMEM;
|
||||
|
||||
sched = &vif->cfg.nan_sched;
|
||||
|
||||
ctrl = mt7925_nan_avail_attr_ctrl(sched);
|
||||
if (sched->avail_blob_len >= NAN_AVAIL_ATTR_CTRL_OFFSET + 2)
|
||||
seq_id = sched->avail_blob[NAN_AVAIL_SEQ_ID_OFFSET];
|
||||
|
||||
avail_ctrl_tlv = (struct mt7925_nan_avail_ctrl_tlv *)tlv;
|
||||
avail_ctrl_tlv->avail_ctrl =
|
||||
cpu_to_le16(ctrl & NAN_AVAIL_CTRL_CHECK_FOR_CHANGED);
|
||||
avail_ctrl_tlv->seq_id = seq_id;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static u32 mt7925_nan_slot_to_bitmap(struct ieee80211_vif *vif,
|
||||
struct mt7925_nan_ch_timeline *ch_list)
|
||||
{
|
||||
struct ieee80211_nan_channel **slots = vif->cfg.nan_sched.schedule;
|
||||
struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv;
|
||||
u32 num_channels = 0;
|
||||
u32 i, j;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(mvif->nan.local_sched); i++) {
|
||||
struct cfg80211_chan_def *slot_chan = &mvif->nan.local_sched[i];
|
||||
struct ieee80211_nan_channel *slot = slots[i];
|
||||
bool is_found = false;
|
||||
|
||||
if (slot && !IS_ERR(slot) && slot->chanctx_conf) {
|
||||
*slot_chan = slot->chanctx_conf->def;
|
||||
} else {
|
||||
memset(slot_chan, 0, sizeof(*slot_chan));
|
||||
continue;
|
||||
}
|
||||
|
||||
for (j = 0; j < num_channels; j++) {
|
||||
u32 raw = le32_to_cpu(ch_list[j].ch_info);
|
||||
|
||||
if (FIELD_GET(NAN_CH_CTRL_PRIMARY_CH, raw) ==
|
||||
slot_chan->chan->hw_value) {
|
||||
u32 map = le32_to_cpu(ch_list[j].avail_map[0]);
|
||||
|
||||
ch_list[j].avail_map[0] = cpu_to_le32(map | BIT(i));
|
||||
le32_add_cpu(&ch_list[j].num, 1);
|
||||
is_found = true;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (!is_found && num_channels < NAN_TIMELINE_MGMT_CHNL_LIST_NUM) {
|
||||
ch_list[num_channels].ch_info =
|
||||
cpu_to_le32(FIELD_PREP(NAN_CH_CTRL_OP_CLASS,
|
||||
slot->channel_entry[0]) |
|
||||
FIELD_PREP(NAN_CH_CTRL_PRIMARY_CH,
|
||||
slot_chan->chan->hw_value));
|
||||
ch_list[num_channels].avail_map[0] = cpu_to_le32(BIT(i));
|
||||
le32_add_cpu(&ch_list[num_channels].num, 1);
|
||||
ch_list[num_channels].is_valid++;
|
||||
num_channels++;
|
||||
}
|
||||
}
|
||||
|
||||
return num_channels;
|
||||
}
|
||||
|
||||
static int mt7925_nan_avail_tlv(struct sk_buff *skb,
|
||||
struct ieee80211_vif *vif)
|
||||
{
|
||||
struct mt7925_nan_avail_entry_tlv *avail_tlv;
|
||||
struct ieee80211_nan_sched_cfg *sched;
|
||||
struct tlv *tlv;
|
||||
u16 ctrl = 0;
|
||||
|
||||
if (!skb || !vif)
|
||||
return -EINVAL;
|
||||
|
||||
tlv = mt76_connac_mcu_add_tlv(skb, NAN_UNI_CMD_UPDATE_AVAILABILITY,
|
||||
sizeof(struct mt7925_nan_avail_entry_tlv));
|
||||
|
||||
if (!tlv)
|
||||
return -ENOMEM;
|
||||
|
||||
sched = &vif->cfg.nan_sched;
|
||||
|
||||
ctrl = mt7925_nan_avail_attr_ctrl(sched);
|
||||
|
||||
avail_tlv = (struct mt7925_nan_avail_entry_tlv *)tlv;
|
||||
avail_tlv->map_id = ctrl & NAN_AVAIL_CTRL_MAPID;
|
||||
avail_tlv->is_cond_avail = false;
|
||||
avail_tlv->timeline_idx = 0;
|
||||
|
||||
mt7925_nan_slot_to_bitmap(vif, avail_tlv->ch_list);
|
||||
|
||||
avail_tlv->is_multi_map = false;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void mt7925_nan_local_sched_changed(struct mt792x_dev *dev,
|
||||
struct ieee80211_vif *vif)
|
||||
{
|
||||
struct mt7925_nan_common_hdr *hdr;
|
||||
struct mt76_dev *mdev;
|
||||
struct sk_buff *skb;
|
||||
|
||||
if (!dev || !vif)
|
||||
return;
|
||||
|
||||
mdev = &dev->mt76;
|
||||
|
||||
skb = mt76_mcu_msg_alloc(mdev, NULL, MT7925_NAN_AVAIL_MAX_SIZE);
|
||||
if (!skb)
|
||||
return;
|
||||
|
||||
hdr = (struct mt7925_nan_common_hdr *)skb_put(skb, sizeof(*hdr));
|
||||
memset(hdr, 0, sizeof(*hdr));
|
||||
|
||||
if (mt7925_nan_avail_ctrl_tlv(skb, vif) ||
|
||||
mt7925_nan_avail_tlv(skb, vif)) {
|
||||
dev_kfree_skb(skb);
|
||||
return;
|
||||
}
|
||||
|
||||
mt76_mcu_skb_send_msg(mdev, skb,
|
||||
MCU_UNI_CMD(NAN), true);
|
||||
}
|
||||
|
||||
static int mt7925_nan_peer_rec_tlv(struct sk_buff *skb,
|
||||
struct ieee80211_sta *sta,
|
||||
struct mt792x_sta *msta,
|
||||
u8 is_activate)
|
||||
{
|
||||
struct mt7925_nan_sched_manage_peer_rec_tlv *peer_rec_tlv;
|
||||
struct tlv *tlv;
|
||||
|
||||
if (!skb || !sta || !msta)
|
||||
return -EINVAL;
|
||||
|
||||
tlv = mt76_connac_mcu_add_tlv(skb, NAN_UNI_CMD_MANAGE_PEER_SCH_RECORD,
|
||||
sizeof(struct mt7925_nan_sched_manage_peer_rec_tlv));
|
||||
|
||||
if (!tlv)
|
||||
return -ENOMEM;
|
||||
|
||||
peer_rec_tlv = (struct mt7925_nan_sched_manage_peer_rec_tlv *)tlv;
|
||||
peer_rec_tlv->sch_idx = cpu_to_le32(msta->nan_sched.sch_idx);
|
||||
peer_rec_tlv->is_activate = is_activate;
|
||||
memcpy(peer_rec_tlv->nmi_addr, sta->addr, ETH_ALEN);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int mt7925_nan_peer_cap_tlv(struct sk_buff *skb,
|
||||
struct ieee80211_sta *sta,
|
||||
struct mt792x_sta *msta)
|
||||
{
|
||||
struct mt7925_nan_sched_update_peer_cap_tlv *peer_cap_tlv;
|
||||
struct ieee80211_nan_peer_sched *sched;
|
||||
enum nl80211_band band;
|
||||
struct tlv *tlv;
|
||||
u16 primary_ch;
|
||||
u32 i;
|
||||
|
||||
if (!skb || !sta || !msta)
|
||||
return -EINVAL;
|
||||
|
||||
sched = sta->nan_sched;
|
||||
if (!sched)
|
||||
return -EINVAL;
|
||||
|
||||
tlv = mt76_connac_mcu_add_tlv(skb, NAN_UNI_CMD_UPDATE_PEER_CAPABILITY,
|
||||
sizeof(struct mt7925_nan_sched_update_peer_cap_tlv));
|
||||
|
||||
if (!tlv)
|
||||
return -ENOMEM;
|
||||
|
||||
peer_cap_tlv = (struct mt7925_nan_sched_update_peer_cap_tlv *)tlv;
|
||||
peer_cap_tlv->sch_idx = cpu_to_le32(msta->nan_sched.sch_idx);
|
||||
peer_cap_tlv->supported_bands = BIT(NAN_SUPPORTED_BAND_ID_2P4G);
|
||||
peer_cap_tlv->max_chnl_switch_time = cpu_to_le16(sched->max_chan_switch);
|
||||
|
||||
for (i = 0; i < sched->n_channels; i++) {
|
||||
if (!sched->channels[i].chanctx_conf)
|
||||
continue;
|
||||
|
||||
band = sched->channels[i].chanctx_conf->def.chan->band;
|
||||
primary_ch =
|
||||
sched->channels[i].chanctx_conf->def.chan->hw_value;
|
||||
|
||||
if (band == NL80211_BAND_2GHZ)
|
||||
peer_cap_tlv->peer_supported_bands |=
|
||||
BIT(NAN_SUPPORTED_BN_2G);
|
||||
else if (primary_ch >= UNII1_LOWER_BOUND &&
|
||||
primary_ch <= UNII1_UPPER_BOUND)
|
||||
peer_cap_tlv->peer_supported_bands |=
|
||||
BIT(NAN_SUPPORTED_BN_5G_LOW);
|
||||
else if (primary_ch >= UNII3_LOWER_BOUND &&
|
||||
primary_ch <= UNII3_UPPER_BOUND)
|
||||
peer_cap_tlv->peer_supported_bands |=
|
||||
BIT(NAN_SUPPORTED_BN_5G_HIGH);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void
|
||||
mt7925_nan_fill_crb_committed(struct mt7925_nan_sched_update_crb_tlv *crb_tlv,
|
||||
struct ieee80211_nan_peer_sched *sched)
|
||||
{
|
||||
u32 m, slot;
|
||||
|
||||
if (!sched)
|
||||
return;
|
||||
|
||||
for (m = 0; m < CFG80211_NAN_MAX_PEER_MAPS &&
|
||||
m < NAN_TIMELINE_MGMT_SIZE; m++) {
|
||||
struct mt7925_nan_sched_timeline *tl =
|
||||
&crb_tlv->comm_faw_timeline[m];
|
||||
struct ieee80211_nan_peer_map *map = &sched->maps[m];
|
||||
|
||||
if (map->map_id == CFG80211_NAN_INVALID_MAP_ID)
|
||||
continue;
|
||||
|
||||
tl->map_id = map->map_id;
|
||||
|
||||
/*
|
||||
* Convert peer schedule slots to FW avail_map bitmap.
|
||||
* Each bit in avail_map[0] represents one time slot where
|
||||
* the peer has committed availability.
|
||||
*/
|
||||
for (slot = 0; slot < CFG80211_NAN_SCHED_NUM_TIME_SLOTS;
|
||||
slot++) {
|
||||
struct ieee80211_nan_channel *ch = map->slots[slot];
|
||||
|
||||
if (!ch || !ch->chanctx_conf)
|
||||
continue;
|
||||
|
||||
tl->avail_map[0] |= cpu_to_le32(BIT(slot));
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static int mt7925_nan_update_crb_tlv(struct sk_buff *skb,
|
||||
struct ieee80211_sta *sta,
|
||||
struct mt792x_sta *msta)
|
||||
{
|
||||
struct mt7925_nan_sched_update_crb_tlv *crb_tlv;
|
||||
struct tlv *tlv;
|
||||
|
||||
if (!skb || !sta || !msta)
|
||||
return -EINVAL;
|
||||
|
||||
tlv = mt76_connac_mcu_add_tlv(skb, NAN_UNI_CMD_UPDATE_CRB,
|
||||
sizeof(struct mt7925_nan_sched_update_crb_tlv));
|
||||
|
||||
if (!tlv)
|
||||
return -ENOMEM;
|
||||
|
||||
crb_tlv = (struct mt7925_nan_sched_update_crb_tlv *)tlv;
|
||||
crb_tlv->sch_idx = cpu_to_le32(msta->nan_sched.sch_idx);
|
||||
crb_tlv->flags = NAN_CRB_USE_DATA_PATH;
|
||||
crb_tlv->is_use_ranging = false;
|
||||
crb_tlv->comm_ndc_ctrl.is_valid = false;
|
||||
|
||||
mt7925_nan_fill_crb_committed(crb_tlv, sta->nan_sched);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int mt792x_nan_set_peer_schedule(struct mt792x_dev *dev,
|
||||
struct ieee80211_sta *sta)
|
||||
{
|
||||
struct mt7925_nan_common_hdr *hdr;
|
||||
struct mt792x_sta *msta;
|
||||
struct mt792x_nan *nan;
|
||||
struct mt76_dev *mdev;
|
||||
struct sk_buff *skb;
|
||||
|
||||
if (!dev || !sta)
|
||||
return -EINVAL;
|
||||
|
||||
mdev = &dev->mt76;
|
||||
|
||||
skb = mt76_mcu_msg_alloc(mdev, NULL, MT7925_NAN_PEER_MAX_SIZE);
|
||||
if (!skb)
|
||||
return -ENOMEM;
|
||||
|
||||
hdr = (struct mt7925_nan_common_hdr *)skb_put(skb, sizeof(*hdr));
|
||||
memset(hdr, 0, sizeof(*hdr));
|
||||
|
||||
msta = (struct mt792x_sta *)sta->drv_priv;
|
||||
nan = &msta->vif->nan;
|
||||
|
||||
/* Allocate connection index on first call for this peer */
|
||||
if (!msta->nan_sched.idx_assigned) {
|
||||
int idx = find_first_zero_bit(&nan->conn_bitmap,
|
||||
NAN_MAX_CONN_CFG);
|
||||
if (idx >= NAN_MAX_CONN_CFG) {
|
||||
dev_kfree_skb(skb);
|
||||
return -ENOSPC;
|
||||
}
|
||||
|
||||
set_bit(idx, &nan->conn_bitmap);
|
||||
msta->nan_sched.sch_idx = idx;
|
||||
msta->nan_sched.idx_assigned = true;
|
||||
|
||||
if (mt7925_nan_peer_rec_tlv(skb, sta, msta, true) ||
|
||||
mt7925_nan_peer_cap_tlv(skb, sta, msta)) {
|
||||
dev_kfree_skb(skb);
|
||||
return -ENOMEM;
|
||||
}
|
||||
}
|
||||
|
||||
if (mt7925_nan_update_crb_tlv(skb, sta, msta)) {
|
||||
dev_kfree_skb(skb);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
return mt76_mcu_skb_send_msg(mdev, skb,
|
||||
MCU_UNI_CMD(NAN), true);
|
||||
}
|
||||
|
||||
int mt792x_nan_set_peer_rec(struct mt76_dev *mdev,
|
||||
struct ieee80211_sta *sta)
|
||||
{
|
||||
struct mt7925_nan_common_hdr *hdr;
|
||||
struct mt792x_sta *msta;
|
||||
struct mt792x_nan *nan;
|
||||
struct sk_buff *skb;
|
||||
|
||||
if (!mdev || !sta)
|
||||
return -EINVAL;
|
||||
|
||||
skb = mt76_mcu_msg_alloc(mdev, NULL,
|
||||
sizeof(struct mt7925_nan_common_hdr) +
|
||||
sizeof(struct mt7925_nan_sched_manage_peer_rec_tlv));
|
||||
if (!skb)
|
||||
return -ENOMEM;
|
||||
|
||||
hdr = (struct mt7925_nan_common_hdr *)skb_put(skb, sizeof(*hdr));
|
||||
memset(hdr, 0, sizeof(*hdr));
|
||||
|
||||
msta = (struct mt792x_sta *)sta->drv_priv;
|
||||
nan = &msta->vif->nan;
|
||||
|
||||
if (!msta->nan_sched.idx_assigned) {
|
||||
dev_kfree_skb(skb);
|
||||
return 0;
|
||||
}
|
||||
|
||||
if (mt7925_nan_peer_rec_tlv(skb, sta, msta, false)) {
|
||||
dev_kfree_skb(skb);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
clear_bit(msta->nan_sched.sch_idx, &nan->conn_bitmap);
|
||||
msta->nan_sched.idx_assigned = false;
|
||||
|
||||
return mt76_mcu_skb_send_msg(mdev, skb,
|
||||
MCU_UNI_CMD(NAN), true);
|
||||
}
|
||||
|
||||
int mt792x_nan_map_sta_rec(struct mt76_dev *mdev,
|
||||
struct ieee80211_vif *vif,
|
||||
struct ieee80211_sta *sta)
|
||||
{
|
||||
struct mt7925_nan_sched_map_sta_rec_tlv *map_tlv;
|
||||
struct mt7925_nan_common_hdr *hdr;
|
||||
struct ieee80211_sta *nmi_sta;
|
||||
struct mt792x_sta *nmi_msta;
|
||||
struct mt792x_sta *msta;
|
||||
u8 nmi_addr[ETH_ALEN];
|
||||
struct sk_buff *skb;
|
||||
int ndp_ctx_id = 0;
|
||||
struct tlv *tlv;
|
||||
|
||||
if (!mdev || !vif || !sta)
|
||||
return -EINVAL;
|
||||
|
||||
msta = (struct mt792x_sta *)sta->drv_priv;
|
||||
|
||||
rcu_read_lock();
|
||||
nmi_sta = rcu_dereference(sta->nmi);
|
||||
if (!nmi_sta) {
|
||||
rcu_read_unlock();
|
||||
dev_err(mdev->dev, "NAN: NMI sta not found for NDI sta %pM\n",
|
||||
sta->addr);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
memcpy(nmi_addr, nmi_sta->addr, ETH_ALEN);
|
||||
nmi_msta = (struct mt792x_sta *)nmi_sta->drv_priv;
|
||||
|
||||
ndp_ctx_id = find_first_zero_bit(&nmi_msta->nan_sched.ndp_ctx_bitmap,
|
||||
NAN_MAX_NDP_CXT);
|
||||
if (ndp_ctx_id < NAN_MAX_NDP_CXT)
|
||||
set_bit(ndp_ctx_id, &nmi_msta->nan_sched.ndp_ctx_bitmap);
|
||||
else
|
||||
ndp_ctx_id = 0;
|
||||
rcu_read_unlock();
|
||||
|
||||
msta->nan_sched.ndp_ctx_id = ndp_ctx_id;
|
||||
|
||||
skb = mt76_mcu_msg_alloc(mdev, NULL,
|
||||
sizeof(struct mt7925_nan_common_hdr) +
|
||||
sizeof(struct mt7925_nan_sched_map_sta_rec_tlv));
|
||||
if (!skb)
|
||||
return -ENOMEM;
|
||||
|
||||
hdr = (struct mt7925_nan_common_hdr *)skb_put(skb, sizeof(*hdr));
|
||||
memset(hdr, 0, sizeof(*hdr));
|
||||
|
||||
tlv = mt76_connac_mcu_add_tlv(skb, NAN_UNI_CMD_MAP_STA_RECORD,
|
||||
sizeof(struct mt7925_nan_sched_map_sta_rec_tlv));
|
||||
if (!tlv) {
|
||||
dev_kfree_skb(skb);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
map_tlv = (struct mt7925_nan_sched_map_sta_rec_tlv *)tlv;
|
||||
memcpy(map_tlv->nmi_addr, nmi_addr, ETH_ALEN);
|
||||
map_tlv->sta_rec_idx = msta->deflink.wcid.idx;
|
||||
map_tlv->ndp_ctx_id = ndp_ctx_id;
|
||||
map_tlv->role_idx = 0;
|
||||
memcpy(map_tlv->ndi_addr, vif->addr, ETH_ALEN);
|
||||
|
||||
return mt76_mcu_skb_send_msg(mdev, skb,
|
||||
MCU_UNI_CMD(NAN), true);
|
||||
}
|
||||
419
drivers/net/wireless/mediatek/mt76/mt7925/nan.h
Normal file
419
drivers/net/wireless/mediatek/mt76/mt7925/nan.h
Normal file
|
|
@ -0,0 +1,419 @@
|
|||
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
|
||||
/* Copyright (C) 2025-2026 MediaTek Inc. */
|
||||
|
||||
#ifndef __MT7925_NAN_H
|
||||
#define __MT7925_NAN_H
|
||||
|
||||
#include <linux/if_ether.h>
|
||||
#include <linux/types.h>
|
||||
|
||||
#include "../mt76_connac_mcu.h"
|
||||
|
||||
#define NAN_MAX_SOCIAL_CHANNELS 3
|
||||
#define NAN_ANCHOR_MASTER_RANK_NUM 8
|
||||
#define NAN_5G_LOW_DISC_CHANNEL 44
|
||||
#define NAN_5G_HIGH_DISC_CHANNEL 149
|
||||
#define NAN_MAX_MASTER_PREFERENCE 255
|
||||
#define NAN_DEFAULT_DW_INTERVAL 1
|
||||
#define NAN_DEFAULT_DISC_BCN_INTERVAL 100
|
||||
#define NAN_TOTAL_DW 16
|
||||
#define NAN_SUPPORTED_2G_FAW_CH_NUM 4
|
||||
#define NAN_SUPPORTED_5G_FAW_CH_NUM 4
|
||||
#define NAN_TIMELINE_MGMT_SIZE 2
|
||||
#define NAN_TIMELINE_MGMT_CHNL_LIST_NUM \
|
||||
((NAN_SUPPORTED_2G_FAW_CH_NUM + \
|
||||
NAN_SUPPORTED_5G_FAW_CH_NUM) / NAN_TIMELINE_MGMT_SIZE)
|
||||
#define NAN_NUM_AVAIL_DB 2
|
||||
#define NAN_NDC_ATTRIBUTE_ID_LENGTH 6
|
||||
#define NAN_MAX_CONN_CFG 8
|
||||
#define NAN_MAX_NDP_CXT 4
|
||||
|
||||
#define MT7925_NAN_CONF_MAX_SIZE \
|
||||
(sizeof(struct mt7925_nan_common_hdr) + \
|
||||
sizeof(struct mt7925_nan_master_preference_tlv) + \
|
||||
sizeof(struct mt7925_nan_dw_interval_tlv) + \
|
||||
sizeof(struct mt7925_nan_cluster_id_tlv) + \
|
||||
sizeof(struct mt7925_nan_sync_rssi_tlv))
|
||||
|
||||
#define MT7925_NAN_AVAIL_MAX_SIZE \
|
||||
(sizeof(struct mt7925_nan_common_hdr) + \
|
||||
sizeof(struct mt7925_nan_avail_ctrl_tlv) + \
|
||||
sizeof(struct mt7925_nan_avail_entry_tlv))
|
||||
|
||||
#define MT7925_NAN_PEER_MAX_SIZE \
|
||||
(sizeof(struct mt7925_nan_common_hdr) + \
|
||||
sizeof(struct mt7925_nan_sched_manage_peer_rec_tlv) + \
|
||||
sizeof(struct mt7925_nan_sched_update_peer_cap_tlv) + \
|
||||
sizeof(struct mt7925_nan_sched_update_crb_tlv))
|
||||
|
||||
/* NAN Availability Attribute */
|
||||
#define NAN_AVAIL_ATTR_ID_OFFSET 0
|
||||
#define NAN_AVAIL_ATTR_LEN_OFFSET 1
|
||||
#define NAN_AVAIL_SEQ_ID_OFFSET 3
|
||||
#define NAN_AVAIL_ATTR_CTRL_OFFSET 4
|
||||
|
||||
/* NAN Availability Attribute - Attribute Control Field */
|
||||
#define NAN_AVAIL_CTRL_MAPID GENMASK(3, 0)
|
||||
#define NAN_AVAIL_CTRL_COMMIT_CHANGED BIT(4)
|
||||
#define NAN_AVAIL_CTRL_POTN_CHANGED BIT(5)
|
||||
#define NAN_AVAIL_CTRL_PUBLIC_AVAIL_CHANGED BIT(6)
|
||||
#define NAN_AVAIL_CTRL_NDC_CHANGED BIT(7)
|
||||
#define NAN_AVAIL_CTRL_CHECK_FOR_CHANGED GENMASK(7, 4)
|
||||
|
||||
#define UNII1_LOWER_BOUND 36
|
||||
#define UNII1_UPPER_BOUND 50
|
||||
#define UNII3_LOWER_BOUND 149
|
||||
#define UNII3_UPPER_BOUND 165
|
||||
|
||||
enum nan_uni_cmd_tag {
|
||||
NAN_UNI_CMD_SET_MASTER_PREFERENCE = 0,
|
||||
NAN_UNI_CMD_ENABLE_REQUEST = 7,
|
||||
NAN_UNI_CMD_DISABLE_REQUEST = 8,
|
||||
NAN_UNI_CMD_UPDATE_AVAILABILITY = 9,
|
||||
NAN_UNI_CMD_UPDATE_CRB = 10,
|
||||
NAN_UNI_CMD_MANAGE_PEER_SCH_RECORD = 12,
|
||||
NAN_UNI_CMD_MAP_STA_RECORD = 13,
|
||||
NAN_UNI_CMD_UPDATE_AVAILABILITY_CTRL = 20,
|
||||
NAN_UNI_CMD_UPDATE_PEER_CAPABILITY = 21,
|
||||
NAN_UNI_CMD_CHANGE_NMI_ADDRESS = 24,
|
||||
NAN_UNI_CMD_SET_DW_INTERVAL = 26,
|
||||
NAN_UNI_CMD_SET_SYNC_RSSI = 39,
|
||||
NAN_UNI_CMD_SET_CLUSTER_ID = 40,
|
||||
NAN_UNI_CMD_KEY_MANAGEMENT = 53,
|
||||
};
|
||||
|
||||
enum nan_uni_event_tag {
|
||||
NAN_UNI_EVENT_ID_DE_EVENT_IND = 19,
|
||||
NAN_UNI_EVENT_REPORT_DW_END = 60,
|
||||
};
|
||||
|
||||
enum nan_disc_event_type {
|
||||
NAN_EVENT_ID_DISC_MAC_ADDR = 0,
|
||||
NAN_EVENT_ID_JOINED_CLUSTER = 2,
|
||||
};
|
||||
|
||||
/* NAN 4.0 Table 79. Device Capability attribute format, Supported Bands */
|
||||
enum nan_supported_bands {
|
||||
NAN_SUPPORTED_BAND_ID_2P4G = 2,
|
||||
NAN_SUPPORTED_BAND_ID_5G = 4,
|
||||
NAN_PROPRIETARY_BAND_ID_6G = 6,
|
||||
NAN_SUPPORTED_BAND_ID_6G = 7,
|
||||
};
|
||||
|
||||
enum nan_peer_supported_bands {
|
||||
NAN_SUPPORTED_BN_2G = 0,
|
||||
NAN_SUPPORTED_BN_5G_LOW,
|
||||
NAN_SUPPORTED_BN_5G_HIGH,
|
||||
NAN_SUPPORTED_BN_6G,
|
||||
NAN_SUPPORTED_BN_NUM
|
||||
};
|
||||
|
||||
#define NAN_CH_CTRL_OP_CLASS GENMASK(15, 8)
|
||||
#define NAN_CH_CTRL_PRIMARY_CH GENMASK(23, 16)
|
||||
|
||||
#define NAN_CRB_USE_DATA_PATH BIT(0)
|
||||
#define NAN_CRB_AVAIL_6G_FORMAT GENMASK(2, 1)
|
||||
|
||||
struct mt7925_nan_social_ch_scan_params {
|
||||
u8 dwell_time[NAN_MAX_SOCIAL_CHANNELS];
|
||||
__le16 scan_period[NAN_MAX_SOCIAL_CHANNELS];
|
||||
} __packed;
|
||||
|
||||
/* Firmware-reported NAN device information */
|
||||
struct nan_dev_info_evt {
|
||||
u8 is_enabled;
|
||||
u8 my_addr[ETH_ALEN];
|
||||
u8 en_fw_election;
|
||||
__le32 nan_dev_role;
|
||||
__le32 nan_dev_state;
|
||||
u8 mst_preference;
|
||||
u8 random_factor;
|
||||
u8 cnt_hop;
|
||||
u8 cluster_id[ETH_ALEN];
|
||||
u8 anchor_mst_addr[ETH_ALEN];
|
||||
u8 am_preference;
|
||||
u8 am_random_factor;
|
||||
u8 parent_mac[ETH_ALEN];
|
||||
u8 parent_am_preference;
|
||||
u8 parent_am_factor;
|
||||
__le32 ambtt;
|
||||
__le32 tsf[2];
|
||||
u8 pn_igtk[6];
|
||||
u8 pn_bigtk[6];
|
||||
};
|
||||
|
||||
/* Firmware NAN discovery window event */
|
||||
struct nan_rpt_dw_evt {
|
||||
struct nan_dev_info_evt device_info;
|
||||
__le32 expected_tsf_h;
|
||||
__le32 expected_tsf_l;
|
||||
__le32 actual_tsf_h;
|
||||
__le32 actual_tsf_l;
|
||||
__le16 channel;
|
||||
__le16 dw_num;
|
||||
};
|
||||
|
||||
struct mt7925_nan_conf_dw {
|
||||
u8 config_2dot4g_dw_band;
|
||||
__le32 dw_2dot4g_interval_val;
|
||||
|
||||
u8 config_5g_dw_band;
|
||||
__le32 dw_5g_interval_val;
|
||||
} __packed;
|
||||
|
||||
struct mt7925_nan_enable_req_tlv {
|
||||
__le16 tag;
|
||||
__le16 len;
|
||||
|
||||
u8 master_pref;
|
||||
__le16 cluster_low;
|
||||
__le16 cluster_high;
|
||||
|
||||
u8 config_support_5g;
|
||||
u8 support_5g_val;
|
||||
|
||||
u8 config_sid_beacon;
|
||||
u8 sid_beacon_val;
|
||||
|
||||
u8 config_2dot4g_rssi_close;
|
||||
u8 rssi_close_2dot4g_val;
|
||||
u8 config_2dot4g_rssi_middle;
|
||||
u8 rssi_middle_2dot4g_val;
|
||||
|
||||
u8 config_2dot4g_rssi_proximity;
|
||||
u8 rssi_proximity_2dot4g_val;
|
||||
u8 config_hop_count_limit;
|
||||
u8 hop_count_limit_val;
|
||||
|
||||
u8 config_2dot4g_support;
|
||||
u8 support_2dot4g_val;
|
||||
|
||||
u8 config_2dot4g_beacons;
|
||||
u8 beacon_2dot4g_val;
|
||||
|
||||
u8 config_2dot4g_sdf;
|
||||
u8 sdf_2dot4g_val;
|
||||
|
||||
u8 config_5g_beacons;
|
||||
u8 beacon_5g_val;
|
||||
|
||||
u8 config_5g_sdf;
|
||||
u8 sdf_5g_val;
|
||||
|
||||
u8 config_5g_rssi_close;
|
||||
u8 rssi_close_5g_val;
|
||||
|
||||
u8 config_5g_rssi_middle;
|
||||
u8 rssi_middle_5g_val;
|
||||
|
||||
u8 config_5g_rssi_close_proximity;
|
||||
u8 rssi_close_proximity_5g_val;
|
||||
|
||||
u8 config_rssi_window_size;
|
||||
u8 rssi_window_size_val;
|
||||
|
||||
u8 config_oui;
|
||||
__le32 oui_val;
|
||||
|
||||
u8 config_intf_addr;
|
||||
u8 intf_addr_val[ETH_ALEN];
|
||||
|
||||
u8 config_cluster_attribute_val;
|
||||
|
||||
u8 config_scan_params;
|
||||
struct mt7925_nan_social_ch_scan_params scan_params_val;
|
||||
|
||||
u8 config_random_factor_force;
|
||||
u8 random_factor_force_val;
|
||||
|
||||
u8 config_hop_count_force;
|
||||
u8 hop_count_force_val;
|
||||
|
||||
u8 config_24g_channel;
|
||||
__le32 channel_24g_val;
|
||||
|
||||
u8 config_5g_channel;
|
||||
__le32 channel_5g_val;
|
||||
|
||||
struct mt7925_nan_conf_dw config_dw;
|
||||
|
||||
u8 config_disc_mac_addr_randomization;
|
||||
__le32 disc_mac_addr_rand_interval_sec;
|
||||
|
||||
u8 discovery_indication_cfg;
|
||||
|
||||
u8 config_subscribe_sid_beacon;
|
||||
__le32 subscribe_sid_beacon_val;
|
||||
|
||||
u8 enable_log_slot_statistics;
|
||||
} __packed __aligned(4);
|
||||
|
||||
struct mt7925_nan_common_hdr {
|
||||
u8 reserved[4];
|
||||
};
|
||||
|
||||
struct mt7925_nan_master_preference_tlv {
|
||||
__le16 tag;
|
||||
__le16 len;
|
||||
u8 master_preference;
|
||||
u8 reserved[3];
|
||||
} __packed __aligned(4);
|
||||
|
||||
struct mt7925_nan_dw_interval_tlv {
|
||||
__le16 tag;
|
||||
__le16 len;
|
||||
u8 dw_interval;
|
||||
u8 vendor_ioctl;
|
||||
__le16 disc_bcn_interval;
|
||||
} __packed __aligned(4);
|
||||
|
||||
struct mt7925_nan_cluster_id_tlv {
|
||||
__le16 tag;
|
||||
__le16 len;
|
||||
u8 cluster_id[ETH_ALEN];
|
||||
u8 reserved[2];
|
||||
} __packed __aligned(4);
|
||||
|
||||
struct mt7925_nan_sync_rssi_tlv {
|
||||
__le16 tag;
|
||||
__le16 len;
|
||||
s8 rssi_close_2g;
|
||||
s8 rssi_middle_2g;
|
||||
s8 rssi_close_5g;
|
||||
s8 rssi_middle_5g;
|
||||
} __packed __aligned(4);
|
||||
|
||||
struct mt7925_nan_de_event {
|
||||
u8 event_type;
|
||||
u8 cluster_id[ETH_ALEN];
|
||||
u8 anchor_master_rank[NAN_ANCHOR_MASTER_RANK_NUM];
|
||||
u8 own_nmi[ETH_ALEN];
|
||||
u8 master_nmi[ETH_ALEN];
|
||||
};
|
||||
|
||||
struct mt7925_nan_nmi_addr_tlv {
|
||||
__le16 tag;
|
||||
__le16 len;
|
||||
u8 nmi_addr[ETH_ALEN];
|
||||
} __packed __aligned(4);
|
||||
|
||||
struct mt7925_nan_avail_ctrl_tlv {
|
||||
__le16 tag;
|
||||
__le16 len;
|
||||
__le16 avail_ctrl;
|
||||
u8 seq_id;
|
||||
u8 reserved[1];
|
||||
} __packed __aligned(4);
|
||||
|
||||
struct mt7925_nan_ch_timeline {
|
||||
u8 is_valid;
|
||||
u8 reserved[3];
|
||||
|
||||
__le32 ch_info;
|
||||
|
||||
__le32 num;
|
||||
__le32 avail_map[NAN_TOTAL_DW];
|
||||
};
|
||||
|
||||
struct mt7925_nan_avail_entry_tlv {
|
||||
__le16 tag;
|
||||
__le16 len;
|
||||
u8 map_id;
|
||||
u8 is_cond_avail;
|
||||
u8 timeline_idx;
|
||||
u8 is_multi_map;
|
||||
|
||||
struct mt7925_nan_ch_timeline ch_list[NAN_TIMELINE_MGMT_CHNL_LIST_NUM];
|
||||
} __packed __aligned(4);
|
||||
|
||||
struct mt7925_nan_sched_manage_peer_rec_tlv {
|
||||
__le16 tag;
|
||||
__le16 len;
|
||||
__le32 sch_idx;
|
||||
u8 is_activate;
|
||||
u8 nmi_addr[ETH_ALEN];
|
||||
u8 reserved[1];
|
||||
} __packed __aligned(4);
|
||||
|
||||
struct mt7925_nan_sched_update_peer_cap_tlv {
|
||||
__le16 tag;
|
||||
__le16 len;
|
||||
__le32 sch_idx;
|
||||
u8 supported_bands;
|
||||
__le16 max_chnl_switch_time;
|
||||
u8 peer_supported_bands;
|
||||
} __packed __aligned(4);
|
||||
|
||||
struct mt7925_nan_sched_timeline {
|
||||
u8 map_id;
|
||||
u8 local_map_id;
|
||||
u8 reserved[2];
|
||||
union {
|
||||
__le32 avail_map[NAN_TOTAL_DW];
|
||||
u8 avail_block[NAN_TOTAL_DW * 4];
|
||||
};
|
||||
};
|
||||
|
||||
struct mt7925_nan_sched_faw_ndc_timeline {
|
||||
__le32 avail_map[NAN_TOTAL_DW];
|
||||
};
|
||||
|
||||
struct mt7925_nan_sched_ndc_ctrl {
|
||||
u8 is_valid;
|
||||
u8 ndc_id[NAN_NDC_ATTRIBUTE_ID_LENGTH];
|
||||
u8 ndc_idx;
|
||||
struct mt7925_nan_sched_timeline timeline[NAN_NUM_AVAIL_DB];
|
||||
};
|
||||
|
||||
struct mt7925_nan_sched_update_crb_tlv {
|
||||
__le16 tag;
|
||||
__le16 len;
|
||||
__le32 sch_idx;
|
||||
u8 flags;
|
||||
u8 is_use_ranging;
|
||||
u8 reserved[2];
|
||||
struct mt7925_nan_sched_timeline comm_ranging_timeline[NAN_TIMELINE_MGMT_SIZE];
|
||||
struct mt7925_nan_sched_timeline comm_faw_timeline[NAN_TIMELINE_MGMT_SIZE];
|
||||
struct mt7925_nan_sched_ndc_ctrl comm_ndc_ctrl;
|
||||
struct mt7925_nan_sched_faw_ndc_timeline faw_ndc_timeline[NAN_TIMELINE_MGMT_SIZE];
|
||||
} __packed __aligned(4);
|
||||
|
||||
struct mt7925_nan_sched_map_sta_rec_tlv {
|
||||
__le16 tag;
|
||||
__le16 len;
|
||||
u8 nmi_addr[ETH_ALEN];
|
||||
u8 sta_rec_idx;
|
||||
u8 ndp_ctx_id;
|
||||
|
||||
__le32 role_idx;
|
||||
u8 ndi_addr[ETH_ALEN];
|
||||
u8 reserved[2];
|
||||
} __packed __aligned(4);
|
||||
|
||||
int mt7925_nan_enable(struct ieee80211_vif *vif,
|
||||
struct mt792x_dev *dev,
|
||||
struct cfg80211_nan_conf *conf);
|
||||
|
||||
int mt7925_nan_disable(struct ieee80211_vif *vif,
|
||||
struct mt792x_dev *dev);
|
||||
|
||||
int mt7925_nan_change_configure(struct ieee80211_vif *vif,
|
||||
struct mt792x_dev *dev,
|
||||
struct cfg80211_nan_conf *conf);
|
||||
|
||||
void mt7925_nan_mcu_event(struct mt792x_dev *dev, struct sk_buff *skb);
|
||||
|
||||
void mt7925_nan_local_sched_changed(struct mt792x_dev *dev,
|
||||
struct ieee80211_vif *vif);
|
||||
|
||||
int mt792x_nan_set_peer_schedule(struct mt792x_dev *dev,
|
||||
struct ieee80211_sta *sta);
|
||||
|
||||
int mt792x_nan_set_peer_rec(struct mt76_dev *mdev,
|
||||
struct ieee80211_sta *sta);
|
||||
|
||||
int mt792x_nan_map_sta_rec(struct mt76_dev *mdev,
|
||||
struct ieee80211_vif *vif,
|
||||
struct ieee80211_sta *sta);
|
||||
|
||||
#endif
|
||||
|
|
@ -217,6 +217,36 @@ mt7925_regd_is_valid_alpha2(const char *alpha2)
|
|||
return false;
|
||||
}
|
||||
|
||||
bool
|
||||
mt7925_regd_is_valid_channel(struct mt792x_dev *dev,
|
||||
enum nl80211_band band,
|
||||
struct ieee80211_channel *chan)
|
||||
{
|
||||
struct ieee80211_hw *hw = mt76_hw(dev);
|
||||
struct wiphy *wiphy = hw->wiphy;
|
||||
struct ieee80211_supported_band *sband;
|
||||
struct ieee80211_channel *ch;
|
||||
int i;
|
||||
|
||||
if (!chan)
|
||||
return false;
|
||||
|
||||
sband = wiphy->bands[band];
|
||||
if (!sband)
|
||||
return false;
|
||||
|
||||
for (i = 0; i < sband->n_channels; i++) {
|
||||
ch = &sband->channels[i];
|
||||
|
||||
if (ch->hw_value == chan->hw_value &&
|
||||
((ch->flags & IEEE80211_CHAN_DISABLED) == 0))
|
||||
return true;
|
||||
}
|
||||
|
||||
return false;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(mt7925_regd_is_valid_channel);
|
||||
|
||||
int mt7925_regd_change(struct mt792x_phy *phy, char *alpha2)
|
||||
{
|
||||
struct wiphy *wiphy = phy->mt76->hw->wiphy;
|
||||
|
|
|
|||
|
|
@ -13,6 +13,9 @@ void mt7925_regd_be_ctrl(struct mt792x_dev *dev, u8 *alpha2);
|
|||
void mt7925_regd_notifier(struct wiphy *wiphy, struct regulatory_request *req);
|
||||
bool mt7925_regd_clc_supported(struct mt792x_dev *dev);
|
||||
int mt7925_regd_change(struct mt792x_phy *phy, char *alpha2);
|
||||
bool mt7925_regd_is_valid_channel(struct mt792x_dev *dev,
|
||||
enum nl80211_band band,
|
||||
struct ieee80211_channel *chan);
|
||||
int mt7925_regd_init(struct mt792x_phy *phy);
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -120,6 +120,18 @@ struct mt792x_link_sta {
|
|||
struct ieee80211_link_sta *pri_link;
|
||||
};
|
||||
|
||||
struct mt792x_sta_nan_sched {
|
||||
u16 committed_dw;
|
||||
u32 sch_idx;
|
||||
bool idx_assigned;
|
||||
unsigned long ndp_ctx_bitmap;
|
||||
u8 ndp_ctx_id; /* assigned NDP context ID (for NDI sta) */
|
||||
struct {
|
||||
u8 map_id;
|
||||
struct cfg80211_chan_def chans[CFG80211_NAN_SCHED_NUM_TIME_SLOTS];
|
||||
} maps[CFG80211_NAN_MAX_PEER_MAPS];
|
||||
};
|
||||
|
||||
struct mt792x_sta {
|
||||
struct mt792x_link_sta deflink; /* must be first */
|
||||
struct mt792x_link_sta __rcu *link[IEEE80211_MLD_MAX_NUM_LINKS];
|
||||
|
|
@ -128,6 +140,9 @@ struct mt792x_sta {
|
|||
|
||||
u16 valid_links;
|
||||
u8 deflink_id;
|
||||
|
||||
/* NAN peer schedule */
|
||||
struct mt792x_sta_nan_sched nan_sched;
|
||||
};
|
||||
|
||||
DECLARE_EWMA(rssi, 10, 8);
|
||||
|
|
@ -144,6 +159,25 @@ struct mt792x_bss_conf {
|
|||
unsigned int link_id;
|
||||
};
|
||||
|
||||
struct mt792x_nan_conf {
|
||||
u8 master_pref;
|
||||
u8 bands;
|
||||
u8 cluster_id[ETH_ALEN];
|
||||
u32 discovery_beacon_interval;
|
||||
bool enable_dw_notification;
|
||||
};
|
||||
|
||||
struct mt792x_nan {
|
||||
struct mt792x_nan_conf conf;
|
||||
|
||||
/* Scheduler */
|
||||
struct cfg80211_chan_def local_sched[CFG80211_NAN_SCHED_NUM_TIME_SLOTS];
|
||||
u32 seq_id;
|
||||
|
||||
/* Connection index bitmap, up to NAN_MAX_CONN_CFG peers */
|
||||
unsigned long conn_bitmap;
|
||||
};
|
||||
|
||||
struct mt792x_vif {
|
||||
struct mt792x_bss_conf bss_conf; /* must be first */
|
||||
struct mt792x_bss_conf __rcu *link_conf[IEEE80211_MLD_MAX_NUM_LINKS];
|
||||
|
|
@ -158,6 +192,8 @@ struct mt792x_vif {
|
|||
|
||||
struct work_struct csa_work;
|
||||
struct timer_list csa_timer;
|
||||
|
||||
struct mt792x_nan nan;
|
||||
};
|
||||
|
||||
struct mt792x_phy {
|
||||
|
|
@ -296,6 +332,8 @@ struct mt792x_dev {
|
|||
u32 backup_l2;
|
||||
|
||||
struct ieee80211_chanctx_conf *new_ctx;
|
||||
|
||||
struct ieee80211_vif *nan_vif;
|
||||
};
|
||||
|
||||
static inline struct mt792x_bss_conf *
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user