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drm/amdgpu: fix mes code error for muti-xcc

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Fix some code error for muti-xcc on mes v12_1.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Likun Gao 2025-04-18 11:11:24 +08:00 committed by Alex Deucher
parent 1359282bd4
commit a5192fbb2e
1 changed files with 3 additions and 2 deletions
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5
drivers/gpu/drm/amd/amdgpu/mes_v12_1.c
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@ -37,6 +37,7 @@ MODULE_FIRMWARE("amdgpu/gc_12_1_0_mes1.bin");
MODULE_FIRMWARE("amdgpu/gc_12_1_0_uni_mes.bin");
static int mes_v12_1_hw_init(struct amdgpu_ip_block *ip_block);
static int mes_v12_1_xcc_hw_init(struct amdgpu_ip_block *ip_block, int xcc_id);
static int mes_v12_1_hw_fini(struct amdgpu_ip_block *ip_block);
static int mes_v12_1_kiq_hw_init(struct amdgpu_device *adev, uint32_t xcc_id);
static int mes_v12_1_kiq_hw_fini(struct amdgpu_device *adev, uint32_t xcc_id);
@ -683,7 +684,7 @@ static int mes_v12_1_set_hw_resources(struct amdgpu_mes *mes,
for (i = 0; i < 5; i++) {
mes_set_hw_res_pkt.gc_base[i] =
adev->reg_offset[GC_HWIP][GET_INST(GC, xcc_id)][i];
adev->reg_offset[GC_HWIP][0][i];
mes_set_hw_res_pkt.mmhub_base[i] =
adev->reg_offset[MMHUB_HWIP][0][i];
mes_set_hw_res_pkt.osssys_base[i] =
@ -1683,7 +1684,7 @@ static int mes_v12_1_kiq_hw_init(struct amdgpu_device *adev, uint32_t xcc_id)
}
if (adev->mes.enable_legacy_queue_map) {
r = mes_v12_1_hw_init(ip_block);
r = mes_v12_1_xcc_hw_init(ip_block, xcc_id);
if (r)
goto failure;
}