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ALSA: hda/intel: Workaround for WALLCLK register for loongson controller

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On loongson controller, the value of WALLCLK register
is always 0, which is meaningless, so we return directly.

Signed-off-by: Yanteng Si <siyanteng@loongson.cn>
Signed-off-by: Yingkun Meng <mengyingkun@loongson.cn>
Acked-by: Huacai Chen <chenhuacai@loongson.cn>
Link: https://lore.kernel.org/r/185df71ef413ab190460eb377703214ee7288aeb.1686128807.git.siyanteng@loongson.cn
Signed-off-by: Takashi Iwai <tiwai@suse.de>
This commit is contained in:
Yanteng Si 2023-06-07 17:21:52 +08:00 committed by Takashi Iwai
parent 942ccdd834
commit a4d2b85378
1 changed files with 7 additions and 0 deletions
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7
sound/pci/hda/hda_intel.c
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@ -655,6 +655,13 @@ static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev)
unsigned int pos;
snd_pcm_uframes_t hwptr, target;
/*
* The value of the WALLCLK register is always 0
* on the Loongson controller, so we return directly.
*/
if (chip->driver_type == AZX_DRIVER_LOONGSON)
return 1;
wallclk = azx_readl(chip, WALLCLK) - azx_dev->core.start_wallclk;
if (wallclk < (azx_dev->core.period_wallclk * 2) / 3)
return -1; /* bogus (too early) interrupt */