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arm64: dts: imx93-11x11-evk: add different usdhc pinctrl for different timing usage

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imx93-11x11-evk dts use the strongest driver strength for
default(high-speed), 100MHz(SDR50/DDR50/DDR52) and
200MHz(SDR104/HS200/HS400) timing. To make usdhc working appropriately for
each timing, add X1 drive strength to default timing and X3 drive
strength to 100MHz timing.

Reviewed-by: Haibo Chen <haibo.chen@nxp.com>
Signed-off-by: Luke Wang <ziniu.wang_1@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Luke Wang 2024-04-19 11:37:04 +08:00 committed by Shawn Guo
parent 3fa24052a1
commit a4a60f8101
1 changed files with 64 additions and 4 deletions
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68
arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
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@ -273,8 +273,8 @@ usb2_drd_sw: endpoint {
&usdhc1 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc1>;
pinctrl-1 = <&pinctrl_usdhc1>;
pinctrl-2 = <&pinctrl_usdhc1>;
pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
bus-width = <8>;
non-removable;
status = "okay";
@ -283,8 +283,8 @@ &usdhc1 {
&usdhc2 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
pinctrl-1 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
pinctrl-2 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
cd-gpios = <&gpio3 00 GPIO_ACTIVE_LOW>;
vmmc-supply = <&reg_usdhc2_vmmc>;
bus-width = <4>;
@ -510,6 +510,40 @@ MX93_PAD_CCM_CLKO2__GPIO3_IO27 0x31e
/* need to config the SION for data and cmd pad, refer to ERR052021 */
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
MX93_PAD_SD1_CLK__USDHC1_CLK 0x1582
MX93_PAD_SD1_CMD__USDHC1_CMD 0x40001382
MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x40001382
MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x40001382
MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x40001382
MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x40001382
MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x40001382
MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x40001382
MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x40001382
MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x40001382
MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x1582
>;
};
/* need to config the SION for data and cmd pad, refer to ERR052021 */
pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
fsl,pins = <
MX93_PAD_SD1_CLK__USDHC1_CLK 0x158e
MX93_PAD_SD1_CMD__USDHC1_CMD 0x4000138e
MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x4000138e
MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x4000138e
MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x4000138e
MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x4000138e
MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x4000138e
MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x4000138e
MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x4000138e
MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x4000138e
MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x158e
>;
};
/* need to config the SION for data and cmd pad, refer to ERR052021 */
pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
fsl,pins = <
MX93_PAD_SD1_CLK__USDHC1_CLK 0x15fe
MX93_PAD_SD1_CMD__USDHC1_CMD 0x400013fe
@ -539,6 +573,32 @@ MX93_PAD_SD2_CD_B__GPIO3_IO00 0x31e
/* need to config the SION for data and cmd pad, refer to ERR052021 */
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX93_PAD_SD2_CLK__USDHC2_CLK 0x1582
MX93_PAD_SD2_CMD__USDHC2_CMD 0x40001382
MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x40001382
MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x40001382
MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x40001382
MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x40001382
MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
>;
};
/* need to config the SION for data and cmd pad, refer to ERR052021 */
pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
fsl,pins = <
MX93_PAD_SD2_CLK__USDHC2_CLK 0x158e
MX93_PAD_SD2_CMD__USDHC2_CMD 0x4000138e
MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x4000138e
MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x4000138e
MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x4000138e
MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x4000138e
MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
>;
};
/* need to config the SION for data and cmd pad, refer to ERR052021 */
pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
fsl,pins = <
MX93_PAD_SD2_CLK__USDHC2_CLK 0x15fe
MX93_PAD_SD2_CMD__USDHC2_CMD 0x400013fe