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drm/amd/display: Add TMDS DC balancer control

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Add TMDS balancer control to the list of available encoder registers for
DCN 30.

Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Rodrigo Siqueira 2024-04-09 15:14:49 -06:00 committed by Alex Deucher
parent 442dd0552c
commit a4812f2fcb
1 changed files with 2 additions and 1 deletions
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3
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_link_encoder.h
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@ -55,7 +55,8 @@
SRI(DP_DPHY_HBR2_PATTERN_CONTROL, DP, id)
#define LINK_ENCODER_MASK_SH_LIST_DCN30(mask_sh) \
LINK_ENCODER_MASK_SH_LIST_DCN20(mask_sh)
LINK_ENCODER_MASK_SH_LIST_DCN20(mask_sh),\
LE_SF(DIG0_TMDS_DCBALANCER_CONTROL, TMDS_SYNC_DCBAL_EN, mask_sh)
#define DPCS_DCN3_MASK_SH_LIST(mask_sh)\
DPCS_DCN2_MASK_SH_LIST(mask_sh),\