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drm/i915/dp: Initialize the link parameters during HW readout

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Initialize the DP link parameters during HW readout. These need to be
up-to-date at least for the MST topology probing, which depends on the
link rate and lane count programmed in DPCD. A follow-up patch will
program the DPCD values to reflect the maximum link parameters before
the first MST topology probing, but should do so only if the link is
disabled (link_trained==false).

Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240722165503.2084999-6-imre.deak@intel.com
This commit is contained in:
Imre Deak 2024-07-22 19:54:54 +03:00
parent a64d5fe490
commit a3f91f405a
1 changed files with 4 additions and 1 deletions
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5
drivers/gpu/drm/i915/display/intel_dp.c
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@ -3352,8 +3352,11 @@ void intel_dp_sync_state(struct intel_encoder *encoder,
intel_dp_tunnel_resume(intel_dp, crtc_state, dpcd_updated);
if (crtc_state)
if (crtc_state) {
intel_dp_reset_link_params(intel_dp);
intel_dp_set_link_params(intel_dp, crtc_state->port_clock, crtc_state->lane_count);
intel_dp->link_trained = true;
}
}
bool intel_dp_initial_fastset_check(struct intel_encoder *encoder,