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drm/i915: move pch_ssc_use to display sub-struct under dpll

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Move the display related member to the struct drm_i915_private display
sub-struct.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230117143946.2426043-2-jani.nikula@intel.com
This commit is contained in:
Jani Nikula 2023-01-17 16:39:45 +02:00
parent 3a7e2d58f8
commit a3f839762c
4 changed files with 12 additions and 9 deletions
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5
drivers/gpu/drm/i915/display/intel_display_core.h
View File

@ -122,6 +122,11 @@ struct intel_dpll {
int nssc;
int ssc;
} ref_clks;
/*
* Bitmask of PLLs using the PCH SSC, indexed using enum intel_dpll_id.
*/
u8 pch_ssc_use;
};
struct intel_frontbuffer_tracking {

4
drivers/gpu/drm/i915/display/intel_dpll_mgr.c
View File

@ -618,7 +618,7 @@ static void hsw_ddi_wrpll_disable(struct drm_i915_private *dev_priv,
* Try to set up the PCH reference clock once all DPLLs
* that depend on it have been shut down.
*/
if (dev_priv->pch_ssc_use & BIT(id))
if (dev_priv->display.dpll.pch_ssc_use & BIT(id))
intel_init_pch_refclk(dev_priv);
}
@ -636,7 +636,7 @@ static void hsw_ddi_spll_disable(struct drm_i915_private *dev_priv,
* Try to set up the PCH reference clock once all DPLLs
* that depend on it have been shut down.
*/
if (dev_priv->pch_ssc_use & BIT(id))
if (dev_priv->display.dpll.pch_ssc_use & BIT(id))
intel_init_pch_refclk(dev_priv);
}

10
drivers/gpu/drm/i915/display/intel_pch_refclk.c
View File

@ -467,24 +467,24 @@ static void lpt_init_pch_refclk(struct drm_i915_private *dev_priv)
* clock hierarchy. That would also allow us to do
* clock bending finally.
*/
dev_priv->pch_ssc_use = 0;
dev_priv->display.dpll.pch_ssc_use = 0;
if (spll_uses_pch_ssc(dev_priv)) {
drm_dbg_kms(&dev_priv->drm, "SPLL using PCH SSC\n");
dev_priv->pch_ssc_use |= BIT(DPLL_ID_SPLL);
dev_priv->display.dpll.pch_ssc_use |= BIT(DPLL_ID_SPLL);
}
if (wrpll_uses_pch_ssc(dev_priv, DPLL_ID_WRPLL1)) {
drm_dbg_kms(&dev_priv->drm, "WRPLL1 using PCH SSC\n");
dev_priv->pch_ssc_use |= BIT(DPLL_ID_WRPLL1);
dev_priv->display.dpll.pch_ssc_use |= BIT(DPLL_ID_WRPLL1);
}
if (wrpll_uses_pch_ssc(dev_priv, DPLL_ID_WRPLL2)) {
drm_dbg_kms(&dev_priv->drm, "WRPLL2 using PCH SSC\n");
dev_priv->pch_ssc_use |= BIT(DPLL_ID_WRPLL2);
dev_priv->display.dpll.pch_ssc_use |= BIT(DPLL_ID_WRPLL2);
}
if (dev_priv->pch_ssc_use)
if (dev_priv->display.dpll.pch_ssc_use)
return;
if (has_fdi) {

2
drivers/gpu/drm/i915/i915_drv.h
View File

@ -374,8 +374,6 @@ struct drm_i915_private {
struct file *mmap_singleton;
} gem;
u8 pch_ssc_use;
/* For i915gm/i945gm vblank irq workaround */
u8 vblank_enabled;