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Revert "drm/amdgpu: let mode2 reset fallback to default when failure"
This reverts commitdac6b80818. This commit reverted the AMDGPU_SKIP_MODE2_RESET as it conflicts with the original design of reset handler. Will redesign it. Fixes:dac6b80818("drm/amdgpu: let mode2 reset fallback to default when failure") Signed-off-by: Victor Zhao <Victor.Zhao@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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a340847b02
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@ -134,7 +134,6 @@ static void amdgpu_amdkfd_reset_work(struct work_struct *work)
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reset_context.method = AMD_RESET_METHOD_NONE;
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reset_context.reset_req_dev = adev;
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clear_bit(AMDGPU_NEED_FULL_RESET, &reset_context.flags);
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clear_bit(AMDGPU_SKIP_MODE2_RESET, &reset_context.flags);
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amdgpu_device_gpu_recover(adev, NULL, &reset_context);
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}
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@ -5210,7 +5210,6 @@ int amdgpu_device_gpu_recover(struct amdgpu_device *adev,
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reset_context->job = job;
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reset_context->hive = hive;
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/*
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* Build list of devices to reset.
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* In case we are in XGMI hive mode, resort the device list
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@ -5337,11 +5336,8 @@ int amdgpu_device_gpu_recover(struct amdgpu_device *adev,
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amdgpu_ras_resume(adev);
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} else {
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r = amdgpu_do_asic_reset(device_list_handle, reset_context);
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if (r && r == -EAGAIN) {
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set_bit(AMDGPU_SKIP_MODE2_RESET, &reset_context->flags);
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adev->asic_reset_res = 0;
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if (r && r == -EAGAIN)
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goto retry;
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}
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if (!r && gpu_reset_for_dev_remove)
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goto recover_end;
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@ -5777,7 +5773,6 @@ pci_ers_result_t amdgpu_pci_slot_reset(struct pci_dev *pdev)
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reset_context.reset_req_dev = adev;
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set_bit(AMDGPU_NEED_FULL_RESET, &reset_context.flags);
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set_bit(AMDGPU_SKIP_HW_RESET, &reset_context.flags);
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set_bit(AMDGPU_SKIP_MODE2_RESET, &reset_context.flags);
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adev->no_hw_access = true;
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r = amdgpu_device_pre_asic_reset(adev, &reset_context);
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@ -72,7 +72,6 @@ static enum drm_gpu_sched_stat amdgpu_job_timedout(struct drm_sched_job *s_job)
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reset_context.method = AMD_RESET_METHOD_NONE;
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reset_context.reset_req_dev = adev;
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clear_bit(AMDGPU_NEED_FULL_RESET, &reset_context.flags);
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clear_bit(AMDGPU_SKIP_MODE2_RESET, &reset_context.flags);
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r = amdgpu_device_gpu_recover(ring->adev, job, &reset_context);
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if (r)
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@ -1950,7 +1950,6 @@ static void amdgpu_ras_do_recovery(struct work_struct *work)
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reset_context.method = AMD_RESET_METHOD_NONE;
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reset_context.reset_req_dev = adev;
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clear_bit(AMDGPU_NEED_FULL_RESET, &reset_context.flags);
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clear_bit(AMDGPU_SKIP_MODE2_RESET, &reset_context.flags);
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amdgpu_device_gpu_recover(ras->adev, NULL, &reset_context);
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}
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@ -74,9 +74,6 @@ int amdgpu_reset_prepare_hwcontext(struct amdgpu_device *adev,
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{
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struct amdgpu_reset_handler *reset_handler = NULL;
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if (test_bit(AMDGPU_SKIP_MODE2_RESET, &reset_context->flags))
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return -ENOSYS;
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if (adev->reset_cntl && adev->reset_cntl->get_reset_handler)
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reset_handler = adev->reset_cntl->get_reset_handler(
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adev->reset_cntl, reset_context);
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@ -93,9 +90,6 @@ int amdgpu_reset_perform_reset(struct amdgpu_device *adev,
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int ret;
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struct amdgpu_reset_handler *reset_handler = NULL;
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if (test_bit(AMDGPU_SKIP_MODE2_RESET, &reset_context->flags))
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return -ENOSYS;
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if (adev->reset_cntl)
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reset_handler = adev->reset_cntl->get_reset_handler(
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adev->reset_cntl, reset_context);
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@ -30,8 +30,7 @@ enum AMDGPU_RESET_FLAGS {
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AMDGPU_NEED_FULL_RESET = 0,
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AMDGPU_SKIP_HW_RESET = 1,
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AMDGPU_SKIP_MODE2_RESET = 2,
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AMDGPU_RESET_FOR_DEVICE_REMOVE = 3,
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AMDGPU_RESET_FOR_DEVICE_REMOVE = 2,
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};
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struct amdgpu_reset_context {
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@ -290,7 +290,6 @@ static void xgpu_ai_mailbox_flr_work(struct work_struct *work)
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reset_context.method = AMD_RESET_METHOD_NONE;
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reset_context.reset_req_dev = adev;
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clear_bit(AMDGPU_NEED_FULL_RESET, &reset_context.flags);
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clear_bit(AMDGPU_SKIP_MODE2_RESET, &reset_context.flags);
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amdgpu_device_gpu_recover(adev, NULL, &reset_context);
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}
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@ -317,7 +317,6 @@ static void xgpu_nv_mailbox_flr_work(struct work_struct *work)
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reset_context.method = AMD_RESET_METHOD_NONE;
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reset_context.reset_req_dev = adev;
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clear_bit(AMDGPU_NEED_FULL_RESET, &reset_context.flags);
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clear_bit(AMDGPU_SKIP_MODE2_RESET, &reset_context.flags);
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amdgpu_device_gpu_recover(adev, NULL, &reset_context);
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}
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@ -529,7 +529,6 @@ static void xgpu_vi_mailbox_flr_work(struct work_struct *work)
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reset_context.method = AMD_RESET_METHOD_NONE;
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reset_context.reset_req_dev = adev;
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clear_bit(AMDGPU_NEED_FULL_RESET, &reset_context.flags);
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clear_bit(AMDGPU_SKIP_MODE2_RESET, &reset_context.flags);
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amdgpu_device_gpu_recover(adev, NULL, &reset_context);
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}
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