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platform/x86:intel/pmc: Add DMU GUID to Arrow Lake U/H

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Arrow Lake U/H platforms may have multiple GUIDs pointing to the
same telemetry region. Add the second possible GUID to the GUID
list to support the Arrow Lake U/H platforms with this GUID.

Signed-off-by: Xi Pardee <xi.pardee@linux.intel.com>
Link: https://patch.msgid.link/20251014214548.629023-4-xi.pardee@linux.intel.com
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
This commit is contained in:
Xi Pardee 2025-10-14 14:45:31 -07:00 committed by Ilpo Järvinen
parent 3b603955f2
commit a32f7d76e3
No known key found for this signature in database
GPG Key ID: 59AC4F6153E5CE31
2 changed files with 2 additions and 1 deletions
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2
drivers/platform/x86/intel/pmc/arl.c
View File

@ -733,7 +733,7 @@ struct pmc_dev_info arl_pmc_dev = {
.sub_req = pmc_core_pmt_get_lpm_req,
};
static u32 ARL_H_PMT_DMU_GUIDS[] = {ARL_PMT_DMU_GUID, 0x0};
static u32 ARL_H_PMT_DMU_GUIDS[] = {ARL_PMT_DMU_GUID, ARL_H_PMT_DMU_GUID, 0x0};
struct pmc_dev_info arl_h_pmc_dev = {
.pci_func = 2,
.dmu_guids = ARL_H_PMT_DMU_GUIDS,

1
drivers/platform/x86/intel/pmc/core.h
View File

@ -283,6 +283,7 @@ enum ppfear_regs {
#define MTL_PMT_DMU_DIE_C6_OFFSET 15
#define MTL_PMT_DMU_GUID 0x1A067102
#define ARL_PMT_DMU_GUID 0x1A06A102
#define ARL_H_PMT_DMU_GUID 0x1A06A101
#define LNL_PMC_MMIO_REG_LEN 0x2708
#define LNL_PMC_LTR_OSSE 0x1B88