thermal/drivers/airoha: Convert to regmap API

In preparation for support of Airoha AN7583, convert the driver to
regmap API. This is needed as Airoha AN7583 will be based on syscon
regmap.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@kernel.org>
Link: https://patch.msgid.link/20260702094846.17325-4-ansuelsmth@gmail.com
This commit is contained in:
Christian Marangi 2026-07-02 11:48:31 +02:00 committed by Daniel Lezcano
parent 6791265d60
commit a3137f1aa4
No known key found for this signature in database
GPG Key ID: A832238A2A4FE84F

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@ -194,7 +194,7 @@
#define AIROHA_MAX_SAMPLES 6
struct airoha_thermal_priv {
void __iomem *base;
struct regmap *map;
struct regmap *chip_scu;
struct resource scu_adc_res;
@ -265,8 +265,8 @@ static int airoha_thermal_set_trips(struct thermal_zone_device *tz, int low,
RAW_TO_TEMP(priv, FIELD_MAX(EN7581_DOUT_TADC_MASK)));
/* We offset the high temp of 1°C to trigger correct event */
writel(TEMP_TO_RAW(priv, high) >> 4,
priv->base + EN7581_TEMPOFFSETH);
regmap_write(priv->map, EN7581_TEMPOFFSETH,
TEMP_TO_RAW(priv, high) >> 4);
enable_monitor = true;
}
@ -277,15 +277,15 @@ static int airoha_thermal_set_trips(struct thermal_zone_device *tz, int low,
RAW_TO_TEMP(priv, FIELD_MAX(EN7581_DOUT_TADC_MASK)));
/* We offset the low temp of 1°C to trigger correct event */
writel(TEMP_TO_RAW(priv, low) >> 4,
priv->base + EN7581_TEMPOFFSETL);
regmap_write(priv->map, EN7581_TEMPOFFSETL,
TEMP_TO_RAW(priv, low) >> 4);
enable_monitor = true;
}
/* Enable sensor 0 monitor after trip are set */
if (enable_monitor)
writel(EN7581_SENSE0_EN, priv->base + EN7581_TEMPMONCTL0);
regmap_write(priv->map, EN7581_TEMPMONCTL0, EN7581_SENSE0_EN);
return 0;
}
@ -300,9 +300,9 @@ static irqreturn_t airoha_thermal_irq(int irq, void *data)
struct airoha_thermal_priv *priv = data;
enum thermal_notify_event event;
bool update = false;
u32 status;
u32 status = 0;
status = readl(priv->base + EN7581_TEMPMONINTSTS);
regmap_read(priv->map, EN7581_TEMPMONINTSTS, &status);
switch (status & (EN7581_HOFSINTSTS0 | EN7581_LOFSINTSTS0)) {
case EN7581_HOFSINTSTS0:
event = THERMAL_TRIP_VIOLATED;
@ -318,7 +318,7 @@ static irqreturn_t airoha_thermal_irq(int irq, void *data)
}
/* Reset Interrupt */
writel(status, priv->base + EN7581_TEMPMONINTSTS);
regmap_write(priv->map, EN7581_TEMPMONINTSTS, status);
if (update)
thermal_zone_device_update(priv->tz, event);
@ -329,18 +329,19 @@ static irqreturn_t airoha_thermal_irq(int irq, void *data)
static void airoha_thermal_setup_adc_val(struct device *dev,
struct airoha_thermal_priv *priv)
{
u32 efuse_calib_info, cpu_sensor;
u32 efuse_calib_info = 0;
u32 cpu_sensor = 0;
/* Setup thermal sensor to ADC mode and setup the mux to DIODE1 */
airoha_init_thermal_ADC_mode(priv);
/* sleep 10 ms for ADC to enable */
usleep_range(10 * USEC_PER_MSEC, 11 * USEC_PER_MSEC);
efuse_calib_info = readl(priv->base + EN7581_EFUSE_TEMP_OFFSET_REG);
regmap_read(priv->map, EN7581_EFUSE_TEMP_OFFSET_REG, &efuse_calib_info);
if (efuse_calib_info) {
priv->default_offset = FIELD_GET(EN7581_EFUSE_TEMP_OFFSET, efuse_calib_info);
/* Different slope are applied if the sensor is used for CPU or for package */
cpu_sensor = readl(priv->base + EN7581_EFUSE_TEMP_CPU_SENSOR_REG);
regmap_read(priv->map, EN7581_EFUSE_TEMP_CPU_SENSOR_REG, &cpu_sensor);
if (cpu_sensor) {
priv->default_slope = EN7581_SLOPE_X100_DIO_DEFAULT;
priv->init_temp = EN7581_INIT_TEMP_FTK_X10;
@ -359,8 +360,8 @@ static void airoha_thermal_setup_adc_val(struct device *dev,
static void airoha_thermal_setup_monitor(struct airoha_thermal_priv *priv)
{
/* Set measure mode */
writel(FIELD_PREP(EN7581_MSRCTL0, EN7581_MSRCTL_6SAMPLE_MAX_MIX_AVG4),
priv->base + EN7581_TEMPMSRCTL0);
regmap_write(priv->map, EN7581_TEMPMSRCTL0,
FIELD_PREP(EN7581_MSRCTL0, EN7581_MSRCTL_6SAMPLE_MAX_MIX_AVG4));
/*
* Configure ADC valid reading addr
@ -375,15 +376,15 @@ static void airoha_thermal_setup_monitor(struct airoha_thermal_priv *priv)
* We set valid instead of volt as we don't enable valid/volt
* split reading and AHB read valid addr in such case.
*/
writel(priv->scu_adc_res.start + EN7581_DOUT_TADC,
priv->base + EN7581_TEMPADCVALIDADDR);
regmap_write(priv->map, EN7581_TEMPADCVALIDADDR,
priv->scu_adc_res.start + EN7581_DOUT_TADC);
/*
* Configure valid bit on a fake value of bit 16. The ADC outputs
* max of 2 bytes for voltage.
*/
writel(FIELD_PREP(EN7581_ADV_RD_VALID_POS, 16),
priv->base + EN7581_TEMPADCVALIDMASK);
regmap_write(priv->map, EN7581_TEMPADCVALIDMASK,
FIELD_PREP(EN7581_ADV_RD_VALID_POS, 16));
/*
* AHB supports max 12 bytes for ADC voltage. Shift the read
@ -391,40 +392,52 @@ static void airoha_thermal_setup_monitor(struct airoha_thermal_priv *priv)
* in the order of half a °C and is acceptable in the context
* of triggering interrupt in critical condition.
*/
writel(FIELD_PREP(EN7581_ADC_VOLTAGE_SHIFT, 4),
priv->base + EN7581_TEMPADCVOLTAGESHIFT);
regmap_write(priv->map, EN7581_TEMPADCVOLTAGESHIFT,
FIELD_PREP(EN7581_ADC_VOLTAGE_SHIFT, 4));
/* BUS clock is 300MHz counting unit is 3 * 68.64 * 256 = 52.715us */
writel(FIELD_PREP(EN7581_PERIOD_UNIT, 3),
priv->base + EN7581_TEMPMONCTL1);
regmap_write(priv->map, EN7581_TEMPMONCTL1,
FIELD_PREP(EN7581_PERIOD_UNIT, 3));
/*
* filt interval is 1 * 52.715us = 52.715us,
* sen interval is 379 * 52.715us = 19.97ms
*/
writel(FIELD_PREP(EN7581_FILT_INTERVAL, 1) |
FIELD_PREP(EN7581_SEN_INTERVAL, 379),
priv->base + EN7581_TEMPMONCTL2);
regmap_write(priv->map, EN7581_TEMPMONCTL2,
FIELD_PREP(EN7581_FILT_INTERVAL, 1) |
FIELD_PREP(EN7581_SEN_INTERVAL, 379));
/* AHB poll is set to 146 * 68.64 = 10.02us */
writel(FIELD_PREP(EN7581_ADC_POLL_INTVL, 146),
priv->base + EN7581_TEMPAHBPOLL);
regmap_write(priv->map, EN7581_TEMPAHBPOLL,
FIELD_PREP(EN7581_ADC_POLL_INTVL, 146));
}
static const struct regmap_config airoha_thermal_regmap_config = {
.reg_bits = 32,
.reg_stride = 4,
.val_bits = 32,
};
static int airoha_thermal_probe(struct platform_device *pdev)
{
struct airoha_thermal_priv *priv;
struct device_node *chip_scu_np;
struct device *dev = &pdev->dev;
void __iomem *base;
int irq, ret;
priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
return -ENOMEM;
priv->base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(priv->base))
return PTR_ERR(priv->base);
base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(base))
return PTR_ERR(base);
priv->map = devm_regmap_init_mmio(dev, base,
&airoha_thermal_regmap_config);
if (IS_ERR(priv->map))
return PTR_ERR(priv->map);
chip_scu_np = of_parse_phandle(dev->of_node, "airoha,chip-scu", 0);
if (!chip_scu_np)
@ -462,8 +475,8 @@ static int airoha_thermal_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, priv);
/* Enable LOW and HIGH interrupt */
writel(EN7581_HOFSINTEN0 | EN7581_LOFSINTEN0,
priv->base + EN7581_TEMPMONINT);
regmap_write(priv->map, EN7581_TEMPMONINT,
EN7581_HOFSINTEN0 | EN7581_LOFSINTEN0);
return 0;
}