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net/mlx5: Relocate function declarations from port.h to mlx5_core.h
The port header is a general file under include, yet it contains declarations for functions that are either not exported or exported but not used outside the mlx5_core driver. To enhance code organization, we move these declarations to mlx5_core.h, where they are more appropriately scoped. This refactor removes unnecessary exported symbols and prevents unexported functions from being inadvertently referenced outside of the mlx5_core driver. Signed-off-by: Shahar Shitrit <shshitrit@nvidia.com> Reviewed-by: Carolina Jubran <cjubran@nvidia.com> Signed-off-by: Tariq Toukan <tariqt@nvidia.com> Link: https://patch.msgid.link/20250304160620.417580-2-tariqt@nvidia.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Shahar Shitrit
Jakub Kicinski
parent
92d3690520
commit
a2f61f1db8
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@ -114,6 +114,21 @@ struct mlx5_cmd_alias_obj_create_attr {
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u8 access_key[ACCESS_KEY_LEN];
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};
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struct mlx5_port_eth_proto {
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u32 cap;
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u32 admin;
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u32 oper;
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};
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struct mlx5_module_eeprom_query_params {
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u16 size;
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u16 offset;
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u16 i2c_address;
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u32 page;
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u32 bank;
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u32 module_number;
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};
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static inline void mlx5_printk(struct mlx5_core_dev *dev, int level, const char *format, ...)
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{
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struct device *device = dev->device;
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@ -280,6 +295,76 @@ int mlx5_set_mtppse(struct mlx5_core_dev *mdev, u8 pin, u8 arm, u8 mode);
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struct mlx5_dm *mlx5_dm_create(struct mlx5_core_dev *dev);
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void mlx5_dm_cleanup(struct mlx5_core_dev *dev);
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void mlx5_toggle_port_link(struct mlx5_core_dev *dev);
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int mlx5_set_port_admin_status(struct mlx5_core_dev *dev,
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enum mlx5_port_status status);
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int mlx5_query_port_admin_status(struct mlx5_core_dev *dev,
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enum mlx5_port_status *status);
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int mlx5_set_port_beacon(struct mlx5_core_dev *dev, u16 beacon_duration);
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int mlx5_set_port_mtu(struct mlx5_core_dev *dev, u16 mtu, u8 port);
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int mlx5_set_port_pause(struct mlx5_core_dev *dev, u32 rx_pause, u32 tx_pause);
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int mlx5_query_port_pause(struct mlx5_core_dev *dev,
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u32 *rx_pause, u32 *tx_pause);
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int mlx5_set_port_pfc(struct mlx5_core_dev *dev, u8 pfc_en_tx, u8 pfc_en_rx);
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int mlx5_query_port_pfc(struct mlx5_core_dev *dev, u8 *pfc_en_tx,
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u8 *pfc_en_rx);
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int mlx5_set_port_stall_watermark(struct mlx5_core_dev *dev,
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u16 stall_critical_watermark,
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u16 stall_minor_watermark);
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int mlx5_query_port_stall_watermark(struct mlx5_core_dev *dev,
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u16 *stall_critical_watermark,
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u16 *stall_minor_watermark);
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int mlx5_max_tc(struct mlx5_core_dev *mdev);
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int mlx5_set_port_prio_tc(struct mlx5_core_dev *mdev, u8 *prio_tc);
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int mlx5_query_port_prio_tc(struct mlx5_core_dev *mdev,
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u8 prio, u8 *tc);
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int mlx5_set_port_tc_group(struct mlx5_core_dev *mdev, u8 *tc_group);
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int mlx5_query_port_tc_group(struct mlx5_core_dev *mdev,
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u8 tc, u8 *tc_group);
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int mlx5_set_port_tc_bw_alloc(struct mlx5_core_dev *mdev, u8 *tc_bw);
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int mlx5_query_port_tc_bw_alloc(struct mlx5_core_dev *mdev,
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u8 tc, u8 *bw_pct);
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int mlx5_modify_port_ets_rate_limit(struct mlx5_core_dev *mdev,
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u8 *max_bw_value,
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u8 *max_bw_unit);
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int mlx5_query_port_ets_rate_limit(struct mlx5_core_dev *mdev,
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u8 *max_bw_value,
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u8 *max_bw_unit);
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int mlx5_set_port_wol(struct mlx5_core_dev *mdev, u8 wol_mode);
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int mlx5_query_port_wol(struct mlx5_core_dev *mdev, u8 *wol_mode);
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int mlx5_query_ports_check(struct mlx5_core_dev *mdev, u32 *out, int outlen);
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int mlx5_set_ports_check(struct mlx5_core_dev *mdev, u32 *in, int inlen);
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int mlx5_set_port_fcs(struct mlx5_core_dev *mdev, u8 enable);
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void mlx5_query_port_fcs(struct mlx5_core_dev *mdev, bool *supported,
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bool *enabled);
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int mlx5_query_module_eeprom(struct mlx5_core_dev *dev,
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u16 offset, u16 size, u8 *data);
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int
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mlx5_query_module_eeprom_by_page(struct mlx5_core_dev *dev,
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struct mlx5_module_eeprom_query_params *params,
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u8 *data);
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int mlx5_query_port_dcbx_param(struct mlx5_core_dev *mdev, u32 *out);
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int mlx5_set_port_dcbx_param(struct mlx5_core_dev *mdev, u32 *in);
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int mlx5_set_trust_state(struct mlx5_core_dev *mdev, u8 trust_state);
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int mlx5_query_trust_state(struct mlx5_core_dev *mdev, u8 *trust_state);
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int mlx5_set_dscp2prio(struct mlx5_core_dev *mdev, u8 dscp, u8 prio);
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int mlx5_query_dscp2prio(struct mlx5_core_dev *mdev, u8 *dscp2prio);
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int mlx5_port_query_eth_proto(struct mlx5_core_dev *dev, u8 port, bool ext,
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struct mlx5_port_eth_proto *eproto);
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bool mlx5_ptys_ext_supported(struct mlx5_core_dev *mdev);
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u32 mlx5_port_ptys2speed(struct mlx5_core_dev *mdev, u32 eth_proto_oper,
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bool force_legacy);
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u32 mlx5_port_speed2linkmodes(struct mlx5_core_dev *mdev, u32 speed,
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bool force_legacy);
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int mlx5_port_max_linkspeed(struct mlx5_core_dev *mdev, u32 *speed);
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#define MLX5_PPS_CAP(mdev) (MLX5_CAP_GEN((mdev), pps) && \
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MLX5_CAP_GEN((mdev), pps_modify) && \
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MLX5_CAP_MCAM_FEATURE((mdev), mtpps_fs) && \
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@ -196,7 +196,6 @@ void mlx5_toggle_port_link(struct mlx5_core_dev *dev)
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if (ps == MLX5_PORT_UP)
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mlx5_set_port_admin_status(dev, MLX5_PORT_UP);
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}
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EXPORT_SYMBOL_GPL(mlx5_toggle_port_link);
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int mlx5_set_port_admin_status(struct mlx5_core_dev *dev,
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enum mlx5_port_status status)
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@ -210,7 +209,6 @@ int mlx5_set_port_admin_status(struct mlx5_core_dev *dev,
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return mlx5_core_access_reg(dev, in, sizeof(in), out,
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sizeof(out), MLX5_REG_PAOS, 0, 1);
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}
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EXPORT_SYMBOL_GPL(mlx5_set_port_admin_status);
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int mlx5_query_port_admin_status(struct mlx5_core_dev *dev,
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enum mlx5_port_status *status)
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@ -227,7 +225,6 @@ int mlx5_query_port_admin_status(struct mlx5_core_dev *dev,
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*status = MLX5_GET(paos_reg, out, admin_status);
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return 0;
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}
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EXPORT_SYMBOL_GPL(mlx5_query_port_admin_status);
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static void mlx5_query_port_mtu(struct mlx5_core_dev *dev, u16 *admin_mtu,
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u16 *max_mtu, u16 *oper_mtu, u8 port)
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@ -257,7 +254,6 @@ int mlx5_set_port_mtu(struct mlx5_core_dev *dev, u16 mtu, u8 port)
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return mlx5_core_access_reg(dev, in, sizeof(in), out,
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sizeof(out), MLX5_REG_PMTU, 0, 1);
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}
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EXPORT_SYMBOL_GPL(mlx5_set_port_mtu);
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void mlx5_query_port_max_mtu(struct mlx5_core_dev *dev, u16 *max_mtu,
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u8 port)
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@ -447,7 +443,6 @@ int mlx5_query_module_eeprom(struct mlx5_core_dev *dev,
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return mlx5_query_mcia(dev, &query, data);
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}
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EXPORT_SYMBOL_GPL(mlx5_query_module_eeprom);
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int mlx5_query_module_eeprom_by_page(struct mlx5_core_dev *dev,
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struct mlx5_module_eeprom_query_params *params,
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@ -467,7 +462,6 @@ int mlx5_query_module_eeprom_by_page(struct mlx5_core_dev *dev,
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return mlx5_query_mcia(dev, params, data);
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}
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EXPORT_SYMBOL_GPL(mlx5_query_module_eeprom_by_page);
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static int mlx5_query_port_pvlc(struct mlx5_core_dev *dev, u32 *pvlc,
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int pvlc_size, u8 local_port)
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@ -518,7 +512,6 @@ int mlx5_set_port_pause(struct mlx5_core_dev *dev, u32 rx_pause, u32 tx_pause)
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return mlx5_core_access_reg(dev, in, sizeof(in), out,
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sizeof(out), MLX5_REG_PFCC, 0, 1);
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}
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EXPORT_SYMBOL_GPL(mlx5_set_port_pause);
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int mlx5_query_port_pause(struct mlx5_core_dev *dev,
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u32 *rx_pause, u32 *tx_pause)
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@ -538,7 +531,6 @@ int mlx5_query_port_pause(struct mlx5_core_dev *dev,
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return 0;
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}
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EXPORT_SYMBOL_GPL(mlx5_query_port_pause);
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int mlx5_set_port_stall_watermark(struct mlx5_core_dev *dev,
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u16 stall_critical_watermark,
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@ -597,7 +589,6 @@ int mlx5_set_port_pfc(struct mlx5_core_dev *dev, u8 pfc_en_tx, u8 pfc_en_rx)
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return mlx5_core_access_reg(dev, in, sizeof(in), out,
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sizeof(out), MLX5_REG_PFCC, 0, 1);
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}
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EXPORT_SYMBOL_GPL(mlx5_set_port_pfc);
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int mlx5_query_port_pfc(struct mlx5_core_dev *dev, u8 *pfc_en_tx, u8 *pfc_en_rx)
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{
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@ -616,7 +607,6 @@ int mlx5_query_port_pfc(struct mlx5_core_dev *dev, u8 *pfc_en_tx, u8 *pfc_en_rx)
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return 0;
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}
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EXPORT_SYMBOL_GPL(mlx5_query_port_pfc);
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int mlx5_max_tc(struct mlx5_core_dev *mdev)
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{
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@ -667,7 +657,6 @@ int mlx5_set_port_prio_tc(struct mlx5_core_dev *mdev, u8 *prio_tc)
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return 0;
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}
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EXPORT_SYMBOL_GPL(mlx5_set_port_prio_tc);
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int mlx5_query_port_prio_tc(struct mlx5_core_dev *mdev,
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u8 prio, u8 *tc)
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@ -689,7 +678,6 @@ int mlx5_query_port_prio_tc(struct mlx5_core_dev *mdev,
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return err;
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}
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EXPORT_SYMBOL_GPL(mlx5_query_port_prio_tc);
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static int mlx5_set_port_qetcr_reg(struct mlx5_core_dev *mdev, u32 *in,
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int inlen)
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@ -728,7 +716,6 @@ int mlx5_set_port_tc_group(struct mlx5_core_dev *mdev, u8 *tc_group)
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return mlx5_set_port_qetcr_reg(mdev, in, sizeof(in));
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}
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EXPORT_SYMBOL_GPL(mlx5_set_port_tc_group);
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int mlx5_query_port_tc_group(struct mlx5_core_dev *mdev,
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u8 tc, u8 *tc_group)
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@ -749,7 +736,6 @@ int mlx5_query_port_tc_group(struct mlx5_core_dev *mdev,
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return 0;
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}
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EXPORT_SYMBOL_GPL(mlx5_query_port_tc_group);
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int mlx5_set_port_tc_bw_alloc(struct mlx5_core_dev *mdev, u8 *tc_bw)
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{
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@ -763,7 +749,6 @@ int mlx5_set_port_tc_bw_alloc(struct mlx5_core_dev *mdev, u8 *tc_bw)
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return mlx5_set_port_qetcr_reg(mdev, in, sizeof(in));
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}
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EXPORT_SYMBOL_GPL(mlx5_set_port_tc_bw_alloc);
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int mlx5_query_port_tc_bw_alloc(struct mlx5_core_dev *mdev,
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u8 tc, u8 *bw_pct)
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@ -784,7 +769,6 @@ int mlx5_query_port_tc_bw_alloc(struct mlx5_core_dev *mdev,
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return 0;
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}
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EXPORT_SYMBOL_GPL(mlx5_query_port_tc_bw_alloc);
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int mlx5_modify_port_ets_rate_limit(struct mlx5_core_dev *mdev,
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u8 *max_bw_value,
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@ -808,7 +792,6 @@ int mlx5_modify_port_ets_rate_limit(struct mlx5_core_dev *mdev,
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return mlx5_set_port_qetcr_reg(mdev, in, sizeof(in));
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}
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EXPORT_SYMBOL_GPL(mlx5_modify_port_ets_rate_limit);
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int mlx5_query_port_ets_rate_limit(struct mlx5_core_dev *mdev,
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u8 *max_bw_value,
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@ -834,7 +817,6 @@ int mlx5_query_port_ets_rate_limit(struct mlx5_core_dev *mdev,
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return 0;
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}
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EXPORT_SYMBOL_GPL(mlx5_query_port_ets_rate_limit);
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int mlx5_set_port_wol(struct mlx5_core_dev *mdev, u8 wol_mode)
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{
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@ -845,7 +827,6 @@ int mlx5_set_port_wol(struct mlx5_core_dev *mdev, u8 wol_mode)
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MLX5_SET(set_wol_rol_in, in, wol_mode, wol_mode);
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return mlx5_cmd_exec_in(mdev, set_wol_rol, in);
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}
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EXPORT_SYMBOL_GPL(mlx5_set_port_wol);
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int mlx5_query_port_wol(struct mlx5_core_dev *mdev, u8 *wol_mode)
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{
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@ -860,7 +841,6 @@ int mlx5_query_port_wol(struct mlx5_core_dev *mdev, u8 *wol_mode)
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return err;
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}
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EXPORT_SYMBOL_GPL(mlx5_query_port_wol);
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int mlx5_query_ports_check(struct mlx5_core_dev *mdev, u32 *out, int outlen)
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{
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@ -61,15 +61,6 @@ enum mlx5_an_status {
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#define MLX5_EEPROM_PAGE_LENGTH 256
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#define MLX5_EEPROM_HIGH_PAGE_LENGTH 128
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struct mlx5_module_eeprom_query_params {
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u16 size;
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u16 offset;
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u16 i2c_address;
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u32 page;
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u32 bank;
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u32 module_number;
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};
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enum mlx5e_link_mode {
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MLX5E_1000BASE_CX_SGMII = 0,
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MLX5E_1000BASE_KX = 1,
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@ -145,12 +136,6 @@ enum mlx5_ptys_width {
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MLX5_PTYS_WIDTH_12X = 1 << 4,
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};
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struct mlx5_port_eth_proto {
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u32 cap;
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u32 admin;
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u32 oper;
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};
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#define MLX5E_PROT_MASK(link_mode) (1U << link_mode)
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#define MLX5_GET_ETH_PROTO(reg, out, ext, field) \
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(ext ? MLX5_GET(reg, out, ext_##field) : \
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@ -163,14 +148,7 @@ int mlx5_query_port_ptys(struct mlx5_core_dev *dev, u32 *ptys,
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int mlx5_query_ib_port_oper(struct mlx5_core_dev *dev, u16 *link_width_oper,
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u16 *proto_oper, u8 local_port, u8 plane_index);
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void mlx5_toggle_port_link(struct mlx5_core_dev *dev);
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int mlx5_set_port_admin_status(struct mlx5_core_dev *dev,
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enum mlx5_port_status status);
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int mlx5_query_port_admin_status(struct mlx5_core_dev *dev,
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enum mlx5_port_status *status);
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int mlx5_set_port_beacon(struct mlx5_core_dev *dev, u16 beacon_duration);
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int mlx5_set_port_mtu(struct mlx5_core_dev *dev, u16 mtu, u8 port);
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void mlx5_query_port_max_mtu(struct mlx5_core_dev *dev, u16 *max_mtu, u8 port);
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void mlx5_query_port_oper_mtu(struct mlx5_core_dev *dev, u16 *oper_mtu,
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u8 port);
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@ -178,65 +156,4 @@ void mlx5_query_port_oper_mtu(struct mlx5_core_dev *dev, u16 *oper_mtu,
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int mlx5_query_port_vl_hw_cap(struct mlx5_core_dev *dev,
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u8 *vl_hw_cap, u8 local_port);
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int mlx5_set_port_pause(struct mlx5_core_dev *dev, u32 rx_pause, u32 tx_pause);
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int mlx5_query_port_pause(struct mlx5_core_dev *dev,
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u32 *rx_pause, u32 *tx_pause);
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int mlx5_set_port_pfc(struct mlx5_core_dev *dev, u8 pfc_en_tx, u8 pfc_en_rx);
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int mlx5_query_port_pfc(struct mlx5_core_dev *dev, u8 *pfc_en_tx,
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u8 *pfc_en_rx);
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int mlx5_set_port_stall_watermark(struct mlx5_core_dev *dev,
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u16 stall_critical_watermark,
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u16 stall_minor_watermark);
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int mlx5_query_port_stall_watermark(struct mlx5_core_dev *dev,
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u16 *stall_critical_watermark, u16 *stall_minor_watermark);
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int mlx5_max_tc(struct mlx5_core_dev *mdev);
|
||||
|
||||
int mlx5_set_port_prio_tc(struct mlx5_core_dev *mdev, u8 *prio_tc);
|
||||
int mlx5_query_port_prio_tc(struct mlx5_core_dev *mdev,
|
||||
u8 prio, u8 *tc);
|
||||
int mlx5_set_port_tc_group(struct mlx5_core_dev *mdev, u8 *tc_group);
|
||||
int mlx5_query_port_tc_group(struct mlx5_core_dev *mdev,
|
||||
u8 tc, u8 *tc_group);
|
||||
int mlx5_set_port_tc_bw_alloc(struct mlx5_core_dev *mdev, u8 *tc_bw);
|
||||
int mlx5_query_port_tc_bw_alloc(struct mlx5_core_dev *mdev,
|
||||
u8 tc, u8 *bw_pct);
|
||||
int mlx5_modify_port_ets_rate_limit(struct mlx5_core_dev *mdev,
|
||||
u8 *max_bw_value,
|
||||
u8 *max_bw_unit);
|
||||
int mlx5_query_port_ets_rate_limit(struct mlx5_core_dev *mdev,
|
||||
u8 *max_bw_value,
|
||||
u8 *max_bw_unit);
|
||||
int mlx5_set_port_wol(struct mlx5_core_dev *mdev, u8 wol_mode);
|
||||
int mlx5_query_port_wol(struct mlx5_core_dev *mdev, u8 *wol_mode);
|
||||
|
||||
int mlx5_query_ports_check(struct mlx5_core_dev *mdev, u32 *out, int outlen);
|
||||
int mlx5_set_ports_check(struct mlx5_core_dev *mdev, u32 *in, int inlen);
|
||||
int mlx5_set_port_fcs(struct mlx5_core_dev *mdev, u8 enable);
|
||||
void mlx5_query_port_fcs(struct mlx5_core_dev *mdev, bool *supported,
|
||||
bool *enabled);
|
||||
int mlx5_query_module_eeprom(struct mlx5_core_dev *dev,
|
||||
u16 offset, u16 size, u8 *data);
|
||||
int mlx5_query_module_eeprom_by_page(struct mlx5_core_dev *dev,
|
||||
struct mlx5_module_eeprom_query_params *params, u8 *data);
|
||||
|
||||
int mlx5_query_port_dcbx_param(struct mlx5_core_dev *mdev, u32 *out);
|
||||
int mlx5_set_port_dcbx_param(struct mlx5_core_dev *mdev, u32 *in);
|
||||
|
||||
int mlx5_set_trust_state(struct mlx5_core_dev *mdev, u8 trust_state);
|
||||
int mlx5_query_trust_state(struct mlx5_core_dev *mdev, u8 *trust_state);
|
||||
int mlx5_set_dscp2prio(struct mlx5_core_dev *mdev, u8 dscp, u8 prio);
|
||||
int mlx5_query_dscp2prio(struct mlx5_core_dev *mdev, u8 *dscp2prio);
|
||||
|
||||
int mlx5_port_query_eth_proto(struct mlx5_core_dev *dev, u8 port, bool ext,
|
||||
struct mlx5_port_eth_proto *eproto);
|
||||
bool mlx5_ptys_ext_supported(struct mlx5_core_dev *mdev);
|
||||
u32 mlx5_port_ptys2speed(struct mlx5_core_dev *mdev, u32 eth_proto_oper,
|
||||
bool force_legacy);
|
||||
u32 mlx5_port_speed2linkmodes(struct mlx5_core_dev *mdev, u32 speed,
|
||||
bool force_legacy);
|
||||
int mlx5_port_max_linkspeed(struct mlx5_core_dev *mdev, u32 *speed);
|
||||
|
||||
#endif /* __MLX5_PORT_H__ */
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user