mirror of
https://github.com/torvalds/linux.git
synced 2026-05-28 09:04:39 +02:00
dt-bindings: interrupt-controller: Convert chrp,open-pic to DT schema
Convert the Open PIC interrupt controller binding to schema format. While the Linux kernel supports the "open-pic" compatible, that's not used in any upstream .dts file. It used for "device_type" though. Add "fsl,mpic" compatible which was not documented. Link: https://lore.kernel.org/r/20250505144809.1291619-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
This commit is contained in:
parent
1ee0fd4380
commit
a241f1a1b3
|
|
@ -0,0 +1,63 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/interrupt-controller/chrp,open-pic.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Open PIC Interrupt Controller
|
||||
|
||||
maintainers:
|
||||
- Rob Herring <robh@kernel.org>
|
||||
|
||||
description:
|
||||
This binding specifies what properties must be available in the device tree
|
||||
representation of an Open PIC compliant interrupt controller. This binding is
|
||||
based on the binding defined for Open PIC in [1] and is a superset of that
|
||||
binding.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- items:
|
||||
- const: fsl,mpic
|
||||
- const: chrp,open-pic
|
||||
- const: chrp,open-pic
|
||||
|
||||
device_type:
|
||||
const: open-pci
|
||||
deprecated: true
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupt-controller: true
|
||||
|
||||
'#address-cells':
|
||||
const: 0
|
||||
|
||||
'#interrupt-cells':
|
||||
const: 2
|
||||
|
||||
pic-no-reset:
|
||||
description: Indicates the PIC shall not be reset during runtime initialization.
|
||||
type: boolean
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupt-controller
|
||||
- '#address-cells'
|
||||
- '#interrupt-cells'
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
interrupt-controller@40000 {
|
||||
compatible = "chrp,open-pic";
|
||||
reg = <0x40000 0x40000>;
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <2>;
|
||||
pic-no-reset;
|
||||
};
|
||||
|
|
@ -1,97 +0,0 @@
|
|||
* Open PIC Binding
|
||||
|
||||
This binding specifies what properties must be available in the device tree
|
||||
representation of an Open PIC compliant interrupt controller. This binding is
|
||||
based on the binding defined for Open PIC in [1] and is a superset of that
|
||||
binding.
|
||||
|
||||
Required properties:
|
||||
|
||||
NOTE: Many of these descriptions were paraphrased here from [1] to aid
|
||||
readability.
|
||||
|
||||
- compatible: Specifies the compatibility list for the PIC. The type
|
||||
shall be <string> and the value shall include "open-pic".
|
||||
|
||||
- reg: Specifies the base physical address(s) and size(s) of this
|
||||
PIC's addressable register space. The type shall be <prop-encoded-array>.
|
||||
|
||||
- interrupt-controller: The presence of this property identifies the node
|
||||
as an Open PIC. No property value shall be defined.
|
||||
|
||||
- #interrupt-cells: Specifies the number of cells needed to encode an
|
||||
interrupt source. The type shall be a <u32> and the value shall be 2.
|
||||
|
||||
- #address-cells: Specifies the number of cells needed to encode an
|
||||
address. The type shall be <u32> and the value shall be 0. As such,
|
||||
'interrupt-map' nodes do not have to specify a parent unit address.
|
||||
|
||||
Optional properties:
|
||||
|
||||
- pic-no-reset: The presence of this property indicates that the PIC
|
||||
shall not be reset during runtime initialization. No property value shall
|
||||
be defined. The presence of this property also mandates that any
|
||||
initialization related to interrupt sources shall be limited to sources
|
||||
explicitly referenced in the device tree.
|
||||
|
||||
* Interrupt Specifier Definition
|
||||
|
||||
Interrupt specifiers consists of 2 cells encoded as
|
||||
follows:
|
||||
|
||||
- <1st-cell>: The interrupt-number that identifies the interrupt source.
|
||||
|
||||
- <2nd-cell>: The level-sense information, encoded as follows:
|
||||
0 = low-to-high edge triggered
|
||||
1 = active low level-sensitive
|
||||
2 = active high level-sensitive
|
||||
3 = high-to-low edge triggered
|
||||
|
||||
* Examples
|
||||
|
||||
Example 1:
|
||||
|
||||
/*
|
||||
* An Open PIC interrupt controller
|
||||
*/
|
||||
mpic: pic@40000 {
|
||||
// This is an interrupt controller node.
|
||||
interrupt-controller;
|
||||
|
||||
// No address cells so that 'interrupt-map' nodes which reference
|
||||
// this Open PIC node do not need a parent address specifier.
|
||||
#address-cells = <0>;
|
||||
|
||||
// Two cells to encode interrupt sources.
|
||||
#interrupt-cells = <2>;
|
||||
|
||||
// Offset address of 0x40000 and size of 0x40000.
|
||||
reg = <0x40000 0x40000>;
|
||||
|
||||
// Compatible with Open PIC.
|
||||
compatible = "open-pic";
|
||||
|
||||
// The PIC shall not be reset.
|
||||
pic-no-reset;
|
||||
};
|
||||
|
||||
Example 2:
|
||||
|
||||
/*
|
||||
* An interrupt generating device that is wired to an Open PIC.
|
||||
*/
|
||||
serial0: serial@4500 {
|
||||
// Interrupt source '42' that is active high level-sensitive.
|
||||
// Note that there are only two cells as specified in the interrupt
|
||||
// parent's '#interrupt-cells' property.
|
||||
interrupts = <42 2>;
|
||||
|
||||
// The interrupt controller that this device is wired to.
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
* References
|
||||
|
||||
[1] Devicetree Specification
|
||||
(https://www.devicetree.org/specifications/)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user