dt-bindings: PCI: qcom-ep: Describe optional dma-coherent property

Qualcomm SA8775P supports cache coherency on the PCIe Endpoint
controller.

Thus, allow "dma-coherent" property to be used for this device. This
fixes a part of the following error (the second part is fixed in the
next commit):

  pcie-ep@1c10000: Unevaluated properties are not allowed ('dma-coherent', 'iommus' were unexpected)

Fixes: 4b220c6fa9 ("arm64: dts: qcom: sa8775p: Mark PCIe EP controller as cache coherent")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20250221-sar2130p-pci-v3-1-61a0fdfb75b4@linaro.org
[kwilczynski: commit log]
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
This commit is contained in:
Dmitry Baryshkov 2025-02-21 17:51:59 +02:00 committed by Krzysztof Wilczyński
parent 9d52691f89
commit a22d3039a1
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@ -91,6 +91,8 @@ properties:
- const: pcie-mem
- const: cpu-pcie
dma-coherent: true
resets:
maxItems: 1