From a225e19a4cc4e040ca0389cf0bbe209c23f5c92d Mon Sep 17 00:00:00 2001 From: Inochi Amaoto Date: Fri, 10 Jul 2026 14:33:12 +0800 Subject: [PATCH] riscv: dts: spacemit: Add enough deassert time for the PHY on PICO ITX RTL8211F require at least 50ms deassert to guarantee the register access, 10ms is only enough for the PHY reset. Fixes: 74657a376960 ("riscv: dts: spacemit: Add ethernet device for K3") Signed-off-by: Inochi Amaoto Reviewed-by: Yixun Lan Tested-by: E Shattow Link: https://patch.msgid.link/20260710063314.1030249-1-inochiama@gmail.com Signed-off-by: Yixun Lan --- arch/riscv/boot/dts/spacemit/k3-pico-itx.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts index 8b2a120b02d1..37ce58a09e4e 100644 --- a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts +++ b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts @@ -233,7 +233,7 @@ phy0: phy@1 { reg = <1>; reset-gpios = <&gpio 0 15 GPIO_ACTIVE_LOW>; reset-assert-us = <10000>; - reset-deassert-us = <10000>; + reset-deassert-us = <50000>; realtek,aldps-enable; realtek,clkout-disable; };